[PATCH v4 9/9] usb: typec: typec_wcove: Use charger irq chip to get usbc virq

From: Kuppuswamy Sathyanarayanan Currently, in Whiskey cove PMIC driver, USBC IRQ is moved under charger level2 irq chip. So use irq_chip_data_chgr to get the USBC virtual IRQ number. Signed-off-by: Kuppuswamy Sathyanarayanan

[PATCH v4 2/9] mfd: intel_soc_pmic_bxtwc: remove thermal second level irqs

From: Kuppuswamy Sathyanarayanan Since all second level thermal irqs are consumed by the same device(bxt_wcove_thermal), there is no need to expose them as separate interrupts. We can just export only the first level irqs for thermal and let the

[PATCH v4 1/9] mfd: intel_soc_pmic_bxtwc: fix TMU interrupt index

From: Kuppuswamy Sathyanarayanan TMU interrupts are registered as a separate interrupt chip, and hence it should start its interrupt index(BXTWC_TMU_IRQ) number from 0. But currently, BXTWC_TMU_IRQ is defined as part of enum bxtwc_irqs_level2 and its

[PATCH v4 6/9] mfd: intel_soc_pmic_bxtwc: utilize devm_* functions in driver probe

From: Kuppuswamy Sathyanarayanan Cleanup the resource allocation/free code in probe function by using devm_* calls. Signed-off-by: Kuppuswamy Sathyanarayanan Acked-for-MFD-by: Lee Jones

[PATCH v4 0/9] WCOVE chained IRQ fix

From: Kuppuswamy Sathyanarayanan Following patch set fixes the chained IRQ issue observed in WCOVE PMIC driver. Changes since v3: * Added fix for typec wcove driver. Kuppuswamy Sathyanarayanan (9): mfd: intel_soc_pmic_bxtwc: fix TMU interrupt

[PATCH v4 5/9] gpio: gpio-wcove: use first level PMIC GPIO irq

From: Kuppuswamy Sathyanarayanan PMIC mfd driver only exports first level irq for GPIO device. But currently we are reading the irqs from the second level irq chip, So this patch fixes this issue by adding support to use first level PMIC GPIO irq.

[PATCH v4 8/9] platform: x86: intel_bxtwc_tmu: remove first level irq unmask

From: Kuppuswamy Sathyanarayanan Currently in WCOVE PMIC mfd driver, all second level irq chips are chained to the respective first level irqs. So there is no need for explicitly unmasking the first level irq in this driver. This patches removes this

[PATCH v4 3/9] thermal: intel_bxt_pmic_thermal: use first level PMIC thermal irq

From: Kuppuswamy Sathyanarayanan PMIC mfd driver only exports first level irq for thermal device. But currently we are reading the irqs from the second level irq chip, So this patch fixes this issue by adding support to use first level PMIC thermal

[PATCH v4 7/9] mfd: intel_soc_pmic_bxtwc: use chained irqs for second level irq chips

From: Kuppuswamy Sathyanarayanan Whishkey cove PMIC has support to mask/unmask interrupts at two levels. At first level we can mask/unmask interrupt domains like TMU, GPIO, ADC, CHGR, BCU THERMAL and PWRBTN and at second level, it provides facility to

[PATCH v4 4/9] mfd: intel_soc_pmic_bxtwc: remove second level irq for gpio device

From: Kuppuswamy Sathyanarayanan Currently all PMIC GPIO domain irqs are consumed by the same device(bxt_wcove_gpio), so there is no need to export them as separate interrupts. We can just export only the first level GPIO irq(BXTWC_GPIO_LVL1_IRQ) as an

[PATCH v5 8/8] platform/x86: intel_bxtwc_tmu: Remove first level irq unmask

From: Kuppuswamy Sathyanarayanan Currently in WCOVE PMIC mfd driver, all second level irq chips are chained to the respective first level irqs. So there is no need for explicitly unmasking the first level irq in this driver. This patches removes this

[PATCH v5 5/8] gpio: gpio-wcove: Use first level PMIC GPIO irq

From: Kuppuswamy Sathyanarayanan PMIC mfd driver only exports first level irq for GPIO device. But currently we are reading the irqs from the second level irq chip, So this patch fixes this issue by adding support to use first level PMIC GPIO irq.

[PATCH v5 7/8] mfd: intel_soc_pmic_bxtwc: Use chained irqs for second level irq chips

From: Kuppuswamy Sathyanarayanan Whishkey cove PMIC has support to mask/unmask interrupts at two levels. At first level we can mask/unmask interrupt domains like TMU, GPIO, ADC, CHGR, BCU THERMAL and PWRBTN and at second level, it provides facility to

[PATCH v5 4/8] mfd: intel_soc_pmic_bxtwc: Remove second level irq for gpio device

From: Kuppuswamy Sathyanarayanan Currently all PMIC GPIO domain irqs are consumed by the same device(bxt_wcove_gpio), so there is no need to export them as separate interrupts. We can just export only the first level GPIO irq(BXTWC_GPIO_LVL1_IRQ) as an

[PATCH v5 6/8] mfd: intel_soc_pmic_bxtwc: Utilize devm_* functions in driver probe

From: Kuppuswamy Sathyanarayanan Cleanup the resource allocation/free code in probe function by using devm_* calls. Signed-off-by: Kuppuswamy Sathyanarayanan Acked-for-MFD-by: Lee Jones

[PATCH v5 2/8] mfd: intel_soc_pmic_bxtwc: Remove thermal second level irqs

From: Kuppuswamy Sathyanarayanan Since all second level thermal irqs are consumed by the same device(bxt_wcove_thermal), there is no need to expose them as separate interrupts. We can just export only the first level irqs for thermal and let the

[PATCH v5 0/8] mfd: intel_soc_pmic_bxtwc: Add chained IRQ support

From: Kuppuswamy Sathyanarayanan Following patch set adds chained IRQ support to WCOVE PMIC driver. Changes since v3: * Added fix for typec wcove driver. Changes since v4: * Squashed following two commits, to keep the patch set bisectable. usb:

[PATCH v5 1/8] mfd: intel_soc_pmic_bxtwc: Fix TMU interrupt index

From: Kuppuswamy Sathyanarayanan TMU interrupts are registered as a separate interrupt chip, and hence it should start its interrupt index(BXTWC_TMU_IRQ) number from 0. But currently, BXTWC_TMU_IRQ is defined as part of enum bxtwc_irqs_level2 and its

[PATCH v5 3/8] thermal: intel_bxt_pmic_thermal: Use first level PMIC thermal irq

From: Kuppuswamy Sathyanarayanan PMIC mfd driver only exports first level irq for thermal device. But currently we are reading the irqs from the second level irq chip, So this patch fixes this issue by adding support to use first level PMIC thermal

[PATCH v6 2/6] mfd: intel_soc_pmic_bxtwc: Remove thermal second level IRQs

From: Kuppuswamy Sathyanarayanan Since all second level thermal IRQs are consumed by the same device(bxt_wcove_thermal), there is no need to expose them as separate interrupts. We can just export only the first level IRQs for thermal and let the

[PATCH v6 3/6] mfd: intel_soc_pmic_bxtwc: Remove second level IRQ for gpio device

From: Kuppuswamy Sathyanarayanan Currently all PMIC GPIO domain IRQs are consumed by the same device(bxt_wcove_gpio), so there is no need to export them as separate interrupts. We can just export only the first level GPIO IRQ(BXTWC_GPIO_LVL1_IRQ) as an

[PATCH v6 1/6] mfd: intel_soc_pmic_bxtwc: Fix TMU interrupt index

From: Kuppuswamy Sathyanarayanan TMU interrupts are registered as a separate interrupt chip, and hence it should start its interrupt index(BXTWC_TMU_IRQ) number from 0. But currently, BXTWC_TMU_IRQ is defined as part of enum bxtwc_irqs_level2 and its

[PATCH v6 6/6] platform/x86: intel_bxtwc_tmu: Remove first level IRQ unmask

From: Kuppuswamy Sathyanarayanan Currently in WCOVE PMIC MFD driver, all second level IRQ chips are chained to the respective first level IRQs. So there is no need for explicitly unmasking the first level IRQ in this driver. This patches removes this

[PATCH v6 5/6] mfd: intel_soc_pmic_bxtwc: Use chained IRQs for second level IRQ chips

From: Kuppuswamy Sathyanarayanan Whishkey cove PMIC has support to mask/unmask interrupts at two levels. At first level we can mask/unmask interrupt domains like TMU, GPIO, ADC, CHGR, BCU THERMAL and PWRBTN and at second level, it provides facility to

[PATCH v6 0/6] mfd: intel_soc_pmic_bxtwc: Add chained IRQ support

From: Kuppuswamy Sathyanarayanan Following patch set adds chained IRQ support to WCOVE PMIC driver. Changes since v3: * Added fix for typec wcove driver. Changes since v4: * Squashed following two commits, to keep the patch set bisectable. usb:

[PATCH v6 4/6] mfd: intel_soc_pmic_bxtwc: Utilize devm_* functions in driver probe

From: Kuppuswamy Sathyanarayanan Cleanup the resource allocation/free code in probe function by using devm_* calls. Signed-off-by: Kuppuswamy Sathyanarayanan Acked-for-MFD-by: Lee Jones

Re: [PATCH] usb: core: message: remember to reset 'ret' to 0 when necessary

*(u16 *) data = le16_to_cpu(*(__le16 *) status); + ret = 0; break; default: ret = -EIO; -- Sathyanarayanan Kuppuswamy Linux kernel developer -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a mes

Re: [PATCH v3 4/4] usb: roles: intel_xhci: Enable runtime PM

the registers, the parent device must be resumed. Reported-by: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppusw...@intel.com> Fixes: f6fb9ec02be1 ("usb: roles: Add Intel xHCI USB role switch driver") Signed-off-by: Heikki Krogerus <heikki.kroge...@linux.intel.com> Tested-by: Kupp

[PATCH v2 1/1] usb: cdc_acm: prevent race at write to acm while system resumes

From: Dominik Bozek ACM driver may accept data to transmit while system is not fully resumed. In this case ACM driver buffers data and prepare URBs on usb anchor list. There is a little chance that two tasks put a char and initiate acm_tty_flush_chars(). In such a case,

Re: [PATCH v1 1/1] usb: cdc_acm: prevent race at write to acm while system resumes

the signed-off tag. Let me confirm it with author and get back to you. Mostly I will submit a v2 with proper sign-off info. -- Sathyanarayanan Kuppuswamy Linux kernel developer -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majord...@vger.

[PATCH v1 1/1] USB: serial: Add boundry check for read_urbs array access

From: Kuppuswamy Sathyanarayanan In usb_serial_generic_submit_read_urb() function we are accessing the port->read_urbs array without any boundry checks. This might lead to kernel panic when index value goes above array length. One posible call path

Re: [PATCH v1 1/1] USB: serial: Add boundry check for read_urbs array access

to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- Sathyanarayanan Kuppuswamy Linux kernel developer -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majord...@vger.kernel.org More majordo

Re: [PATCH v1 1/1] USB: serial: Add boundry check for read_urbs array access

On 03/08/2018 12:54 AM, Oliver Neukum wrote: Am Mittwoch, den 07.03.2018, 13:41 -0800 schrieb sathyanarayanan kuppuswamy : On 03/07/2018 12:58 PM, Greg KH wrote: So I don't see why your check is needed, what other code path would ever call this function in a way that the bounds check

Re: [PATCH v1 1/1] USB: serial: Add boundry check for read_urbs array access

On 03/08/2018 03:43 PM, Greg KH wrote: On Thu, Mar 08, 2018 at 03:29:48PM -0800, sathyanarayanan kuppuswamy wrote: On 03/08/2018 12:54 AM, Oliver Neukum wrote: Am Mittwoch, den 07.03.2018, 13:41 -0800 schrieb sathyanarayanan kuppuswamy : On 03/07/2018 12:58 PM, Greg KH wrote: So I

[PATCH v1 1/1] usb: hub: Don't wait for connect state at resume for powered-off ports

From: Dominik Bozek wait_for_connected() wait till a port change status to USB_PORT_STAT_CONNECTION, but this is not possible if the port is unpowered. The loop will only exit at timeout. Such case take place if an over-current incident happen while system is in S3.

[PATCH v1 1/1] usb: core: Add quirk for HP v222w 16GB Mini

From: Kamil Lulko Add DELAY_INIT quirk to fix the following problem with HP v222w 16GB Mini: usb 1-3: unable to read config index 0 descriptor/start: -110 usb 1-3: can't read configurations, error -110 usb 1-3: can't set config #1, error -110 Signed-off-by: Kamil Lulko

Re: [PATCH v1 1/1] usb: core: Add quirk for HP v222w 16GB Mini

Hi Segei, On 04/14/2018 01:35 AM, Sergei Shtylyov wrote: Please indent with tabs (as above and below), not spaces. Thanks for the comments. I will fix it in v2. -- Sathyanarayanan Kuppuswamy Linux kernel developer -- To unsubscribe from this list: send the line "unsubscribe linu

[PATCH v2 1/1] usb: core: Add quirk for HP v222w 16GB Mini

From: Kamil Lulko Add DELAY_INIT quirk to fix the following problem with HP v222w 16GB Mini: usb 1-3: unable to read config index 0 descriptor/start: -110 usb 1-3: can't read configurations, error -110 usb 1-3: can't set config #1, error -110 Signed-off-by: Kamil Lulko

Re: [PATCH v5 3/8] thermal: intel_bxt_pmic_thermal: Use first level PMIC thermal irq

Hi, On Sat, Jun 3, 2017 at 6:00 AM, Andy Shevchenko wrote: > On Thu, Jun 1, 2017 at 1:37 AM, > wrote: >> From: Kuppuswamy Sathyanarayanan >> >> PMIC mfd driver only exports first

Re: [PATCH v5 3/8] thermal: intel_bxt_pmic_thermal: Use first level PMIC thermal irq

Hi, On Sat, Jun 3, 2017 at 10:32 AM, Andy Shevchenko <andy.shevche...@gmail.com> wrote: > On Sat, Jun 3, 2017 at 8:28 PM, Sathyanarayanan Kuppuswamy Natarajan > <sathyao...@gmail.com> wrote: >> Hi, >> >> On Sat, Jun 3, 2017 at 6:00 AM, Andy Shevchenko