From: Paul Butler paul.but...@windriver.com
- Added the RapidIO management options
- Added the rio device to the axm55xx
- Created the rio architecture support for arm
- Added a file to support the RAPIDIO Bus registration
Signed-off-by: Paul Butler paul.but...@windriver.com
---
From: Paul Butler paul.but...@windriver.com
Add the rapidio device to the powerpc tree
Add the rapidio support for the powerpc 44x lsi board
Signed-off-by: Paul Butler paul.but...@windriver.com
---
arch/powerpc/boot/dts/lsi_acp342x.dts | 317 +
These patches have the comments added to the rapidio patches
Anders Berg (7):
axxia: Fixed earlyprintk
axxia: Define arch_is_coherent()
ARM: 7465/1: Handle 4GB memory sizes in device tree and
mem=size@start option
ARM: LPAE: use phys_addr_t in alloc_init_pud()
ARM: 7499/1: mm: Fix
From: Paul Butler paul.but...@windriver.com
This patch adds the register definitions,
support for PW messages, destination IDs, direct IO and
driver support.
Signed-off-by: Paul Butler paul.but...@windriver.com
---
include/asm-generic/vmlinux.lds.h | 10 ++
include/linux/rio.h |
From: Paul Butler paul.but...@windriver.com
Add the rapidio device to the powerpc tree
Add the rapidio support for the powerpc 44x lsi board
Signed-off-by: Paul Butler paul.but...@windriver.com
---
arch/powerpc/boot/dts/lsi_acp342x.dts | 317 +
From: David Mercado david.merc...@windriver.com
By default, the system does not enable the use of ARM wfe/sev instructions
across clusters, which breaks things like arch_spin_lock. This patch enables
this feature.
LSI AXM55xx: Disable use of wfe/sev in arch_spin_lock
By default, the system does
From: Anders Berg anders.b...@lsi.com
By defining arch_is_coherent() == 1, we can avoid unnecessary cache maintenance
operations and the dma_alloc_coherent() will return normal memory.
Signed-off-by: Anders Berg anders.b...@lsi.com
---
arch/arm/Kconfig |1 +
From: Anders Berg anders.b...@lsi.com
commit a5d5f7daa744b34477c4a12728bde0a1694a1707 upstream
The memory regions which are passed to arm_add_memory() from
device tree blobs via early_init_dt_add_memory_arch() can
have sizes which are larger than will fit in a 32 bit integer,
so switch to using
From: John Jacques john.jacq...@lsi.com
As procfs shouldn't be used as a module to user interface,
switch to sysfs.
Signed-off-by: John Jacques john.jacq...@lsi.com
---
arch/arm/mach-axxia/Makefile |1 +
arch/arm/mach-axxia/axxia.c|3 +
From: Anders Berg anders.b...@lsi.com
commit 36418c516b31bff4ff949c7c618430a1a514debe upstream
With !HIGHMEM, sanity_check_meminfo checks for banks that completely or
partially overlap the vmalloc region. The test for partial overlap checks
__va(bank-start + bank-size) vmalloc_min. This
From: SangeethaRao sangeetha@lsi.com
Signed-off-by: SangeethaRao sangeetha@lsi.com
---
arch/powerpc/sysdev/lsi_pci.c | 19 ++-
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/sysdev/lsi_pci.c b/arch/powerpc/sysdev/lsi_pci.c
index
From: Anders Berg anders.b...@lsi.com
This patch fixes the checkpatch issues with mmu. This patch
is separate to keep the continuity of the previous patches
that used copies of upstream patches to update.
Signed-off-by: Anders Berg anders.b...@lsi.com
---
arch/arm/mm/mmu.c | 76
From: David Mercado david.merc...@windriver.com
This patch adds PMU support to the Axxia AXM55xx platform. Note that
on this platform, all PMU IRQ lines are OR'ed together into a single
IRQ, and therefore, this implementation uses a rotating IRQ affinity
scheme to deal with it.
Signed-off-by:
From: Paul Butler paul.but...@windriver.com
BASE_ADDR1 register
Updated PCIe driver to set PCIe BASE_ADDR1 register to 0x0 without
which PCIe inbound access wasn't working and we were seeing several
suprious PEI interrupts including BAR mismatch interrupt.
Signed-off-by: SangeethaRao
From: SangeethaRao sangeetha@lsi.com
This patch adds support for ncr_read/ncr_write
to access PCIe/SRIO SerDes config in 0x115 node
Signed-off-by: SangeethaRao sangeetha@lsi.com
---
arch/arm/mach-axxia/ncr.c | 137 -
1 file changed, 123
From: Anders Berg anders.b...@lsi.com
Add support for the I2C_M_RECV_LEN flag to enable SMBus block data transfers.
scripts/setlocalversion strips out the tag if there is a match
since the Linux version is in Makefile. Without the tag information,
there is no way to get back to the specific tag
From: John Jacques john.jacq...@lsi.com
commit 32dda05f4ec2b854b594bd91590c46c5197d77e1 upstream
Otherwise, we get a debug traceback due to the use of
smp_processor_id() (or get_paca()) inside hard_smp_processor_id().
mpic_host_map() is just looking for a default CPU, so it doesn't
From: John Jacques john.jacq...@lsi.com
The MTC status registers are not cleared by a reset. So, clear them
during driver initialization.
Signed-off-by: John Jacques john.jacq...@lsi.com
---
drivers/misc/lsi-mtc.c |9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git
From: John Jacques john.jacq...@lsi.com
The latest boot loader updates the frequency of the clocks in the
device tree; it expects there to be a place to put them.
Fix the device trees for ACP and AXM platforms such that the compatible
field uses the form manufacturer,model.
Signed-off-by: John
From: Ivan Djelic ivan.dje...@parrot.com
commit 455bd4c430b0c0a361f38e8658a0d6cb469942b5 upstream.
Recent GCC versions (e.g. GCC-4.7.2) perform optimizations based on
assumptions about the implementation of memset and similar functions.
The current ARM optimized memset code does not return the
From: Michael Bringmann michael.bringm...@lsi.com
Add additional spinlocks/mutexes to each controller state to increase
concurrency and performance. Fix some bound checks for full outbound
DME descriptor chains, correct a lockup/delay issue with errors in the
outbound DME chains, and remove a
From: Nicolas Pitre nicolas.pi...@linaro.org
commit 418df63adac56841ef6b0f1fcf435bc64d4ed177 upstream.
Commit 455bd4c430b0 (ARM: 7668/1: fix memset-related crashes caused by
recent GCC (4.7.2) optimizations) attempted to fix a compliance issue
with the memset return value. However the memset
On Thu, 1 May 2014, Greg Kroah-Hartman wrote:
On Thu, May 01, 2014 at 08:29:52AM -0700, Charlie Paul wrote:
From: Nicolas Pitre nicolas.pi...@linaro.org
commit 418df63adac56841ef6b0f1fcf435bc64d4ed177 upstream.
Commit 455bd4c430b0 (ARM: 7668/1: fix memset-related crashes caused by
On 2014-05-01, 9:11 PM, Nicolas Pitre wrote:
On Thu, 1 May 2014, Greg Kroah-Hartman wrote:
On Thu, May 01, 2014 at 08:29:52AM -0700, Charlie Paul wrote:
From: Nicolas Pitre nicolas.pi...@linaro.org
commit 418df63adac56841ef6b0f1fcf435bc64d4ed177 upstream.
Commit 455bd4c430b0 (ARM: 7668/1:
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