From: Anders Berg anders.b...@lsi.com
Add a the vendor prefixed compatible string to the match table.
Signed-off-by: Anders Berg anders.b...@lsi.com
---
drivers/net/ethernet/lsi/lsi_acp_net.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
From: Anders Berg anders.b...@lsi.com
Add support for PCIe MSI on both controllers. On AXM5516, PCIE0 has the ability
to signal MSI interrupts on 16 separate lines to the CPU cores, where as PCIE1
only has a single interrupt line that is used for legacy, status/error and MSI.
This patch adds MSI
From: Anders Berg anders.b...@avagotech.com
Remove unused definitions and remove redundant variable.
Signed-off-by: Anders Berg anders.b...@avagotech.com
---
drivers/i2c/busses/i2c-axxia.c | 27 +++
1 file changed, 11 insertions(+), 16 deletions(-)
diff --git
From: Anders Berg anders.b...@avagotech.com
Signed-off-by: Anders Berg anders.b...@avagotech.com
---
drivers/gpio/gpio-pl061.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c
index 9d35136..3d0e9fc 100644
---
From: SangeethaRao sangeetha@lsi.com
Signed-off-by: SangeethaRao sangeetha@lsi.com
---
arch/powerpc/sysdev/lsi_pci.c | 40 +++-
1 file changed, 35 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/sysdev/lsi_pci.c
From: Anders Berg anders.b...@avagotech.com
Added module parameter panic_on_fatal which when set will cause the driver
to call panic() when an uncorrectable ECC error is detected.
Signed-off-by: Anders Berg anders.b...@avagotech.com
---
drivers/misc/lsi-smmon.c | 27
From: John Jacques john.jacq...@lsi.com
Also added the 6th Core to the Default 3500 Device Tree
Signed-off-by: John Jacques john.jacq...@lsi.com
---
arch/powerpc/boot/dts/acp342x.dts | 347 +++--
arch/powerpc/boot/dts/acp344x.dts | 164 --
From: Anders Berg anders.b...@avagotech.com
We must not call the ncr_write function to unmask interrupts with
the memory controller interrupt enabled, as this could cause the ISR to
be invoked before ncr_write has released the lock used to serialize
register accesses.
To avoid this, temporarily
From: John Jacques john.jacq...@lsi.com
The nand driver changes have to support multiple controllers on multiple
targets.
This is the simplest way I could see to get there. There is a change from using
hard coded defines to using the device tree which was required to accomplish
this.
From: John Jacques john.jacq...@lsi.com
Reset support for 3400/2500/3500 got removed when we were porting to
Yocto quite some time back. It has never worked since that port.
This restores the original reset code require to support reset on
3400/2500/3500.
Signed-off-by: John Jacques
From: John Jacques john.jacq...@lsi.com
When we do a reset (core, not chip or system), the core that is doing the reset
has to
tell all the other cores to reset. To do this, we call
smp_call_function_single().
In this case the function specified in smp_call_function_single() doesn't
return.
Updates to 2sc and additions to the 3500
Anders Berg (12):
net: lsi_acp_net: Added new string to DT match
ARM: dts: axxia: Corrected IRQ for memory contollers
ARM: axxia: Support MSI on both PCIe controllers
i2c: axxia: Minor cleanup (cosmetic)
i2c: axxia: Report spurious IRQ
i2c:
From: Anders Berg anders.b...@lsi.com
The interrupt numbers for the memory controllers was wrong (conflicting with
assigned range for PCI MSI. This would cause a device using MSI to fail to
request its IRQ.
Signed-off-by: Anders Berg anders.b...@lsi.com
---
arch/arm/boot/dts/axm55xx.dts |4
From: Anders Berg anders.b...@avagotech.com
Changed the initial transfer size on block reads from 1 to
I2C_SMBUS_BLOCK_MAX. The size is adjusted when the first byte (block
length) is received. Having the initial size set to 1 could cause the
controller to stop the transfer after the block length
From: Anders Berg anders.b...@avagotech.com
Signed-off-by: Anders Berg anders.b...@avagotech.com
---
arch/arm/mach-axxia/pci.c |8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-axxia/pci.c b/arch/arm/mach-axxia/pci.c
index 0f94403..ae6eaf8 100644
---
From: Anders Berg anders.b...@avagotech.com
Signed-off-by: Anders Berg anders.b...@avagotech.com
---
drivers/gpio/gpio-pl061.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c
index 9d35136..3d0e9fc 100644
---
From: Anders Berg anders.b...@avagotech.com
We must not call the ncr_write function to unmask interrupts with
the memory controller interrupt enabled, as this could cause the ISR to
be invoked before ncr_write has released the lock used to serialize
register accesses.
To avoid this, temporarily
From: Anders Berg anders.b...@avagotech.com
Signed-off-by: Anders Berg anders.b...@avagotech.com
---
drivers/spi/spi-pl022.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index 1204d69..12b925b 100644
---
From: John Jacques john.jacq...@lsi.com
Also added the 6th Core to the Default 3500 Device Tree
Signed-off-by: John Jacques john.jacq...@lsi.com
---
arch/powerpc/boot/dts/acp342x.dts | 347 +++--
arch/powerpc/boot/dts/acp344x.dts | 164 --
From: Anders Berg anders.b...@avagotech.com
Added module parameter panic_on_fatal which when set will cause the driver
to call panic() when an uncorrectable ECC error is detected.
Signed-off-by: Anders Berg anders.b...@avagotech.com
---
drivers/misc/lsi-smmon.c | 27
From: John Jacques john.jacq...@lsi.com
Signed-off-by: John Jacques john.jacq...@lsi.com
---
drivers/mtd/nand/lsi_acp_nand.c | 171 +--
1 file changed, 93 insertions(+), 78 deletions(-)
diff --git a/drivers/mtd/nand/lsi_acp_nand.c
From: John Jacques john.jacq...@lsi.com
Signed-off-by: John Jacques john.jacq...@lsi.com
---
arch/powerpc/sysdev/ppc4xx_soc.c | 73 +-
1 file changed, 72 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/sysdev/ppc4xx_soc.c
From: Anders Berg anders.b...@avagotech.com
Signed-off-by: Anders Berg anders.b...@avagotech.com
---
drivers/dma/lsi-dma32.c |2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/dma/lsi-dma32.c b/drivers/dma/lsi-dma32.c
index a5f3804..a488eec 100644
--- a/drivers/dma/lsi-dma32.c
+++
From: SangeethaRao sangeetha@lsi.com
Signed-off-by: SangeethaRao sangeetha@lsi.com
---
arch/powerpc/sysdev/lsi_pci.c | 42 ++---
1 file changed, 35 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/sysdev/lsi_pci.c
From: Anders Berg anders.b...@lsi.com
The driver is extended with implementation of DMA scatterlist operation
(device_prep_dma_sg). This allows for DMA operations to be performed on
non-contiguous ranges of memory.
Due to hardware limitations, each entry in the scatterlist needs to have
From: John Jacques john.jacq...@lsi.com
Signed-off-by: John Jacques john.jacq...@lsi.com
---
arch/arm/boot/dts/axm5504-sim.dts |6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/axm5504-sim.dts
b/arch/arm/boot/dts/axm5504-sim.dts
index 7580ae5..7c99c9f 100644
---
From: John Jacques john.jacq...@lsi.com
Update the compatibility field and peripherals to support
the 3500.
Signed-off-by: John Jacques john.jacq...@lsi.com
---
arch/powerpc/boot/dts/acp35xx.dts | 68 +++--
1 file changed, 19 insertions(+), 49 deletions(-)
From: John Jacques john.jacq...@lsi.com
Signed-off-by: John Jacques john.jacq...@lsi.com
---
arch/arm/boot/dts/axm5504-sim.dts | 12 ++--
arch/arm/boot/dts/axm5516-sim.dts |6 ++
2 files changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/axm5504-sim.dts
This patch fixes typy which causes a build failure
John Jacques (1):
axxia: Fixed typo in acp.dts file
arch/powerpc/boot/dts/acp342x.dts |4 ++--
arch/powerpc/boot/dts/acp35xx.dts |6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
--
1.7.9.5
--
Updates to the arm and i2c
Anders Berg (5):
i2c: axxia: Minor cosmetic cleanup
i2c: axxia: Fall back to polling mode when no IRQ
misc: lsi-smmon: Bug when probing with IRQ pending
misc: lsi-smmon: Add parameter panic_on_fatal
ARM: dts: axxia: Added memory controllers
John Jacques (3):
From: Anders Berg anders.b...@avagotech.com
If the device tree does not specify an interrupt property, the device falls
back to polling the controller status. This is needed to support simulator
models without interrupt capabilities.
Signed-off-by: Anders Berg anders.b...@avagotech.com
---
From: Anders Berg anders.b...@avagotech.com
We must not call the ncr_write function to unmask interrupts with
the memory controller interrupt enabled, as this could cause the ISR to
be invoked before ncr_write has released the lock used to serialize
register accesses.
To avoid this, temporarily
From: Anders Berg anders.b...@avagotech.com
Signed-off-by: Anders Berg anders.b...@avagotech.com
---
arch/arm/boot/dts/axm5516-amarillo.dts |8
arch/arm/boot/dts/axm55xx.dtsi | 14 ++
2 files changed, 22 insertions(+)
diff --git
From: Anders Berg anders.b...@avagotech.com
Added module parameter panic_on_fatal which when set will cause the driver
to call panic() when an uncorrectable ECC error is detected.
Signed-off-by: Anders Berg anders.b...@avagotech.com
---
drivers/misc/lsi-smmon.c | 27
From: John Jacques john.jacq...@lsi.com
The Axxia boot loader leaves secondary cores in reset; Linux is expected
to enable them. This change makes that happen.
Signed-off-by: John Jacques john.jacq...@lsi.com
---
arch/arm/mach-axxia/platsmp.c | 23 ---
1 file changed, 8
From: John Jacques john.jacq...@lsi.com
Add device trees for two new 5500 variants, 5512 and 5508.
Signed-off-by: John Jacques john.jacq...@lsi.com
---
arch/arm/boot/dts/Makefile |4 +-
arch/arm/boot/dts/axm5508-amarillo.dts | 221
These patches are updates to the LSI standard/axxia/base for 3.10.
John Jacques (2):
arch/arm/mach-axxia: Added the Redundant Parameters inthe Device Tree
arch/arm/mach-axxia: Move Simulutaion/Emulation WFE/SEV Work-Around
SangeethaRao (2):
ARM:mach-axxia: Added code to PCIe driver to
This is a resubmittal of the second set of patches
Patch 04/28 was not changed, but noted your explanation.
Patch 05/28 added more information as why the mbox was increased
Patch 07/28 was split into two patches as requested
Patch 10/28 was split into two patches as requested
Patch 17/28 more
From: ningligong ning...@lsi.com
The register base for the RAB was wrong changed from
0x10 to 0xC
Added the IB_VIRT stats SLEEPING and TRAN_PENDING
Signed-off-by: ningligong ning...@lsi.com
---
drivers/rapidio/devices/lsi/axxia-rio-ds.h | 10 +++---
1 file changed, 7 insertions(+), 3
From: Michael Bringmann michael.bringm...@lsi.com
The bounds for the input and output mbox were wrong, as
a precaution the range was corrected. The correct range
is 1 - max, not 0 to max.
Signed-off-by: Michael Bringmann michael.bringm...@lsi.com
---
drivers/rapidio/devices/lsi/axxia-rio-irq.c
From: Michael Bringmann michael.bringm...@lsi.com
Added a state variable to the interrupt status so the interrupt
for rapidio. This status helps to identify a clearer state
when the interrupt is processed.
Signed-off-by: Michael Bringmann michael.bringm...@lsi.com
---
From: ningligong ning...@lsi.com
1. Fixed inbound data stream interrupt service routine to properly
handle packets received by all virtual VSID.
2. Moved checking for vsid_in_use of an inbound DSE, the vsid_in_use
is only valid when other two bits are set.
Signed-off-by: ningligong
From: Anders Berg anders.b...@lsi.com
Adjusted the controller setup to meet the timing requirements for I2C fast-mode
on the SCL signal (tLOW and tHIGH). For fast-mode, a 33/66 duty cycle of the
SCL is used to match the minimum timing requirements of 1.3/0.6 for tLOW/tHIGH.
Signed-off-by: Anders
From: Michael Bringmann michael.bringm...@lsi.com
Used 'atomic' counter to track available inbound messages
between interrupt and foreground code.
Signed-off-by: Michael Bringmann michael.bringm...@lsi.com
---
drivers/rapidio/devices/lsi/axxia-rio-irq.c | 18 --
From: Michael Bringmann michael.bringm...@lsi.com
Fix lockup issue processing inbound message descriptor chains.
Revise processing code for inbound/outbound message descriptor
chains to reduce overhead / improve performance.
Signed-off-by: Michael Bringmann michael.bringm...@lsi.com
---
From: Michael Bringmann michael.bringm...@lsi.com
Signed-off-by: Michael Bringmann michael.bringm...@lsi.com
---
drivers/rapidio/rio.c |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/rapidio/rio.c b/drivers/rapidio/rio.c
index 0fe82b3..928f1eb 100644
---
From: Anders Berg anders.b...@lsi.com
Changed the order in which the interrupt conditions are checked in the
interrupt handler. Need to check for transfer-complete before timeout-error,
otherwise a delayed interrupt may report a false timeout error (since the
timeout may expire after the transfer
From: David Mercado david.merc...@windriver.com
Fix irq_set_affinity() to allow usage of buslocks with slow bus
IRQ controllers, such as the LSI Axxia GIC.
Signed-off-by: David Mercado david.merc...@windriver.com
---
kernel/irq/manage.c |6 +++---
1 file changed, 3 insertions(+), 3
From: Michael Bringmann michael.bringm...@lsi.com
Signed-off-by: Michael Bringmann michael.bringm...@lsi.com
---
arch/powerpc/boot/dts/acp25xx.dts |2 ++
arch/powerpc/boot/dts/acp35xx.dts |2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/powerpc/boot/dts/acp25xx.dts
From: Michael Bringmann michael.bringm...@lsi.com
Removed __devinit from the initialization routines. There
was no more need to insure that the driver was initializedi
before it is instanciated. The device is registered prior
to initialization.
Signed-off-by: Michael Bringmann
From: David Mercado david.merc...@windriver.com
Introduce the use of slow bus locking to allow use of Linux RPC
mechanism, remove unnecessary memory barriers, etc.
Signed-off-by: David Mercado david.merc...@windriver.com
---
arch/arm/mach-axxia/axxia-gic.c | 1109
From: Michael Bringmann michael.bringm...@lsi.com
Update the powerpc FDT settings for the latest AXXIA RIO code.
Update the ARM/PowerPC LSI configuration to build AXXIA RIO by default.
Add support to reset the AXXIA RIO controller when a Link Reset Request
symbol is received.
Signed-off-by:
From: SangeethaRao sangeetha@lsi.com
This patch removes the power of 2 size restriction
for PCIe inbound mapping in LSI PCIe driver
Signed-off-by: SangeethaRao sangeetha@lsi.com
---
arch/powerpc/sysdev/lsi_pci.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
From: SangeethaRao sangeetha@lsi.com
This patch adds i2c support for the 3500 board
Signed-off-by: SangeethaRao sangeetha@lsi.com
---
drivers/i2c/busses/i2c-axxia.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-axxia.c
From: Anders Berg anders.b...@lsi.com
Added missing 'bus' property to the I2C device tree nodes (simulation dts
files). This is needed to get the I2C adapters numbered starting with 0.
Signed-off-by: Anders Berg anders.b...@lsi.com
---
arch/arm/boot/dts/axm55xxsim.dts | 24
From: Gary McGee gary.mc...@lsi.com
- add new ncp_ddr_shutdown() function using private i/o functions.
This eliminates unwanted code that may be introduced by use of
the standard i/o macros/functions.
- do explicit memory copy to preload ncp_ddr_shutdown() into L2 cache
-
From: Anders Berg anders.b...@lsi.com
Add support for I2c transfers using 10-bit address. The upper layer passes the
flag I2C_M_TEN to inform the driver that the msg-addr field is a 10-bit
address. The Axxia I2C controller will transmit a 10-bit address when the 5
most significant bits in address
From: John Jacques john.jacq...@lsi.com
Signed-off-by: John Jacques john.jacq...@lsi.com
---
arch/powerpc/boot/dts/acp25xx.dts |2 +-
arch/powerpc/boot/dts/acp342x.dts |2 +-
arch/powerpc/boot/dts/acp344x.dts |2 +-
arch/powerpc/boot/dts/acp35xx.dts |2 +-
4 files changed, 4
Sorry Bruce, those two patches appeared in my tree after a rebase.
I will put the --cc-supress in my submittals
Anders Berg (7):
axxia: Fixed earlyprintk
axxia: Define arch_is_coherent()
ARM: 7465/1: Handle 4GB memory sizes in device tree and
mem=size@start option
ARM: LPAE: use
From: Paul Butler paul.but...@windriver.com
- Added the RapidIO management options
- Added the rio device to the axm55xx
- Created the rio architecture support for arm
- Added a file to support the RAPIDIO Bus registration
Signed-off-by: Paul Butler paul.but...@windriver.com
---
From: Paul Butler paul.but...@windriver.com
This patch adds the register definitions,
support for PW messages, destination IDs, direct IO and
driver support.
Signed-off-by: Paul Butler paul.but...@windriver.com
---
include/asm-generic/vmlinux.lds.h | 10 ++
include/linux/rio.h |
From: Paul Butler paul.but...@windriver.com
Add the rapidio device to the powerpc tree
Add the rapidio support for the powerpc 44x lsi board
Signed-off-by: Paul Butler paul.but...@windriver.com
---
arch/powerpc/boot/dts/lsi_acp342x.dts | 317 +
From: Anders Berg anders.b...@lsi.com
Add static mapping of the UART registers for CONFIG_DEBUG_LL. Also depends on
commit 2f409a to fix a bug with LPAE and static mappings.
Signed-off-by: Anders Berg anders.b...@lsi.com
---
arch/arm/Kconfig.debug |9 +
From: Anders Berg anders.b...@lsi.com
By defining arch_is_coherent() == 1, we can avoid unnecessary cache maintenance
operations and the dma_alloc_coherent() will return normal memory.
Signed-off-by: Anders Berg anders.b...@lsi.com
---
arch/arm/Kconfig |1 +
From: Anders Berg anders.b...@lsi.com
commit 20d6956d8cd2452cec0889ff040f18afc03c2e6b upstream
This patch fixes the alloc_init_pud() function to use phys_addr_t instead of
unsigned long when passing in the phys argument.
This is an extension to commit 97092e0 (ARM:
pgtable: use
From: John Jacques john.jacq...@lsi.com
The MTC status registers are not cleared by a reset. So, clear them
during driver initialization.
Signed-off-by: John Jacques john.jacq...@lsi.com
---
drivers/misc/lsi-mtc.c |9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git
From: Paul Butler paul.but...@windriver.com
BASE_ADDR1 register
Updated PCIe driver to set PCIe BASE_ADDR1 register to 0x0 without
which PCIe inbound access wasn't working and we were seeing several
suprious PEI interrupts including BAR mismatch interrupt.
Signed-off-by: SangeethaRao
From: David Mercado david.merc...@windriver.com
By default, the system does not enable the use of ARM wfe/sev instructions
across clusters, which breaks things like arch_spin_lock. This patch enables
this feature.
LSI AXM55xx: Disable use of wfe/sev in arch_spin_lock
By default, the system does
From: Anders Berg anders.b...@lsi.com
commit 36418c516b31bff4ff949c7c618430a1a514debe upstream
With !HIGHMEM, sanity_check_meminfo checks for banks that completely or
partially overlap the vmalloc region. The test for partial overlap checks
__va(bank-start + bank-size) vmalloc_min. This
From: SangeethaRao sangeetha@lsi.com
Signed-off-by: SangeethaRao sangeetha@lsi.com
---
arch/powerpc/sysdev/lsi_pci.c | 19 ++-
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/sysdev/lsi_pci.c b/arch/powerpc/sysdev/lsi_pci.c
index
From: David Mercado david.merc...@windriver.com
This patch adds PMU support to the Axxia AXM55xx platform. Note that
on this platform, all PMU IRQ lines are OR'ed together into a single
IRQ, and therefore, this implementation uses a rotating IRQ affinity
scheme to deal with it.
Signed-off-by:
From: Anders Berg anders.b...@lsi.com
commit a5d5f7daa744b34477c4a12728bde0a1694a1707 upstream
The memory regions which are passed to arm_add_memory() from
device tree blobs via early_init_dt_add_memory_arch() can
have sizes which are larger than will fit in a 32 bit integer,
so switch to using
From: John Jacques john.jacq...@lsi.com
The latest boot loader updates the frequency of the clocks in the
device tree; it expects there to be a place to put them.
Fix the device trees for ACP and AXM platforms such that the compatible
field uses the form manufacturer,model.
Signed-off-by: John
From: SangeethaRao sangeetha@lsi.com
Fixed the DTS to have correct entries and updated USB driver
to exclude 55xx relevant code from PPC build
drivers/usb: added a new ehci halt function
New halt function halts the EHCI controller.
This is to be called during startup since spinlocks are not
From: John Jacques john.jacq...@lsi.com
commit 32dda05f4ec2b854b594bd91590c46c5197d77e1 upstream
Otherwise, we get a debug traceback due to the use of
smp_processor_id() (or get_paca()) inside hard_smp_processor_id().
mpic_host_map() is just looking for a default CPU, so it doesn't
From: Anders Berg anders.b...@lsi.com
Add support for the I2C_M_RECV_LEN flag to enable SMBus block data transfers.
scripts/setlocalversion strips out the tag if there is a match
since the Linux version is in Makefile. Without the tag information,
there is no way to get back to the specific tag
From: John Jacques john.jacq...@lsi.com
These functions were temporary. They were added to allow
development to continue on an external module that was not,
at the time, released under the GPL.
Signed-off-by: John Jacques john.jacq...@lsi.com
Signed-off-by: Paul Butler paul.but...@windriver.com
From: Michael Bringmann michael.bringm...@lsi.com
Add additional spinlocks/mutexes to each controller state to increase
concurrency and performance. Fix some bound checks for full outbound
DME descriptor chains, correct a lockup/delay issue with errors in the
outbound DME chains, and remove a
From: SangeethaRao sangeetha@lsi.com
This patch removes the power of 2 size restriction
for PCIe inbound mapping in LSI PCIe driver
Signed-off-by: SangeethaRao sangeetha@lsi.com
---
arch/powerpc/sysdev/lsi_pci.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
From: John Jacques john.jacq...@lsi.com
Added code to support the UART on the 3500 board
Signed-off-by: John Jacques john.jacq...@lsi.com
---
drivers/tty/serial/lsi_acp_serial.c | 94 +++
1 file changed, 51 insertions(+), 43 deletions(-)
diff --git
From: David Mercado david.merc...@windriver.com
Fix irq_set_affinity() to allow usage of buslocks with slow bus
IRQ controllers, such as the LSI Axxia GIC.
Signed-off-by: David Mercado david.merc...@windriver.com
---
kernel/irq/manage.c |6 +++---
1 file changed, 3 insertions(+), 3
From: John Jacques john.jacq...@lsi.com
Signed-off-by: John Jacques john.jacq...@lsi.com
---
arch/powerpc/boot/dts/acp25xx.dts |2 +-
arch/powerpc/boot/dts/acp342x.dts |2 +-
arch/powerpc/boot/dts/acp344x.dts |2 +-
arch/powerpc/boot/dts/acp35xx.dts |2 +-
4 files changed, 4
From: John Jacques john.jacq...@lsi.com
If NAND is enabled and the board is 3500 then
gracefully exit with the error message
NAND not compatible with 3500
Signed-off-by: John Jacques john.jacq...@lsi.com
---
drivers/mtd/nand/lsi_acp_nand.c |9 -
1 file changed, 8 insertions(+), 1
From: SangeethaRao sangeetha@lsi.com
This patch adds i2c support for the 3500 board
Signed-off-by: SangeethaRao sangeetha@lsi.com
---
drivers/i2c/busses/i2c-axxia.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-axxia.c
From: Anders Berg anders.b...@lsi.com
Added missing 'bus' property to the I2C device tree nodes (simulation dts
files). This is needed to get the I2C adapters numbered starting with 0.
Signed-off-by: Anders Berg anders.b...@lsi.com
---
arch/arm/boot/dts/axm55xxsim.dts | 24
From: David Mercado david.merc...@windriver.com
The AXM55xx has the PMU IRQ lines from each core in a cluster OR'ed
together. As a workaround for this, a PMU handler extension was created
in the BSP to dynamically call irq_set_affinity() to rotate the PMU IRQ
assignment as needed, in order to
From: Paul Butler paul.but...@windriver.com
- Added the RapidIO management options
- Added the rio device to the axm55xx
- Created the rio architecture support for arm
- Added a file to support the RAPIDIO Bus registration
Signed-off-by: Paul Butler paul.but...@windriver.com
---
From: Paul Butler paul.but...@windriver.com
Add the rapidio device to the powerpc tree
Add the rapidio support for the powerpc 44x lsi board
Signed-off-by: Paul Butler paul.but...@windriver.com
---
arch/powerpc/boot/dts/lsi_acp342x.dts | 317 +
These patches have the comments added to the rapidio patches
Anders Berg (7):
axxia: Fixed earlyprintk
axxia: Define arch_is_coherent()
ARM: 7465/1: Handle 4GB memory sizes in device tree and
mem=size@start option
ARM: LPAE: use phys_addr_t in alloc_init_pud()
ARM: 7499/1: mm: Fix
From: Paul Butler paul.but...@windriver.com
This patch adds the register definitions,
support for PW messages, destination IDs, direct IO and
driver support.
Signed-off-by: Paul Butler paul.but...@windriver.com
---
include/asm-generic/vmlinux.lds.h | 10 ++
include/linux/rio.h |
From: Paul Butler paul.but...@windriver.com
Add the rapidio device to the powerpc tree
Add the rapidio support for the powerpc 44x lsi board
Signed-off-by: Paul Butler paul.but...@windriver.com
---
arch/powerpc/boot/dts/lsi_acp342x.dts | 317 +
From: David Mercado david.merc...@windriver.com
By default, the system does not enable the use of ARM wfe/sev instructions
across clusters, which breaks things like arch_spin_lock. This patch enables
this feature.
LSI AXM55xx: Disable use of wfe/sev in arch_spin_lock
By default, the system does
From: Anders Berg anders.b...@lsi.com
By defining arch_is_coherent() == 1, we can avoid unnecessary cache maintenance
operations and the dma_alloc_coherent() will return normal memory.
Signed-off-by: Anders Berg anders.b...@lsi.com
---
arch/arm/Kconfig |1 +
From: Anders Berg anders.b...@lsi.com
commit a5d5f7daa744b34477c4a12728bde0a1694a1707 upstream
The memory regions which are passed to arm_add_memory() from
device tree blobs via early_init_dt_add_memory_arch() can
have sizes which are larger than will fit in a 32 bit integer,
so switch to using
From: John Jacques john.jacq...@lsi.com
As procfs shouldn't be used as a module to user interface,
switch to sysfs.
Signed-off-by: John Jacques john.jacq...@lsi.com
---
arch/arm/mach-axxia/Makefile |1 +
arch/arm/mach-axxia/axxia.c|3 +
From: Anders Berg anders.b...@lsi.com
commit 36418c516b31bff4ff949c7c618430a1a514debe upstream
With !HIGHMEM, sanity_check_meminfo checks for banks that completely or
partially overlap the vmalloc region. The test for partial overlap checks
__va(bank-start + bank-size) vmalloc_min. This
From: SangeethaRao sangeetha@lsi.com
Signed-off-by: SangeethaRao sangeetha@lsi.com
---
arch/powerpc/sysdev/lsi_pci.c | 19 ++-
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/sysdev/lsi_pci.c b/arch/powerpc/sysdev/lsi_pci.c
index
From: Anders Berg anders.b...@lsi.com
This patch fixes the checkpatch issues with mmu. This patch
is separate to keep the continuity of the previous patches
that used copies of upstream patches to update.
Signed-off-by: Anders Berg anders.b...@lsi.com
---
arch/arm/mm/mmu.c | 76
From: David Mercado david.merc...@windriver.com
This patch adds PMU support to the Axxia AXM55xx platform. Note that
on this platform, all PMU IRQ lines are OR'ed together into a single
IRQ, and therefore, this implementation uses a rotating IRQ affinity
scheme to deal with it.
Signed-off-by:
From: Paul Butler paul.but...@windriver.com
BASE_ADDR1 register
Updated PCIe driver to set PCIe BASE_ADDR1 register to 0x0 without
which PCIe inbound access wasn't working and we were seeing several
suprious PEI interrupts including BAR mismatch interrupt.
Signed-off-by: SangeethaRao
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