From: Mika Westerberg
commit f919dde0772a894c693a1eeabc77df69d6a9b937 upstream.
Add Intel Cannon Lake PCH-H PCI ID to the list of supported controllers.
Signed-off-by: Mika Westerberg
Signed-off-by: Tejun Heo
From: Richard Gong
commit 7a65576dc07aa8287ce534f765dc560452a33047 from
https://github.com/altera-opensource/linux-socfpga.git
Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard
processor system (HPS) and Secure Device Manager (SDM). SDM is the
From: Alan Tull
commit f23d6e6af94255188e7f21c509bdd41bb2f86b5e from
https://github.com/altera-opensource/linux-socfpga.git
Add 'static' for struct custom_font custom_fonts[]
Signed-off-by: Alan Tull
Signed-off-by: Meng Li
---
From: Dinh Nguyen
commit 61bf26dad85b85cc44e2dfef1d26897e167aeaae from
https://github.com/altera-opensource/linux-socfpga.git
This reverts commit e6c041984533 ("FogBugz #491251: temporary remove
PSCI node")
U-Boot has implemented PSCI which is preferable to the
From: Thor Thayer
commit 1f10cc4ddb2718339ee83108dae5edf693047adf from
https://github.com/altera-opensource/linux-socfpga.git
[backport 'commit 51edd22628ea ("FogBugz #514871-2: arm64:
dts: stratix10: fix SPI settings")']
Correct the SPI Master node settings.
From: Thor Thayer
commit c3d8a24d4cae45f0240e82f007de2286bb4e8071 from
https://github.com/altera-opensource/linux-socfpga.git
The A10 System Resource HWMON needs to be updated to fit the
newer hwmon register calls. Update the copyright and date
as part of this
From: Richard Gong
commit e91ddfa8fdd37a816173fe1575dee0ee1ac1c07d from
https://github.com/altera-opensource/linux-socfpga.git
Add a device tree binding for the Intel Stratix10 service layer driver
Signed-off-by: Richard Gong
Signed-off-by:
From: Thor Thayer
commit b899ea69f0346f24ef238bcb248bde51dc639ea2 from
https://github.com/altera-opensource/linux-socfpga.git
The buffer calls need to be more secure so pass the buffer size
in the sprintf functions. Limit buffer size to 5.
Signed-off-by: Thor
From: Richard Gong
commit 90ca1efa1790ba4d8b991bb39e65e3cd17f3217b from
https://github.com/altera-opensource/linux-socfpga.git
Add Intel Stratix10 service layer to the device tree
Signed-off-by: Richard Gong
Signed-off-by: Meng Li
From: Alan Tull
commit 7aa834b3a6243499400131ba0a52291700d5449c from
https://github.com/altera-opensource/linux-socfpga.git
Add a Device Tree binding for the Intel Stratix10 SoC FPGA manager.
Signed-off-by: Alan Tull
Signed-off-by: Meng Li
From: Thor Thayer
commit cec25d893ded8f9d618a1b1fb8767d46302a247b from
https://github.com/altera-opensource/linux-socfpga.git
Add the Altera Arria10 Devkit power supply alarms.
[backport 'commit c5c3b0edeffe ("FogBugz #411698-4: socfpga: dts:
From: Thor Thayer
commit f6ea55a141f4596ee406264f7fce57155b444e0e from
https://github.com/altera-opensource/linux-socfpga.git
Add HWMON to the A10 System Resource Multi-Function Device.
This fixes a previous patch
['commit b5678c1b894d ("FogBugz #411698-2: Add
From: Limeng
Hi Bruce,
Now, there are some update for intel-socfpga, Stratix10 SoC from SDK.
There are some primary features update as below:
- cpu on with PSCI function
- reboot support
- watchdog support
- update FPGA configure in Linux in real time via FPGA manager.
From: Dinh Nguyen
commit bf2f49493b4e7d8783171d7ba1e1f24bed921594 from
https://github.com/altera-opensource/linux-socfpga.git
This reverts commit ba759bf25bc5 ("FogBugz #488851: dts: use
spin-table for SMP")
U-Boot has implemented PSCI which is preferable to the
From: Alan Tull
commit b58ce5668a694f24196614aad69c338967d9eb8b from
https://github.com/altera-opensource/linux-socfpga.git
Two Klocwork complaints fixed:
/home/yves/linux/intel/linux-socfpga/drivers/tty/newhaven_lcd.c:404 --
-- SV.BANNED.REQUIRED.SPRINTF (4:Review) Analyze
From: Alan Tull
commit 951b5ec06c6620d6267fe5edb4a2c7bdb5f4cde5 from
https://github.com/altera-opensource/linux-socfpga.git
Add driver for reconfiguring Intel Stratix10 SoC FPGA devices.
This driver communicates through the Intel Service Driver which
does communication with
From: Dinh Nguyen
commit 31423994dd0df04b38022b47330146c8990891c8 from
https://github.com/altera-opensource/linux-socfpga.git
Fix potential memory leaks in the Stratix10 clock driver by freeing the
struct pointer for error conditions.
Remove 'reg2' variable, which was
From: Alan Tull
commit f625bc5635d156f683d95077267484ce7554b5b6 from
https://github.com/altera-opensource/linux-socfpga.git
Klocwork give the following complaints:
/home/yves/linux/intel/linux-socfpga/drivers/fpga/fpga-bridge.c:243 --
-- SV.BANNED.REQUIRED.SPRINTF (4:Review)
From: Geert Uytterhoeven
commit ed1eb10b8dd43ea1447e5adc47bcd52ddc3b5c25 from
https://github.com/altera-opensource/linux-socfpga.git
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Meng Li
---
scripts/Makefile.lib |
From: Dinh Nguyen
commit 1752cc0adb37e96e79a8ce8189dbd8d53016a224 from
https://github.com/altera-opensource/linux-socfpga.git
Disable the USB overcurrent condition that is falsely detected on the
devkit.
Signed-off-by: Dinh Nguyen
Signed-off-by: Meng
From: Dinh Nguyen
commit b002bf552cb779951ca843a058545dc146989270 from
https://github.com/altera-opensource/linux-socfpga.git
Populate the clocks property in the watchdog timers on Stratix10.
Signed-off-by: Dinh Nguyen
Signed-off-by: Meng Li
From: Alan Tull
commit 62b87db13758408968d1979be70e673873346415 from
https://github.com/altera-opensource/linux-socfpga.git
This reverts commit fe94677b6e60189ee0e4dbace1ce81c66c2053c5.
Signed-off-by: Meng Li
---
arch/arm/boot/Makefile |4
From: Alan Tull
commit 29f99105e4186ba4a88fea2b54b5f6fc91b9912e from
https://github.com/altera-opensource/linux-socfpga.git
Add the Stratix10 FPGA manager and a FPGA region to the
device tree.
Signed-off-by: Alan Tull
Signed-off-by: Meng Li
From: Richard Gong
commit f1835b2b7aa23cc1b47c178a3eb414eaf58fde63 from
https://github.com/altera-opensource/linux-socfpga.git
Firmware from the latest Quartus releases takes more time to process
data. As a result service layer needs increase timeout value so it can
From: Limeng
Add a overlay to implement updating FPGA congifure in Linux
enviroment in real time via Stratix 10 FPGA manager.
Signed-off-by: Meng Li
---
arch/arm64/boot/dts/altera/Makefile|2 +-
From: Dinh Nguyen
commit 07ecc72ce169d4a4e11259067a714e31d6acd400 from
https://github.com/altera-opensource/linux-socfpga.git
Enables the watchdog0 timer on the Stratix10 devkit.
Signed-off-by: Dinh Nguyen
Conflicts:
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