From: Jay Jayatheerthan <jay.jayatheert...@lsi.com>
Signed-off-by: Jay Jayatheerthan <jay.jayatheert...@lsi.com>
---
drivers/net/ethernet/lsi/lsi_acp_mdio.c | 190 ++++++++++++++++----------------
1 file changed, 94 insertions(+), 96 deletions(-)
mode change 100644 => 100755 drivers/net/ethernet/lsi/lsi_acp_mdio.c
diff --git a/drivers/net/ethernet/lsi/lsi_acp_mdio.c
b/drivers/net/ethernet/lsi/lsi_acp_mdio.c
old mode 100644
new mode 100755
index 739f34c..08a2b6a
--- a/drivers/net/ethernet/lsi/lsi_acp_mdio.c
+++ b/drivers/net/ethernet/lsi/lsi_acp_mdio.c
@@ -77,53 +77,52 @@ acp_mdio_read(unsigned long address, unsigned long offset,
WRITE(MDIO_STATUS_RD_DATA, status);
#endif /* BZ33327_WA */
- if(clause45 == 0) {
- /* Write the command. */
- command |= 0x10000000; /* op_code: read */
- command |= (address & 0x1f) << 16; /* port_addr (target device) */
- command |= (offset & 0x1f) << 21;/* device_addr (target register) */
- WRITE(MDIO_CONTROL_RD_DATA, command);
- } else {
- /*
- * Step 1: Write the address.
- */
-
- /* Write the address */
- command |= 0x20000000; /* clause_45 = 1 */
- command |= 0x00000000; /* op_code: write */
- command |= 0x04000000; /* interface_select = 1 */
- command |= ((offset & 0x001f0000) >> 3); /* device_addr (target
device_type) */
- command |= (address & 0x1f) << 16; /* port_addr (target device) */
- command |= (offset & 0xffff); /* addr_or_data (target register)
*/
- WRITE(MDIO_CONTROL_RD_DATA, command);
-
- /* Wait for the mdio_busy (status) bit to clear. */
- do {
- status = READ(MDIO_STATUS_RD_DATA);
- } while (0 != (status & 0x40000000));
-
- /* Wait for the mdio_busy (control) bit to clear. */
- do {
- command = READ(MDIO_CONTROL_RD_DATA);
- } while (0 != (command & 0x80000000));
-
- /*
- * Step 2: Read the value.
- */
-
- /* Set the mdio_busy (status) bit. */
- status = READ(MDIO_STATUS_RD_DATA);
- status |= 0x40000000;
- WRITE(MDIO_STATUS_RD_DATA, status);
-
- command = 0;
- command |= 0x20000000; /* clause_45 = 1 */
- command |= 0x10000000; /* op_code: read */
- command |= 0x04000000; /* interface_select = 1 */
- command |= ((offset & 0x001f0000) >> 3); /* device_addr (target
device_type) */
- command |= (address & 0x1f) << 16; /* port_addr (target device) */
- WRITE(MDIO_CONTROL_RD_DATA, command);
- }
+ if (clause45 == 0) {
+ /* Write the command. */
+ command = 0x10000000; /* op_code: read */
+ command |= (address & 0x1f) << 16; /* port_addr (target
device) */
+ command |= (offset & 0x1f) << 21;/* device_addr (target
register) */
+ WRITE(MDIO_CONTROL_RD_DATA, command);
+ } else {
+ /*
+ * Step 1: Write the address.
+ */
+
+ /* Write the address */
+ command = 0x20000000; /* clause_45 = 1 */
+ command |= 0x00000000; /* op_code: 0 */
+ command |= 0x04000000; /* interface_select = 1 */
+ command |= ((offset & 0x1f000000) >> 3); /* device_addr (target
device_type) */
+ command |= (address & 0x1f) << 16; /* port_addr (target device)
*/
+ command |= (offset & 0xffff); /* addr_or_data (target register)
*/
+ WRITE(MDIO_CONTROL_RD_DATA, command);
+
+ /* Wait for the mdio_busy (status) bit to clear. */
+ do {
+ status = READ(MDIO_STATUS_RD_DATA);
+ } while (0 != (status & 0x40000000));
+
+ /* Wait for the mdio_busy (control) bit to clear. */
+ do {
+ command = READ(MDIO_CONTROL_RD_DATA);
+ } while (0 != (command & 0x80000000));
+
+ /*
+ * Step 2: Read the value.
+ */
+
+ /* Set the mdio_busy (status) bit. */
+ status = READ(MDIO_STATUS_RD_DATA);
+ status |= 0x40000000;
+ WRITE(MDIO_STATUS_RD_DATA, status);
+
+ command = 0x20000000; /* clause_45 = 1 */
+ command |= 0x10000000; /* op_code: read */
+ command |= 0x04000000; /* interface_select = 1 */
+ command |= ((offset & 0x1f000000) >> 3); /* device_addr (target
device_type) */
+ command |= (address & 0x1f) << 16; /* port_addr (target device)
*/
+ WRITE(MDIO_CONTROL_RD_DATA, command);
+ }
#if defined(BZ33327_WA)
/* Wait for the mdio_busy (status) bit to clear. */
@@ -171,55 +170,54 @@ acp_mdio_write(unsigned long address, unsigned long
offset,
WRITE(MDIO_STATUS_RD_DATA, status);
#endif /* BZ33327_WA */
- if(clause45 == 0) {
- /* Write the command. */
- command = 0x08000000; /* op_code: write */
- command |= (address & 0x1f) << 16; /* port_addr (target device) */
- command |= (offset & 0x1f) << 21;/* device_addr (target register) */
- command |= (value & 0xffff); /* value */
- WRITE(MDIO_CONTROL_RD_DATA, command);
- } else {
- /*
- * Step 1: Write the address.
- */
-
- /* Write the address */
- command |= 0x20000000; /* clause_45 = 1 */
- command |= 0x08000000; /* op_code: write */
- command |= 0x04000000; /* interface_select = 1 */
- command |= ((offset & 0x001f0000) >> 3); /* device_addr (target
device_type) */
- command |= (address & 0x1f) << 16; /* port_addr (target device) */
- command |= (offset & 0xffff); /* addr_or_data (target register)
*/
- WRITE(MDIO_CONTROL_RD_DATA, command);
-
- /* Wait for the mdio_busy (status) bit to clear. */
- do {
- status = READ(MDIO_STATUS_RD_DATA);
- } while (0 != (status & 0x40000000));
-
- /* Wait for the mdio_busy (control) bit to clear. */
- do {
- command = READ(MDIO_CONTROL_RD_DATA);
- } while (0 != (command & 0x80000000));
-
- /*
- * Step 2: Write the value.
- */
-
- /* Set the mdio_busy (status) bit. */
- status = READ(MDIO_STATUS_RD_DATA);
- status |= 0x40000000;
- WRITE(MDIO_STATUS_RD_DATA, status);
-
- command = 0;
- command |= 0x20000000; /* clause_45 = 1 */
- command |= 0x08000000; /* op_code: write */
- command |= 0x04000000; /* interface_select = 1 */
- command |= ((offset & 0x001f0000) >> 3); /* device_addr (target
device_type) */
- command |= (address & 0x1f) << 16; /* port_addr (target device) */
- command |= (value & 0xffff); /* addr_or_data = value */
- WRITE(MDIO_CONTROL_RD_DATA, command);
- }
+ if (clause45 == 0) {
+ /* Write the command. */
+ command = 0x08000000; /* op_code: write */
+ command |= (address & 0x1f) << 16; /* port_addr (target
device) */
+ command |= (offset & 0x1f) << 21;/* device_addr (target
register) */
+ command |= (value & 0xffff); /* value */
+ WRITE(MDIO_CONTROL_RD_DATA, command);
+ } else {
+ /*
+ * Step 1: Write the address.
+ */
+
+ /* Write the address */
+ command = 0x20000000; /* clause_45 = 1 */
+ command |= 0x00000000; /* op_code: 0 */
+ command |= 0x04000000; /* interface_select = 1 */
+ command |= ((offset & 0x1f000000) >> 3); /* device_addr (target
device_type) */
+ command |= (address & 0x1f) << 16; /* port_addr (target device)
*/
+ command |= (offset & 0xffff); /* addr_or_data (target register)
*/
+ WRITE(MDIO_CONTROL_RD_DATA, command);
+
+ /* Wait for the mdio_busy (status) bit to clear. */
+ do {
+ status = READ(MDIO_STATUS_RD_DATA);
+ } while (0 != (status & 0x40000000));
+
+ /* Wait for the mdio_busy (control) bit to clear. */
+ do {
+ command = READ(MDIO_CONTROL_RD_DATA);
+ } while (0 != (command & 0x80000000));
+
+ /*
+ * Step 2: Write the value.
+ */
+
+ /* Set the mdio_busy (status) bit. */
+ status = READ(MDIO_STATUS_RD_DATA);
+ status |= 0x40000000;
+ WRITE(MDIO_STATUS_RD_DATA, status);
+
+ command = 0x20000000; /* clause_45 = 1 */
+ command |= 0x08000000; /* op_code: write */
+ command |= 0x04000000; /* interface_select = 1 */
+ command |= ((offset & 0x1f000000) >> 3); /* device_addr (target
device_type) */
+ command |= (address & 0x1f) << 16; /* port_addr (target device)
*/
+ command |= (value & 0xffff); /* addr_or_data = value */
+ WRITE(MDIO_CONTROL_RD_DATA, command);
+ }
#if defined(BZ33327_WA)
/* Wait for the mdio_busy (status) bit to clear. */
--
1.8.4.3
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