From: "Ooi, Joyce" <joyce....@intel.com>
commit bf0c54db1dff12fbef7aedf7538a741e78328fc7 from
https://github.com/altera-opensource/linux-socfpga.git
The HPS EMAC0 drive strength is changed to 4mA because the initial 8mA
drive strength has caused CE test to fail. This requires changes on the
pad skew for EMAC0 PHY driver. Based on several measurements done, Tx
clock does not require the extra 0.96ns delay.
Signed-off-by: Ooi, Joyce <joyce....@intel.com>
Signed-off-by: Dinh Nguyen <dingu...@kernel.org>
Signed-off-by: Meng Li <meng...@windriver.com>
---
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
index ec18609..533b4cb 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
@@ -92,7 +92,7 @@
rxd2-skew-ps = <420>; /* 0ps */
rxd3-skew-ps = <420>; /* 0ps */
txen-skew-ps = <0>; /* -420ps */
- txc-skew-ps = <1860>; /* 960ps */
+ txc-skew-ps = <900>; /* 0ps */
rxdv-skew-ps = <420>; /* 0ps */
rxc-skew-ps = <1680>; /* 780ps */
max-frame-size = <3800>;
--
2.7.4
--
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