From: Ian Munsie imun...@au1.ibm.com
Since the boot wrapper must be built by a big endian 32bit toolchain
regardless of what the rest of the kernel is using introduce a new
parameter to specify that toolchain - CROSSBE_COMPILE.
We already have CROSS32_COMPILE which is already used for the boot
Some PowerPC processors can be run in either big or little endian modes, some
others can map selected pages of memory as little endian, which allows the same
thing. Until now we have only supported the default big endian mode in Linux.
This patch set introduces little endian support for the 44x
From: Ian Munsie imun...@au1.ibm.com
This patch adds support to the PowerPC zImage wrapper (which always runs
in big endian mode) to detect if the zImage is little endian and parse
it's ELF header to enable it's successful extraction.
It also provides some infrastructure for executing a little
From: Ian Munsie imun...@au1.ibm.com
With the little endian PowerPC Linux port, the CPU could be in either
mode. Rather than byte swapping and mapping the little endian bitmap
operations ourselves on the assumption that we are big endian, map them
to the generic macros that will automatically
From: Ian Munsie imun...@au1.ibm.com
The endianness on the 44x CPUs is controlled by the E bit in the TLB
entries. If the kernel has been compiled for little endian this patch
sets this E bit wherever they are set - in the PTE base flags, the early
debugging, and TLB pinning.
It defines some
From: Ian Munsie imun...@au1.ibm.com
This patch will have powerpc include the appropriate generic endianness
header depending on what the compiler reports.
Signed-off-by: Ian Munsie imun...@au1.ibm.com
---
arch/powerpc/include/asm/byteorder.h |4
1 files changed, 4 insertions(+), 0
From: Ian Munsie imun...@au1.ibm.com
On the 44x we use 64bit page table entries, but the CPU is only 32bit.
When a PTE is loaded during a TLB miss each half is loaded into
different registers, so we need to reverse the offsets if the CPU is
running in little endian mode.
Signed-off-by: Ian
From: Ian Munsie imun...@au1.ibm.com
On PowerPC the device tree is always big endian, but the CPU could be
either, so add be32_to_cpu where appropriate and change the types of
device tree data to __be32 etc to allow sparse to locate endian issues.
Signed-off-by: Ian Munsie imun...@au1.ibm.com
From: Ian Munsie imun...@au1.ibm.com
The speed and clock of the serial ports is retrieved from the device
tree in both the PowerPC legacy serial code and the Open Firmware serial
driver, therefore they need to handle the fact that the device tree is
always big endian, while the CPU may not be.
From: Ian Munsie imun...@au1.ibm.com
The Device Control Register accesses parse the device tree and therefore
need to handle the possible differences of endianness between the CPU
and device tree.
Signed-off-by: Ian Munsie imun...@au1.ibm.com
---
arch/powerpc/sysdev/dcr.c| 18
From: Ian Munsie imun...@au1.ibm.com
This patch reverses the order of the high and low bits in the alignment
handler on little endian, which should be enough to fix any alignment
exceptions.
Please note that this patch is largely untested.
Signed-off-by: Ian Munsie imun...@au1.ibm.com
---
From: Ian Munsie imun...@au1.ibm.com
This patch adds the appropriate conversions to correct the endianness
issues in the MTD driver whenever it accesses the device tree (which is
always big endian).
Signed-off-by: Ian Munsie imun...@au1.ibm.com
---
drivers/mtd/maps/physmap_of.c | 14
From: Ian Munsie imun...@au1.ibm.com
This patch fixes all the device tree and ring buffer accesses in the IBM
newemac driver.
Signed-off-by: Ian Munsie imun...@au1.ibm.com
---
drivers/net/ibm_newemac/core.c | 68
drivers/net/ibm_newemac/mal.c |6
From: Ian Munsie imun...@au1.ibm.com
The vmlinux linker script sets the jiffies variable to the low word of
the jiffies_64 variable. This patch corrects which word is used on
little endian.
Signed-off-by: Ian Munsie imun...@au1.ibm.com
---
arch/powerpc/kernel/vmlinux.lds.S |4
1 files
Excerpts from Geert Uytterhoeven's message of Fri Oct 01 17:13:19 +1000 2010:
Shouldn't the help text added by [PATCH 01/18]:
be updated here as well?
Yep, you're right. Thanks for pointing that out, I'll fix it for the next
revision.
Cheers,
-Ian
On Oct 1, 2010, at 2:05 AM, Ian Munsie wrote:
diff --git a/arch/powerpc/platforms/Kconfig.cputype
b/arch/powerpc/platforms/Kconfig.cputype
index d361f81..074ff12 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -329,3 +329,19 @@ config
Hello Mingkai,
There are mostly cosmetic comments down below.
On Thu, Sep 30, 2010 at 04:00:42PM +0800, Mingkai Hu wrote:
[...]
+/*
+ * Freescale eSPI controller driver.
+ *
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it
On Thu, Sep 30, 2010 at 04:00:41PM +0800, Mingkai Hu wrote:
[...]
-static void mpc8xxx_spi_change_mode(struct spi_device *spi)
+static void fsl_spi_change_mode(struct spi_device *spi)
{
struct mpc8xxx_spi *mspi = spi_master_get_devdata(spi-master);
struct spi_mpc8xxx_cs *cs =
On Fri, Oct 1, 2010 at 3:05 AM, Ian Munsie imun...@au1.ibm.com wrote:
From: Ian Munsie imun...@au1.ibm.com
I haven't tested booting a little endian kernel on any of these targets,
but they all claim to be 44x so my little endian trampoline should work
on all of them, so wire it up on:
On Fri, Oct 1, 2010 at 5:18 AM, Kumar Gala ga...@kernel.crashing.org wrote:
On Oct 1, 2010, at 2:05 AM, Ian Munsie wrote:
diff --git a/arch/powerpc/platforms/Kconfig.cputype
b/arch/powerpc/platforms/Kconfig.cputype
index d361f81..074ff12 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
On Fri, Oct 1, 2010 at 5:02 AM, Kumar Gala ga...@kernel.crashing.org wrote:
On Oct 1, 2010, at 2:05 AM, Ian Munsie wrote:
Some PowerPC processors can be run in either big or little endian modes, some
others can map selected pages of memory as little endian, which allows the
same
thing.
On Fri, Oct 1, 2010 at 3:05 AM, Ian Munsie imun...@au1.ibm.com wrote:
This patch set in combination with a patched GCC, binutils, uClibc and
buildroot has allowed for a full proof of concept little endian environment on
a 440 Taishan board, which was able to successfully run busybox, OpenSSH
On Fri, Oct 1, 2010 at 3:05 AM, Ian Munsie imun...@au1.ibm.com wrote:
diff --git a/arch/powerpc/platforms/Kconfig.cputype
b/arch/powerpc/platforms/Kconfig.cputype
index d361f81..074ff12 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@
On 10/01/2010 05:30 AM, Josh Boyer wrote:
On Fri, Oct 1, 2010 at 5:02 AM, Kumar Galaga...@kernel.crashing.org wrote:
On Oct 1, 2010, at 2:05 AM, Ian Munsie wrote:
Some PowerPC processors can be run in either big or little endian modes, some
others can map selected pages of memory as little
On Fri, 2010-10-01 at 07:28 -0400, Josh Boyer wrote:
Shouldn't we have something that limits to the sub-arch'es that
actually support it? I doubt I'm ever going to make FSL-Book-e
support LE.
Yes, it should.
Sure, that's only WIP patches :-)
Tho FSL BookE would be relatively easy...
On Fri, 2010-10-01 at 07:30 -0400, Josh Boyer wrote:
From a community aspect is anyone actually going to use this? Is
this going to be the equivalent of voyager on x86? I've got nothing
against some of the endian clean ups this introduces. However the
changes to misc_32.S are a bit ugly
On Fri, 2010-10-01 at 07:36 -0400, Josh Boyer wrote:
On Fri, Oct 1, 2010 at 3:05 AM, Ian Munsie imun...@au1.ibm.com wrote:
This patch set in combination with a patched GCC, binutils, uClibc and
buildroot has allowed for a full proof of concept little endian environment
on
a 440 Taishan
On Fri, 2010-10-01 at 07:40 -0400, Josh Boyer wrote:
Have you tested this support with a userspace containing floating
point instructions? I wonder if CONFIG_MATH_EMULATION is going to
need work at all, and if the boards with an actual FPU (440EP, 440EPx,
460EX, etc) would have issues.
On 10/01/2010 06:15 AM, Benjamin Herrenschmidt wrote:
On Fri, 2010-10-01 at 05:55 -0600, Gary Thomas wrote:
On 10/01/2010 05:30 AM, Josh Boyer wrote:
On Fri, Oct 1, 2010 at 5:02 AM, Kumar Galaga...@kernel.crashing.org wrote:
On Oct 1, 2010, at 2:05 AM, Ian Munsie wrote:
Some PowerPC
On Fre, 2010-10-01 at 22:14 +1000, Benjamin Herrenschmidt wrote:
Now, the main reasons in practice are anything touching graphics.
There's quite a few IP cores out there for SoCs that don't have HW
swappers, and -tons- of more or less ugly code that can't deal with non
native pixel
On Oct 1, 2010, at 7:14 AM, Benjamin Herrenschmidt wrote:
On Fri, 2010-10-01 at 07:30 -0400, Josh Boyer wrote:
From a community aspect is anyone actually going to use this? Is
this going to be the equivalent of voyager on x86? I've got nothing
against some of the endian clean ups this
This set of patches decouples the concept that a single memory
section corresponds to a single directory in
/sys/devices/system/memory/. On systems
with large amounts of memory (1+ TB) there are performance issues
related to creating the large number of sysfs directories. For
a powerpc machine
Move the find_memory_block() routine up to avoid needing a forward
declaration in subsequent patches.
Signed-off-by: Nathan Fontenot nf...@austin.ibm.com
---
drivers/base/memory.c | 62 +-
1 file changed, 31 insertions(+), 31 deletions(-)
Add a new mutex for use in adding and removing of memory blocks. This
is needed to avoid any race conditions in which the same memory block could
be added and removed at the same time.
Signed-off-by: Nathan Fontenot nf...@austin.ibm.com
---
drivers/base/memory.c |7 +++
1 file changed,
Add a section count property to the memory_block struct to track the number
of memory sections that have been added/removed from a memory block. This
allows us to know when the last memory section of a memory block has been
removed so we can remove the memory block.
Signed-off-by: Nathan Fontenot
Update the memory sysfs code such that each sysfs memory directory is now
considered a memory block that can span multiple memory sections per
memory block. The default size of each memory block is SECTION_SIZE_BITS
to maintain the current behavior of having a single memory section per
memory
Update the 'phys_index' property of a the memory_block struct to be
called start_section_nr, and add a end_section_nr property. The
data tracked here is the same but the updated naming is more in line
with what is stored here, namely the first and last section number
that the memory block spans.
Update the node sysfs code to be aware of the new capability for a memory
block to contain multiple memory sections and be aware of the memory block
structure name changes (start_section_nr). This requires an additional
parameter to unregister_mem_sect_under_nodes so that we know which memory
Define a version of memory_block_size_bytes() for powerpc/pseries such that
a memory block spans an entire lmb.
Signed-off-by: Nathan Fontenot nf...@austin.ibm.com
---
arch/powerpc/platforms/pseries/hotplug-memory.c | 66 +++-
1 file changed, 53 insertions(+), 13
Define a version of memory_block_size_bytes for x86_64 when CONFIG_X86_UV is
set.
Signed-off-by: Robin Holt h...@sgi.com
Signed-off-by: Jack Steiner stei...@sgi.com
---
arch/x86/mm/init_64.c | 14 ++
1 file changed, 14 insertions(+)
Index: linux-next/arch/x86/mm/init_64.c
Update the memory hotplug documentation to reflect the new behaviors of
memory blocks reflected in sysfs.
Signed-off-by: Nathan Fontenot nf...@austin.ibm.com
---
Documentation/memory-hotplug.txt | 47 +--
1 file changed, 31 insertions(+), 16 deletions(-)
On Fri, Oct 01, 2010 at 01:29:42PM -0500, Nathan Fontenot wrote:
Add a new mutex for use in adding and removing of memory blocks. This
is needed to avoid any race conditions in which the same memory block could
be added and removed at the same time.
Signed-off-by: Nathan Fontenot
On Fri, Oct 01, 2010 at 01:28:39PM -0500, Nathan Fontenot wrote:
Move the find_memory_block() routine up to avoid needing a forward
declaration in subsequent patches.
Signed-off-by: Nathan Fontenot nf...@austin.ibm.com
Reviewed-by: Robin Holt h...@sgi.com
On Fri, Oct 01, 2010 at 01:30:40PM -0500, Nathan Fontenot wrote:
Add a section count property to the memory_block struct to track the number
of memory sections that have been added/removed from a memory block. This
allows us to know when the last memory section of a memory block has been
On Fri, Oct 01, 2010 at 01:33:38PM -0500, Nathan Fontenot wrote:
Update the 'phys_index' property of a the memory_block struct to be
called start_section_nr, and add a end_section_nr property. The
data tracked here is the same but the updated naming is more in line
with what is stored here,
On 10/01/2010 01:52 PM, Robin Holt wrote:
On Fri, Oct 01, 2010 at 01:31:51PM -0500, Nathan Fontenot wrote:
Update the memory sysfs code such that each sysfs memory directory is now
considered a memory block that can span multiple memory sections per
memory block. The default size of each
On Fri, Oct 01, 2010 at 01:37:05PM -0500, Nathan Fontenot wrote:
Define a version of memory_block_size_bytes for x86_64 when CONFIG_X86_UV is
set.
Signed-off-by: Robin Holt h...@sgi.com
Signed-off-by: Jack Steiner stei...@sgi.com
I think this technically needs a Signed-off-by: you since you
On Fri, Oct 01, 2010 at 01:37:49PM -0500, Nathan Fontenot wrote:
Update the memory hotplug documentation to reflect the new behaviors of
memory blocks reflected in sysfs.
Signed-off-by: Nathan Fontenot nf...@austin.ibm.com
Reviewed-by: Robin Holt h...@sgi.com
Update the memory sysfs code such that each sysfs memory directory is now
considered a memory block that can span multiple memory sections per
memory block. The default size of each memory block is SECTION_SIZE_BITS
to maintain the current behavior of having a single memory section per
memory
On Fri, Oct 01, 2010 at 01:31:51PM -0500, Nathan Fontenot wrote:
Update the memory sysfs code such that each sysfs memory directory is now
considered a memory block that can span multiple memory sections per
memory block. The default size of each memory block is SECTION_SIZE_BITS
to maintain
On Fri, Oct 01, 2010 at 01:35:54PM -0500, Nathan Fontenot wrote:
Define a version of memory_block_size_bytes() for powerpc/pseries such that
a memory block spans an entire lmb.
Signed-off-by: Nathan Fontenot nf...@austin.ibm.com
Reviewed-by: Robin Holt h...@sgi.com
On Fri, Oct 01, 2010 at 01:34:34PM -0500, Nathan Fontenot wrote:
Update the node sysfs code to be aware of the new capability for a memory
block to contain multiple memory sections and be aware of the memory block
structure name changes (start_section_nr). This requires an additional
On Fri, Oct 01, 2010 at 02:00:50PM -0500, Nathan Fontenot wrote:
Update the memory sysfs code such that each sysfs memory directory is now
considered a memory block that can span multiple memory sections per
memory block. The default size of each memory block is SECTION_SIZE_BITS
to maintain
On Fri, 2010-10-01 at 17:06 +1000, Ian Munsie wrote:
From: Ian Munsie imun...@au1.ibm.com
This patch adds the appropriate conversions to correct the endianness
issues in the MTD driver whenever it accesses the device tree (which is
always big endian).
Signed-off-by: Ian Munsie
RapidIO spec v.2.1 adds Idle Sequence 2 into LP-Serial Physical
Layer. The fix ensures that corresponding bits are not corrupted during
error handling.
Signed-off-by: Alexandre Bounine alexandre.boun...@idt.com
Cc: Thomas Moll thomas.m...@sysgo.com
Cc: Matt Porter mpor...@kernel.crashing.org
Cc:
On Fri, 2010-10-01 at 12:59 -0500, Kumar Gala wrote:
I'm not against it, and I agree some of the patches seem like good
clean up. I'm concerned about this bit rotting pretty quickly.
Maybe. Most of it doesn't seem to be that bit-rottable.
The changes to the asm stuff in misc_32.S for example
From: FUJITA Tomonori fujita.tomon...@lab.ntt.co.jp
Signed-off-by: FUJITA Tomonori fujita.tomon...@lab.ntt.co.jp
Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
Signed-off-by: Andrew Morton a...@linux-foundation.org
---
arch/powerpc/Kconfig |3 +++
1 file changed, 3 insertions(+)
diff
We have received reports on power systems not running irqbalance where
all interrupts are being routed to CPU0 rather than being interleaved by
default across the system. Current firmware only allows either sending
interrupts to all CPUs or sending them to one CPU. The following two
patches
Current firmware only allows us to send IRQs to the first processor or
all processors. We currently check to see if the passed in mask is equal
to the all_mask, but the firmware is only considering whether the
request is for the equivalent of the possible_mask. Thus, we think the
request is for
On Sat, Oct 02, 2010 at 06:51:55AM +1000, Benjamin Herrenschmidt wrote:
On Fri, 2010-10-01 at 12:59 -0500, Kumar Gala wrote:
I'm not against it, and I agree some of the patches seem like good
clean up. I'm concerned about this bit rotting pretty quickly.
Maybe. Most of it doesn't seem to
In message: alpine.deb.2.00.1009271035110.9...@router.home
Christoph Lameter c...@linux.com writes:
: On Thu, 23 Sep 2010, Christian Riesch wrote:
:
:It implies clock tuning in userspace for a potential sub microsecond
:accurate clock. The clock accuracy will be limited by
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