D3-cold state indicates removal of the clock and power. however auxiliary (AUX)
Power may remain available even after the main power rails are powered down.
wakeup from D3-cold state requires full context restore. Other things are taken
care in pci-driver except ATMUs.
ATMU windows needs to be
Create the dts files for each core and splits the devices between the two cores
for P1020RDB.
Core0 has core0 to have memory, l2, i2c, spi, gpio, tdm, dma, usb, eth1, eth2,
sdhc, crypto, global-util, message, pci0, pci1, msi.
Core1 has l2, eth0, crypto.
MPIC is shared between two cores but each
Any feedback on this patch? Thanks.
On Friday, 2011-04-22 at 15:43 +0800, Lei Xu wrote:
Root complex ports for Freescale PCIe host controller only receive
interrupts, so if there is no irq setting for RC, it should not return
error, otherwise it may result the PCIe host controller is
@@ -268,9 +269,9 @@ void __init cbe_regs_init(void)
thread-regs = map;
thread-cbe_id = cbe_id;
map-be_node = thread-be_node;
- cpu_set(i, cbe_local_mask[cbe_id]);
Adapt new API.
Almost change is trivial. Most important change is the below line
because we plan to change task-cpus_allowed implementation.
- ctx-cpus_allowed = current-cpus_allowed;
Signed-off-by: KOSAKI Motohiro kosaki.motoh...@jp.fujitsu.com
Cc: Benjamin Herrenschmidt
On Thu, Apr 28, 2011 at 12:07 PM, KOSAKI Motohiro
kosaki.motoh...@jp.fujitsu.com wrote:
Adapt new API.
Almost change is trivial. Most important change is the below line
because we plan to change task-cpus_allowed implementation.
- ctx-cpus_allowed = current-cpus_allowed;
On Tue, 2011-04-26 at 12:36 +0300, Felix Radensky wrote:
This patch extends NDFC driver to support all 4 chip selects
available in NDFC NAND controller. Tested on custom 460EX board
with 2 chip select NAND device.
Signed-off-by: Felix Radensky fe...@embedded-sol.com
---
I'd appreciate
On 04/27/2011 03:51 PM, Steven A. Falco wrote:
On 04/26/2011 07:39 PM, Benjamin Herrenschmidt wrote:
On Tue, 2011-04-26 at 09:38 -0400, Steven A. Falco wrote:
On 04/25/2011 08:01 PM, Benjamin Herrenschmidt wrote:
On Mon, 2011-04-25 at 16:10 -0400, Steven A. Falco wrote:
I'm getting an error
A lot of this series ends up being fixups to powerpc code; but the 4th
patch is of importance to every architecture using CONFIG_OF (except
SPARC, which has its own solution).
This series (finally!) factors out device tree irq domain decoding
from arch/powerpc and makes it generic for all
First step in eliminating irq_map[] table entirely
Signed-off-by: Grant Likely grant.lik...@secretlab.ca
---
arch/powerpc/include/asm/irq.h | 15 +---
arch/powerpc/kernel/irq.c| 26 +++
arch/powerpc/platforms/512x/mpc5121_ads_cpld.c |4 +
irq_alloc_virt() and irq_free_virt() aren't called anywhere but from
arch/powerpc/kernel/irq.c, and they are only ever called with count=1.
This patch removes the prototypes from the header file, removes the
count arguments, and cuts out the dead code.
Also removes obsolete references to
Very few files actually need direct access to struct irq_host members.
This patch moves the irq_host definition into another file so that it
isn't brought in by default, and to prepare for the addition of
struct of_irq_domain, which will factor some of the irq_host behaviour
out into common code.
This patch creates a common implementation of irq_of_create_mapping()
and factors out the interrupt domain translation code from powerpc to
make it available for all architectures.
It creates a new structure, struct of_irq_domain, which can be
embedded into the private data structure of an
This is a stepping stone to using core code for allocating virqs
instead of the powerpc architecture specific code. A subsequent patch
will drop the algorithm that searches for a free irq and replaces it
with irq_alloc_desc()
Signed-off-by: Grant Likely grant.lik...@secretlab.ca
---
This patch drops the architecture specific code for managing irq
assignments and uses core code instead.
*RFC*
This patch is *not* ready for merging. The locking is messed up where
the irq_map is still used to find out if a mapping is already established,
but irq_alloc_desc() is now called
From: Stephen Rothwell s...@canb.auug.org.au
Date: Thu, 28 Apr 2011 12:11:24 +1000
From: =?UTF-8?q?Micha=C5=82=20Miros=C5=82aw?= mirq-li...@rere.qmqm.pl
Date: Thu, 28 Apr 2011 11:59:15 +1000
Subject: [PATCH] net: ibmveth: force reconfiguring checksum settings on
startup
MIME-Version: 1.0
On Thu, 2011-04-28 at 13:29 -0400, Steven A. Falco wrote:
On 04/27/2011 03:51 PM, Steven A. Falco wrote:
On 04/26/2011 07:39 PM, Benjamin Herrenschmidt wrote:
On Tue, 2011-04-26 at 09:38 -0400, Steven A. Falco wrote:
On 04/25/2011 08:01 PM, Benjamin Herrenschmidt wrote:
On Mon, 2011-04-25
On 04/28/2011 04:55 PM, Benjamin Herrenschmidt wrote:
On Thu, 2011-04-28 at 13:29 -0400, Steven A. Falco wrote:
On 04/27/2011 03:51 PM, Steven A. Falco wrote:
On 04/26/2011 07:39 PM, Benjamin Herrenschmidt wrote:
On Tue, 2011-04-26 at 09:38 -0400, Steven A. Falco wrote:
On 04/25/2011 08:01
On Thu, 2011-04-28 at 17:11 -0400, Steven A. Falco wrote:
It is in __dev_sort_resources() in setup-bus.c
There is this test:
/* Don't touch classless devices or host bridges or ioapics. */
if (class == PCI_CLASS_NOT_DEFINED || class == PCI_CLASS_BRIDGE_HOST)
On 04/28/2011 05:14 PM, Benjamin Herrenschmidt wrote:
On Thu, 2011-04-28 at 17:11 -0400, Steven A. Falco wrote:
It is in __dev_sort_resources() in setup-bus.c
There is this test:
/* Don't touch classless devices or host bridges or ioapics. */
if (class == PCI_CLASS_NOT_DEFINED
This moves various HVSI protocol definitions from the hvsi.c
driver to a header file that can be used later on by a udbg
implementation
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
arch/powerpc/include/asm/hvsi.h | 68 +++
When CONFIG_PPC_EARLY_DEBUG is set, call register_early_udbg_console()
early from generic code.
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
arch/powerpc/kernel/udbg.c|2 ++
arch/powerpc/platforms/pseries/lpar.c |2 --
2 files changed, 2 insertions(+), 2
Embed the struct hvsi_header in the various packet definitions
rather than open coding it multiple times. Will help provide
stronger type checking.
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
arch/powerpc/include/asm/hvsi.h | 16 ++---
drivers/tty/hvc/hvsi.c
On pseries machines, consoles are provided by the hypervisor using
a low level get_chars/put_chars type interface. However, this is
really just a transport to the service processor which implements
them either as raw console (networked consoles, HMC, ...) or as
hvsi serial ports.
The later is a
Hi all,
After merging the final tree, today's linux-next build (powerpc64
allnoconfig) produced this warning:
WARNING: vmlinux.o(.text+0x907a): Section mismatch in reference from the
variable generic_secondary_common_init to the variable .init.data:boot_cpu_count
The function
Hi,
I have no comments about coding and architecture. It looks fine.
Only have a query about its use case..
Any application intended to use message interrupt requires to know reg_num
because of struct mpic_msgr* mpic_msgr_get(unsigned int reg_num) API
It will be good to search available unit
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