RE: Problem in getting shared memory access on P1022RDK

2012-01-25 Thread Arshad, Farrukh
I have dumped TLB entries while mapping shared memory. On both cores M-Bit (MAS2[61]) is set in TLB0 entries. On both cores M-Bit is set for all valid TLB1 entries. TLB1 does contains some invalid entries which has M-Bit cleared. So I believe at this time the coherency is not the issue. Any

Re: FSL SPI driver question

2012-01-25 Thread Norbert van Bolhuis
On 01/25/12 01:11, bruce_leon...@selinc.com wrote: Good afternoon, I'm using the 3.0.3 kernel running on an MPC8308 and am trying to interface to a Cypress CY14B256Q2A non-volatile RAM via SPI. I've got the SPI infrastructure, the Freescale SPI driver (drivers/spi/spi_fsl_spi.c), and spidev

Re: [PATCH] powerpc/booke64: Configurable lazy interrupt disabling

2012-01-25 Thread Tudor Laurentiu
On 01/23/2012 10:50 PM, Benjamin Herrenschmidt wrote: On Mon, 2012-01-23 at 13:21 -0600, Scott Wood wrote: BTW, for non-booke, when is DEC checked when interrupts are hard-enabled as part of exception return? Likewise with the PS3 HV thing. I only see the iseries check in the exception path.

Re: [RFCv2 00/14]

2012-01-25 Thread Cousson, Benoit
On 1/23/2012 10:53 PM, Rob Herring wrote: On 01/23/2012 03:07 PM, Grant Likely wrote: Hey everyone, Here's the second RFC for the irq_domain patches. I could use some help testing now. I still expect there will be a few bugs. The series is based on v3.3-rc1, and I've pushed it out to my

Re: [RFC 1/2] irq_domain: Create common xlate functions that device drivers can use

2012-01-25 Thread Grant Likely
On Tue, Jan 24, 2012 at 10:35 PM, Grant Likely grant.lik...@secretlab.ca wrote: On Tue, Jan 24, 2012 at 6:50 PM, Rob Herring robherri...@gmail.com wrote: On 01/24/2012 06:18 PM, Grant Likely wrote: Rather than having each interrupt controller driver creating its own barely unique .xlate

Re: [RFCv2 00/14]

2012-01-25 Thread Rob Herring
On 01/25/2012 08:13 AM, Cousson, Benoit wrote: On 1/23/2012 10:53 PM, Rob Herring wrote: On 01/23/2012 03:07 PM, Grant Likely wrote: Hey everyone, Here's the second RFC for the irq_domain patches. I could use some help testing now. I still expect there will be a few bugs. The series is

Re: FSL SPI driver question

2012-01-25 Thread Bruce_Leonard
Hi Norbert, So the question is, how do I use spidev (or any other means) to get the 8308 SPI controller to keep SPICLK active so that the output data from the NvRAM gets clocked out to the 8308? Did you see Documentation/spi/spidev_fdx.c:do_msg ? it perform a full-duplex (actually

Re: [PATCH 2/2] powerpc: Abstract common define of signal multiplex control for qe

2012-01-25 Thread Tabi Timur-B04825
On Thu, Jan 19, 2012 at 11:00 PM, Zhicheng Fan b32...@freescale.com wrote: Signed-off-by: Fanzc b32...@freeescale.com Please fix this. There are only two e's in freescale. In addition, please use your full name. -- Timur Tabi Linux kernel developer at Freescale

Re: [RFCv2 00/14]

2012-01-25 Thread Mark Salter
On Mon, 2012-01-23 at 14:07 -0700, Grant Likely wrote: Hey everyone, Here's the second RFC for the irq_domain patches. I could use some help testing now. I still expect there will be a few bugs. The series is based on v3.3-rc1, and I've pushed it out to my git server: Hi Grant, I

[PATCH] irq: make SPARSE_IRQ an optionally hidden option

2012-01-25 Thread Rob Herring
From: Rob Herring rob.herr...@calxeda.com On ARM, we don't want SPARSE_IRQ to be a user visible option. Make SPARSE_IRQ visible based on MAY_HAVE_SPARSE_IRQ instead of depending on HAVE_SPARSE_IRQ. With this, SPARSE_IRQ is not visible on C6X and ARM. Signed-off-by: Rob Herring