Currently the kernel provides the contents of p-series NVRAM only as a
simple stream of bytes via /dev/nvram, which must be interpreted in user
space by the nvram command in the powerpc-utils package. This patch set
exploits the pstore subsystem to expose each partition in NVRAM as a
separate file
Removal of syslog prefix in the uncompressed oops text will
help in capturing more oops data.
Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
Reviewed-by: Jim Keniston jkeni...@us.ibm.com
---
arch/powerpc/platforms/pseries/nvram.c |2 +-
1 file changed, 1 insertion(+), 1
Introduce version and timestamp information in the oops header.
oops_log_info (oops header) holds version (to distinguish between old
and new format oops header), length of the oops text
(compressed or uncompressed) and timestamp.
The version field will sit in the same place as the length in old
Introduce generic read function to read nvram partitions other than rtas.
nvram_read_error_log will be retained which is used to read rtas partition
from rtasd. nvram_read_partition is the generic read function to read from
any nvram partition.
Signed-off-by: Aruna Balakrishnaiah
IBM's p series machines provide persistent storage for LPARs through NVRAM.
NVRAM's lnx,oops-log partition is used to log oops messages.
Currently the kernel provides the contents of p-series NVRAM only as a
simple stream of bytes via /dev/nvram, which must be interpreted in user
space by the
This patch set exploits the pstore subsystem to read details of rtas partition
in NVRAM to a separate file in /dev/pstore. For instance, rtas details will be
stored in a file named [rtas-nvram-4].
Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
Reviewed-by: Jim Keniston
Introduce os_partition member in nvram_os_partition structure to identify
if the partition is an os partition or not. This will be useful to handle
non-os partitions of-config and common.
Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
Reviewed-by: Jim Keniston jkeni...@us.ibm.com
This patch set exploits the pstore subsystem to read details of
of-config partition in NVRAM to a separate file in /dev/pstore.
For instance, of-config partition details will be stored in a
file named [of-nvram-5].
Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
Reviewed-by: Jim
This patch exploits pstore subsystem to read details of common partition
in NVRAM to a separate file in /dev/pstore. For instance, common partition
details will be stored in a file named [common-nvram-6].
Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
Reviewed-by: Jim Keniston
Based on benh's proposal at
https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-September/101237.html,
this change provides support for reserving memory from the
reserved-ranges node at the root of the device tree.
We just call memblock_reserve on these ranges for now.
Signed-off-by: Jeremy
On Mon, Apr 22, 2013 at 03:30:39PM +0530, Aneesh Kumar K.V wrote:
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
[snip]
/*
- * Use the top bit of the higher-level page table entries to indicate whether
- * the entries we point to contain hugepages. This works because we know
that
On 04/23/2013 08:42 AM, Chen Gang wrote:
need set '\0' for 'local_buffer'.
SPLPAR_MAXLENGTH is 1026, RTAS_DATA_BUF_SIZE is 4096. so the contents of
rtas_data_buf may truncated in memcpy.
if contents are really truncated.
the splpar_strlen is more than 1026. the next while loop checking
On 04/24/2013 01:55 PM, Anatolij Gustschin wrote:
On Wed, 24 Apr 2013 10:55:10 +0800
Tiejun Chen tiejun.c...@windriver.com wrote:
commit 761bbcb7, usb: ehci-fsl: set INCR8 mode for system bus interface
on MPC512x, introduced to fix one MPC5121e (M36P) Errata by setting
INCR8 mode for system
Due to different controller issue of PHY_CLK_VALID in ULPI mode,
in some cases, after set PHY_CLK_SEL, we should set
USB_CTRL_USB_EN before checking PHY_CLK_VALID, otherwise
PHY_CLK_VALID doesn't work.
But in other cases USB_CTRL_USB_EN is already set previously and
PHY_CLK_VALID is not valid
On 2013年04月24日 14:28, Vasant Hegde wrote:
On 04/23/2013 08:42 AM, Chen Gang wrote:
need set '\0' for 'local_buffer'.
SPLPAR_MAXLENGTH is 1026, RTAS_DATA_BUF_SIZE is 4096. so the contents of
rtas_data_buf may truncated in memcpy.
if contents are really truncated.
the splpar_strlen is
On 04/24/2013 12:33 PM, Chen Gang wrote:
On 2013年04月24日 14:28, Vasant Hegde wrote:
On 04/23/2013 08:42 AM, Chen Gang wrote:
need set '\0' for 'local_buffer'.
SPLPAR_MAXLENGTH is 1026, RTAS_DATA_BUF_SIZE is 4096. so the contents of
rtas_data_buf may truncated in memcpy.
if contents are
On 2013年04月24日 15:23, Vasant Hegde wrote:
On 04/24/2013 12:33 PM, Chen Gang wrote:
On 2013年04月24日 14:28, Vasant Hegde wrote:
On 04/23/2013 08:42 AM, Chen Gang wrote:
need set '\0' for 'local_buffer'.
SPLPAR_MAXLENGTH is 1026, RTAS_DATA_BUF_SIZE is 4096. so the
contents of
rtas_data_buf
Hello Vasant Hegde:
How about this patch, is it OK ?
Thanks.
On 2013年03月25日 12:30, Chen Gang wrote:
Hello Maintainers:
could you help check this patch whether is ok ?
thanks.
On 2013年02月17日 12:00, Chen Gang wrote:
Hello relative members:
please give a glance to this patch,
On 04/24/2013 01:15 PM, Chen Gang wrote:
Hello Vasant Hegde:
How about this patch, is it OK ?
Thanks.
On 2013年03月25日 12:30, Chen Gang wrote:
Hello Maintainers:
could you help check this patch whether is ok ?
thanks.
On 2013年02月17日 12:00, Chen Gang wrote:
Hello relative
On 04/24/2013 01:45 PM, Vasant Hegde wrote:
On 04/24/2013 01:15 PM, Chen Gang wrote:
Hello Vasant Hegde:
How about this patch, is it OK ?
Thanks.
On 2013年03月25日 12:30, Chen Gang wrote:
Hello Maintainers:
could you help check this patch whether is ok ?
thanks.
On
Hi all
I get an error message when I compile the source code in Power7 platform
use the newest upstream kernel.
[root@feng linux]# make -j60
CHK include/generated/uapi/linux/version.h
CHK include/generated/utsrelease.h
CC scripts/mod/devicetable-offsets.s
GEN scripts/mod/devicetable-offsets.h
On Wed, Apr 24, 2013 at 04:22:53PM +0800, Mike Qiu wrote:
Hi all
I get an error message when I compile the source code in Power7 platform
use the newest upstream kernel.
Hi Mike,
It depends on what your .config is. What defconfig are you building?
cheers
On 2013年04月24日 16:19, Vasant Hegde wrote:
for tmp_part-header.name:
it is Terminating null required only for names 12 chars.
so need to limit the %.12s for it in printk
additional info:
%12s limit the width, not for the original string output
length
于 2013/4/24 16:31, Michael Ellerman 写道:
On Wed, Apr 24, 2013 at 04:22:53PM +0800, Mike Qiu wrote:
Hi all
I get an error message when I compile the source code in Power7 platform
use the newest upstream kernel.
Hi Mike,
It depends on what your .config is. What defconfig are you building?
I
于 2013/4/24 16:31, Michael Ellerman 写道:
On Wed, Apr 24, 2013 at 04:22:53PM +0800, Mike Qiu wrote:
Hi all
I get an error message when I compile the source code in Power7 platform
use the newest upstream kernel.
Hi Mike,
It depends on what your .config is. What defconfig are you building?
Andrea Arcangeli aarca...@redhat.com writes:
Hi,
On Mon, Apr 22, 2013 at 03:30:52PM +0530, Aneesh Kumar K.V wrote:
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
For architectures like ppc64 we look at deposited pgtable when
calling pmdp_get_and_clear. So do the
As Michael Ellerman suggested, to add CONFIG_POWERNV_MSI for PowerNV
platform. That's similar to CONFIG_PSERIES_MSI for pSeries platform.
For now, we don't make it dependent on CONFIG_EEH since it's not ready
to enable that yet.
Apart from that, we also enable CONFIG_PPC_MSI_BITMAP on selecting
The patch intends to initialize PHB3 during system boot stage. The
flag PNV_PHB_MODEL_PHB3 is introduced to differentiate IODA2
compatible PHB3 from other types of PHBs.
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
arch/powerpc/platforms/powernv/pci-ioda.c | 62
The patch intends to build 32-bits DMA space for individual PEs on
PHB3. The TVE# is recognized by the combo of PE# and fixed bits
from DMA address, which is zero for 32-bits DMA space.
Signed-off-by: Gavin Shan sha...@linux.vnet.ibm.com
---
arch/powerpc/platforms/powernv/pci-ioda.c | 102
The PHB3, which is compatible with IODA2, have lots of tables (RTT/
PETLV/PEST/IVT/RBA) in system memory and have corresponding BARs to
trace the system memory address. The tables have been allocated in
firmware and exported through device-tree. The patch retrieves the
tables explicitly.
Ben found the root cause. Commit 37f02195bee9c25ce44e25204f40b7961a6d7c9d
(powerpc/pci: fix PCI-e devices rescan issue on powerpc platform)
overwrites the IOMMU table of PCI device while enabling PCI device.
The patch intends to fix the IOMMU table after that point.
Signed-off-by: Gavin Shan
The TCE should be invalidated while it's created or free'd. The
approach to do that for IODA1 and IODA2 compliant PHBs are different.
So the patch differentiate them with different functions called to
do that for IODA1 and IODA2 compliant PHBs. It's notable that the
PCI address is used to
The patchset includes minimal support for PHB3. Initially, flag PNV_PHB_IODA2
is introduced to differentiate IODA2 compliant PHB3 from other types of PHBs and
do initialization accordingly for PHB3. Besides, variable IODA2 tables reside in
system memory and we allocate them in kernel, then pass
The EOI handler of MSI/MSI-X interrupts for P8 (PHB3) need additional
steps to handle the P/Q bits in IVE before EOIing the corresponding
interrupt. The patch changes the EOI handler to cover that.
Signed-off-by: Gavin Shan sha...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/opal.h
In __after_prom_start we copy the kernel down to zero in two calls to
copy_and_flush. After the first call (copy from 0 to copy_to_here:)
we jump to the newly copied code soon after.
Unfortunately there's no isync between the copy of this code and the
jump to it. Hence it's possible that stale
Mike Qiu qiud...@linux.vnet.ibm.com wrote:
于 2013/4/24 16:31, Michael Ellerman 写道:
On Wed, Apr 24, 2013 at 04:22:53PM +0800, Mike Qiu wrote:
Hi all
I get an error message when I compile the source code in Power7 platform
use the newest upstream kernel.
Hi Mike,
It depends on what
On Tue, Apr 23, 2013 at 02:10:25PM +, Sethi Varun-B16395 wrote:
I think it's fine to have the header under linux, actually I also the
intel-iommu header under linux.
Yes, the difference is that VT-d runs on x86 and on ia64. So there is no
single arch where the header could be placed. The
Hi,
First off apologies for the large CC list -- I think this catches the
arch list for all the arches with device tree source in the tree.
Various folks have expressed an interest in eventually splitting the
device tree bindings out of the Linux git repository into a separate
tree. This should
On Tue, Apr 23, 2013 at 06:46:10PM -0500, Scott Wood wrote:
On 04/19/2013 05:47:34 AM, Zhao Chenhui wrote:
These cache operations support Freescale SoCs based on BOOK3E.
Move L1 cache operations to fsl_booke_cache.S in order to maintain
easily. And, add cache operations for backside L2 cache
On Tue, Apr 23, 2013 at 07:00:49PM -0500, Scott Wood wrote:
On 04/19/2013 05:47:46 AM, Zhao Chenhui wrote:
From: Chen-Hui Zhao chenhui.z...@freescale.com
The L1 Data Cache of e6500 contains no modified data, no flush
is required.
Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
-Original Message-
From: Joerg Roedel [mailto:j...@8bytes.org]
Sent: Wednesday, April 24, 2013 4:21 PM
To: Sethi Varun-B16395
Cc: io...@lists.linux-foundation.org; linuxppc-dev@lists.ozlabs.org;
linux-ker...@vger.kernel.org; ga...@kernel.crashing.org;
b...@kernel.crashing.org;
On Tue, Apr 23, 2013 at 07:04:06PM -0500, Scott Wood wrote:
On 04/19/2013 05:47:45 AM, Zhao Chenhui wrote:
From: Chen-Hui Zhao chenhui.z...@freescale.com
For e6500, two threads in one core share one time base. Just need
to do time base sync on first thread of one core, and skip it on
the
Added the following domain attributes for the FSL PAMU driver:
1. Added new iommu stash attribute, which allows setting of the
LIODN specific stash id parameter through IOMMU API.
2. Added an attribute for enabling/disabling DMA to a particular
memory window.
3. Added domain attribute to
Systems that use RapidIO fabric may need to implement their own enumeration
and discovery methods which are better suitable for needs of a target
application.
The following set of patches is intended to simplify process of introduction of
new RapidIO fabric enumeration/discovery methods.
The
Add RapidIO enumeration/discovery start from user space.
User space start allows to defer RapidIO fabric scan until the moment when all
participating endpoints are initialized avoiding mandatory synchronized start
of all endpoints (which may be challenging in systems with large number of
RapidIO
Update RapidIO documentation to reflect changes made to enumeration/discovery
build configuration and user space triggering mechanism.
Signed-off-by: Alexandre Bounine alexandre.boun...@idt.com
Cc: Matt Porter mpor...@kernel.crashing.org
Cc: Li Yang le...@freescale.com
Cc: Kumar Gala
Rework to implement RapidIO enumeration/discovery method selection
combined with ability to use enumeration/discovery as a kernel module.
This patch adds ability to introduce new RapidIO enumeration/discovery methods
using kernel configuration options or loadable modules. Configuration option
Hi,
On Wed, Apr 24, 2013 at 02:38:01PM +0530, Aneesh Kumar K.V wrote:
From 7444a5eda33c00eea465b51c405cb830c57513b7 Mon Sep 17 00:00:00 2001
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Date: Wed, 6 Mar 2013 12:50:37 +0530
Subject: [PATCH] mm/THP: withdraw the pgtable after pmdp
Newer firmware on Power systems can transparently reassign platform resources
(CPU and Memory) in use. For instance, if a processor or memory unit is
predicted to fail, the platform may transparently move the processing to an
equivalent unused processor or the memory state to an equivalent unused
Newer firmware on Power systems can transparently reassign platform resources
(CPU and Memory) in use. For instance, if a processor or memory unit is
predicted to fail, the platform may transparently move the processing to an
equivalent unused processor or the memory state to an equivalent unused
From: Jesse Larrew jlar...@linux.vnet.ibm.com
A PRRN event is signaled via the RTAS event-scan mechanism, which
returns a Hot Plug Event message fixed part indicating Platform
Resource Reassignment. In response to the Hot Plug Event message,
we must call ibm,update-nodes to determine which
Correct parsing of the buffer returned from ibm,update-properties. The first
element is a length and the path to the property which is slightly different
from the list of properties in the buffer so we need to specifically
handle this.
Signed-off-by: Nathan Fontenot nf...@linux.vnet.ibm.com
---
As part of handling of PRRN events we need to check vector 5 of the
architecture vector bits reported in the device tree to ensure PRRN event
handling is enabled. To do this firmware_has_feature() is updated (in a
subsequent patch) to make this check vector 5 bits. To avoid having to
re-define
When iterating over the entries in firmware_features_table we only need
to go over the actual number of entries in the array instead of declaring
it to be bigger and checking to make sure there is a valid entry in every
slot.
This patch removes the FIRMWARE_MAX_FEATURES #define and replaces the
The firmware_has_feature() function makes it easy to check for supported
features of the hypervisor. This patch extends the capability of
firmware_has_feature() to include checking for specified bits
in vector 5 of the architecture vector as reported in the device tree.
As part of this the
Update the numa code to use the updated firmware_has_feature() when checking
for type 1 affinity.
Signed-off-by: Nathan Fontenot nf...@linux.vnet.ibm.com
---
arch/powerpc/mm/numa.c | 22 +++---
1 file changed, 3 insertions(+), 19 deletions(-)
Index:
From: Jesse Larrew jlar...@linux.vnet.ibm.com
Platform events such as partition migration or the new PRRN firmware
feature can cause the NUMA characteristics of a CPU to change, and these
changes will be reflected in the device tree nodes for the affected
CPUs.
This patch registers a handler for
The new PRRN firmware feature allows CPU and memory resources to be
transparently reassigned across NUMA boundaries. When this happens, the
kernel must update the node maps to reflect the new affinity information.
Although the NUMA maps can be protected by locking primitives during the
update
From: Jesse Larrew jlar...@linux.vnet.ibm.com
The following patch adds vdso_getcpu_init(), which stores the NUMA node for
a cpu in SPRG3:
Commit 18ad51dd34 (powerpc: Add VDSO version of getcpu) adds
vdso_getcpu_init(), which stores the NUMA node for a cpu in SPRG3.
This patch ensures that this
From: Jesse Larrew jlar...@linux.vnet.ibm.com
The new PRRN firmware feature provides a more convenient and event-driven
interface than VPHN for notifying Linux of changes to the NUMA affinity of
platform resources. However, for practical reasons, it may not be feasible
for some customers to
There are instances in which we do not want topology updates to occur.
In order to allow this a /proc interface (/proc/powerpc/topology_updates)
is introduced so that topology updates can be enabled and disabled.
This patch also adds a prrn_is_enabled() call so that PRRN events are
handled in the
The Linux kernel and platform firmware negotiate their mutual support
of the PRRN option via the ibm,client-architecture-support interface.
This patch simply sets the appropriate fields in the client architecture
vector to indicate Linux support for PRRN and will allow the firmware to
report PRRN
On Wed, 2013-04-24 at 20:30 +1000, Michael Neuling wrote:
benh: we should get this in 3.9 ASAP.
Considering that the bug has been there *forever* I don't think I have a
real standing to try to shove it down Linus throat as a regression
fix :-)
I'll put the fix in 3.10 and let it trickle down to
On Tue, 23 Apr 2013 10:41:42 +1000 Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
On Thu, 2013-04-18 at 13:41 +1000, Michael Neuling wrote:
akpm,
If you're happy with this, is it something you can take in your tree?
Andrew ? Or give me an ack ? :-) I'm happy to carry this, we
On Wed, 2013-04-24 at 17:37 +0800, Gavin Shan wrote:
The EOI handler of MSI/MSI-X interrupts for P8 (PHB3) need additional
steps to handle the P/Q bits in IVE before EOIing the corresponding
interrupt. The patch changes the EOI handler to cover that.
.../...
static void
diff --git a/arch/powerpc/include/asm/iommu.h
b/arch/powerpc/include/asm/iommu.h
index cbfe678..0db308e 100644
--- a/arch/powerpc/include/asm/iommu.h
+++ b/arch/powerpc/include/asm/iommu.h
@@ -76,6 +76,7 @@ struct iommu_table {
struct iommu_pool large_pool;
struct iommu_pool
On Wed, 24 Apr 2013 10:31:57 -0400 Alexandre Bounine
alexandre.boun...@idt.com wrote:
Rework to implement RapidIO enumeration/discovery method selection
combined with ability to use enumeration/discovery as a kernel module.
This patch adds ability to introduce new RapidIO
On Mon, Apr 22, 2013 at 03:30:57PM +0530, Aneesh Kumar K.V wrote:
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Replace find_linux_pte with find_linux_pte_or_hugepte and explicitly
document why we don't need to handle transparent hugepages at callsites.
diff --git
On 04/24/2013 06:29:29 AM, Zhao Chenhui wrote:
On Tue, Apr 23, 2013 at 07:04:06PM -0500, Scott Wood wrote:
On 04/19/2013 05:47:45 AM, Zhao Chenhui wrote:
From: Chen-Hui Zhao chenhui.z...@freescale.com
For e6500, two threads in one core share one time base. Just need
to do time base sync on
From: Lucas Kannebley Tavares luca...@vnet.linux.ibm.com
This patch series does:
1. max_bus_speed is used to set the device to gen2 speeds
2. on power there's no longer a conflict between the pseries call and other
architectures, because the overwrite is done via a ppc_md hook
3. radeon is
From: Lucas Kannebley Tavares luca...@linux.vnet.ibm.com
On pseries machines the detection for max_bus_speed should be done
through an OpenFirmware property. This patch adds a function to perform
this detection and a hook to perform dynamic adding of the function only for
pseries. This is done by
From: Lucas Kannebley Tavares luca...@linux.vnet.ibm.com
radeon currently uses a drm function to get the speed capabilities for
the bus, drm_pcie_get_speed_cap_mask. However, this is a non-standard
method of performing this detection and this patch changes it to use
the max_bus_speed attribute.
On Wed, Apr 24, 2013 at 07:54:49PM -0300, luca...@linux.vnet.ibm.com wrote:
From: Lucas Kannebley Tavares luca...@linux.vnet.ibm.com
On pseries machines the detection for max_bus_speed should be done
through an OpenFirmware property. This patch adds a function to perform
this detection and a
On Tue, Apr 23, 2013 at 11:20 PM, Aruna Balakrishnaiah
ar...@linux.vnet.ibm.com wrote:
This patch set exploits the pstore subsystem to read details of
of-config partition in NVRAM to a separate file in /dev/pstore.
For instance, of-config partition details will be stored in a
file named
On Tue, Apr 23, 2013 at 11:19 PM, Aruna Balakrishnaiah
ar...@linux.vnet.ibm.com wrote:
Currently the kernel provides the contents of p-series NVRAM only as a
simple stream of bytes via /dev/nvram, which must be interpreted in user
space by the nvram command in the powerpc-utils package. This
On Wed, Apr 24, 2013 at 05:38:16PM -0500, Scott Wood wrote:
On 04/24/2013 06:29:29 AM, Zhao Chenhui wrote:
On Tue, Apr 23, 2013 at 07:04:06PM -0500, Scott Wood wrote:
On 04/19/2013 05:47:45 AM, Zhao Chenhui wrote:
From: Chen-Hui Zhao chenhui.z...@freescale.com
For e6500, two threads in
On 2013年04月24日 20:47, Mike wrote:
在 2013-04-24三的 20:37 +1000，Michael Neuling写道：
Mike Qiu qiud...@linux.vnet.ibm.com wrote:
于 2013/4/24 16:31, Michael Ellerman 写道:
On Wed, Apr 24, 2013 at 04:22:53PM +0800, Mike Qiu wrote:
Hi all
I get an error message when I compile the
Considering that the bug has been there *forever* I don't think I have a
real standing to try to shove it down Linus throat as a regression
fix :-)
True, sorry.
I'll put the fix in 3.10 and let it trickle down to stable.
Thanks
Mikey
___
From: Mingkai Hu mingkai...@freescale.com
Signed-off-by: Mingkai Hu mingkai...@freescale.com
---
Base on git://git.am.freescale.net/gitolite/mirrors/linux-2.6.git
arch/powerpc/configs/mpc85xx_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/configs/mpc85xx_defconfig
From: Mingkai Hu mingkai...@freescale.com
C293PCIE board is a series of Freescale PCIe add-in cards to perform
as public key crypto accelerator or secure key management module.
- 512KB platform SRAM in addition to 512K L2 Cache/SRAM
- 512MB soldered DDR3 32bit memory
- CPLD System Logic
-
From: Mingkai Hu mingkai...@freescale.com
Signed-off-by: Mingkai Hu mingkai...@freescale.com
Signed-off-by: Po Liu po@freescale.com
---
Base on git://git.am.freescale.net/gitolite/mirrors/linux-2.6.git
arch/powerpc/boot/dts/fsl/c293si-post.dtsi | 193 +
From: Mingkai Hu mingkai...@freescale.com
Add device tree for SEC 6.0 used on C29x silicon.
Signed-off-by: Mingkai Hu mingkai...@freescale.com
Singed-off-by: Po Liu po@freescale.com
---
Base on git://git.am.freescale.net/gitolite/mirrors/linux-2.6.git
于 2013/4/25 9:05, Chen Gang 写道:
On 2013年04月24日 20:47, Mike wrote:
在 2013-04-24三的 20:37 +1000，Michael Neuling写道：
Mike Qiu qiud...@linux.vnet.ibm.com wrote:
于 2013/4/24 16:31, Michael Ellerman 写道:
On Wed, Apr 24, 2013 at 04:22:53PM +0800, Mike Qiu wrote:
Hi all
I get an error message when I
On Thursday 25 April 2013 02:13 AM, Kees Cook wrote:
Hi Kees,
On Tue, Apr 23, 2013 at 11:20 PM, Aruna Balakrishnaiah
ar...@linux.vnet.ibm.com wrote:
This patch set exploits the pstore subsystem to read details of
of-config partition in NVRAM to a separate file in /dev/pstore.
For instance,
On 2013年04月25日 12:05, Mike Qiu wrote:
I will try, and plan to get a result within this week (2013-04-28)
Thanks.
Hi
This has block my work now
So I hope you can take a look ASAP
Thanks
:)
The root cause is the room 0x500..0xc00 is not enough when
KVM_HANDLER_PR expresses the real codes.
Hi Kees,
On Thursday 25 April 2013 02:15 AM, Kees Cook wrote:
On Tue, Apr 23, 2013 at 11:19 PM, Aruna Balakrishnaiah
ar...@linux.vnet.ibm.com wrote:
Currently the kernel provides the contents of p-series NVRAM only as a
simple stream of bytes via /dev/nvram, which must be interpreted in user
86 matches
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