Hi, Anthony Foiani,
Please confirm what is the key operation to reproduce the error.
1. only update NOR for a long enough time, for ex. tens of seconds, see if
error happens;
2. only r/w SSD without NOR operation, see if error happens;
3. r/w SSD first and keep it run, then start to read NOR, if
于 2013/5/22 8:15, Benjamin Herrenschmidt 写道:
On Tue, 2013-05-21 at 16:45 +0200, Alexander Gordeev wrote:
On Tue, Jan 15, 2013 at 03:38:53PM +0800, Mike Qiu wrote:
The test results is shown by 'cat /proc/interrups':
CPU0 CPU1 CPU2 CPU3
16: 240458 261601
From: Peter Zijlstra a.p.zijls...@chello.nl
This patch adds conditional branch filtering support,
enabling it for PERF_SAMPLE_BRANCH_COND in perf branch
stack sampling framework by utilizing an available
software filter X86_BR_JCC.
Signed-off-by: Peter Zijlstra a.p.zijls...@chello.nl
Enables conditional branch filter support for POWER8
utilizing MMCRA register based filter and also invalidates
a BHRB branch filter combination involving conditional
branches.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/perf/power8-pmu.c | 10 ++
1 file
Adding documentation support for conditional branch filter.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
tools/perf/Documentation/perf-record.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tools/perf/Documentation/perf-record.txt
Adding perf record support for new branch stack filter criteria
PERF_SAMPLE_BRANCH_COND.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
tools/perf/builtin-record.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c
POWER8 PMU based BHRB supports filtering for conditional branches.
This patch introduces new branch filter PERF_SAMPLE_BRANCH_COND which
will extend the existing perf ABI. Other architectures can provide
this functionality with either HW filtering support (if present) or
with SW filtering of
This patchset introduces conditional branch filter in perf branch stack
sampling framework incorporating review comments from Michael Neuling,
Peter Zijlstra and Stephane Eranian.
Anshuman Khandual (5):
perf: New conditional branch filter criteria in branch stack sampling
powerpc, perf:
于 2013/5/22 5:54, Brian King 写道:
Recent commit e61133dda480062d221f09e4fc18f66763f8ecd0 added support
for a new firmware feature to force an adapter to use 32 bit MSIs.
However, this firmware is not available for all systems. The hack below
allows devices needing 32 bit MSIs to work on these
On 05/21/2013 07:25 PM, Stephane Eranian wrote:
On Thu, May 16, 2013 at 12:15 PM, Michael Neuling mi...@neuling.org wrote:
Peter Zijlstra pet...@infradead.org wrote:
On Wed, May 15, 2013 at 03:37:22PM +0200, Stephane Eranian wrote:
On Fri, May 3, 2013 at 2:11 PM, Peter Zijlstra
On Wed, 2013-05-22 at 11:17 +0530, Anshuman Khandual wrote:
Completely ignore BHRB privilege state filter request as we are
already configuring MMCRA register with privilege state filtering
attribute for the accompanying PMU event. This would help achieve
cleaner user space interaction for
On Wed, May 22, 2013 at 11:52:38AM +0530, Anshuman Khandual wrote:
Enables conditional branch filter support for POWER8
utilizing MMCRA register based filter and also invalidates
a BHRB branch filter combination involving conditional
branches.
Signed-off-by: Anshuman Khandual
This moves the quirk itself to pci_64.c as to get built on all ppc64
platforms (the only ones with a pci_dn), factors the two implementations
of get_pdn() into a single pci_get_dn() and use the quirk to do 32-bit
MSIs on IODA based powernv platforms.
Signed-off-by: Benjamin Herrenschmidt
Your description from patch 0 should be here.
Sure, will bring it here.
diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c
index f7d1c4f..8ed323d 100644
--- a/arch/powerpc/perf/power8-pmu.c
+++ b/arch/powerpc/perf/power8-pmu.c
@@ -525,16 +525,17 @@ static u64
From: Tang Yuantian yuantian.t...@freescale.com
The compatible string of clock is changed from *-2 to *-2.0
on chassis 2. So updated it accordingly.
Signed-off-by: Tang Yuantian yuantian.t...@freescale.com
---
drivers/clk/clk-ppc-corenet.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
On Thursday 16 May 2013, Michael S. Tsirkin wrote:
This improves the might_fault annotations used
by uaccess routines:
1. The only reason uaccess routines might sleep
is if they fault. Make this explicit for
all architectures.
2. Accesses (e.g through socket ops) to kernel memory
On 05/21/2013 07:48 PM, Andrew Lunn wrote:
On Tue, May 21, 2013 at 06:41:44PM +0200, Sebastian Hesselbarth wrote:
This patch adds orion-eth and mvmdio device tree nodes for DT enabled
Dove boards. As there is only one ethernet controller on Dove, a default
phy node is also added with a note to
On Tue, May 21, 2013 at 01:57:34PM +0200, Peter Zijlstra wrote:
On Sun, May 19, 2013 at 12:35:26PM +0300, Michael S. Tsirkin wrote:
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -198,7 +198,6 @@ void might_fault(void);
#else
static inline void
On Wed, May 22, 2013 at 11:25:36AM +0200, Arnd Bergmann wrote:
On Thursday 16 May 2013, Michael S. Tsirkin wrote:
This improves the might_fault annotations used
by uaccess routines:
1. The only reason uaccess routines might sleep
is if they fault. Make this explicit for
all
On 05/22/2013 05:43 PM, Sebastian Hesselbarth wrote:
On 05/21/2013 07:48 PM, Andrew Lunn wrote:
On Tue, May 21, 2013 at 06:41:44PM +0200, Sebastian Hesselbarth wrote:
This patch adds orion-eth and mvmdio device tree nodes for DT enabled
Dove boards. As there is only one ethernet controller on
On 05/22/2013 12:04 PM, tiejun.chen wrote:
On 05/22/2013 05:43 PM, Sebastian Hesselbarth wrote:
On 05/21/2013 07:48 PM, Andrew Lunn wrote:
On Tue, May 21, 2013 at 06:41:44PM +0200, Sebastian Hesselbarth wrote:
This patch adds orion-eth and mvmdio device tree nodes for DT enabled
Dove boards.
On Wed, May 22, 2013 at 12:47:09PM +0300, Michael S. Tsirkin wrote:
+static inline bool __can_fault(void)
+{
+ /*
+* Some code (nfs/sunrpc) uses socket ops on kernel memory while
+* holding the mmap_sem, this is safe because kernel memory doesn't
+* get paged out,
On Wed, May 22, 2013 at 11:25:36AM +0200, Arnd Bergmann wrote:
Calling might_fault() for every __get_user/__put_user is rather expensive
because it turns what should be a single instruction (plus fixup) into an
external function call.
We could hide it all behind CONFIG_DEBUG_ATOMIC_SLEEP just
Peter Zijlstra pet...@infradead.org wrote:
On Wed, May 22, 2013 at 11:52:38AM +0530, Anshuman Khandual wrote:
Enables conditional branch filter support for POWER8
utilizing MMCRA register based filter and also invalidates
a BHRB branch filter combination involving conditional
branches.
On Wed, May 22, 2013 at 12:19:16PM +0200, Peter Zijlstra wrote:
On Wed, May 22, 2013 at 11:25:36AM +0200, Arnd Bergmann wrote:
Calling might_fault() for every __get_user/__put_user is rather expensive
because it turns what should be a single instruction (plus fixup) into an
external
On Wed, May 22, 2013 at 02:07:29PM +0300, Michael S. Tsirkin wrote:
On Wed, May 22, 2013 at 12:19:16PM +0200, Peter Zijlstra wrote:
On Wed, May 22, 2013 at 11:25:36AM +0200, Arnd Bergmann wrote:
Calling might_fault() for every __get_user/__put_user is rather expensive
because it turns
Hi,
On Wed, May 22, 2013 at 8:43 AM, Anshuman Khandual
khand...@linux.vnet.ibm.com wrote:
On 05/21/2013 07:25 PM, Stephane Eranian wrote:
On Thu, May 16, 2013 at 12:15 PM, Michael Neuling mi...@neuling.org wrote:
Peter Zijlstra pet...@infradead.org wrote:
On Wed, May 15, 2013 at 03:37:22PM
On Thu, Apr 25, 2013 at 3:45 PM, Rob Herring robherri...@gmail.com wrote:
On 04/25/2013 03:12 PM, Benjamin Herrenschmidt wrote:
On Thu, 2013-04-25 at 14:14 -0500, Rob Herring wrote:
On 04/25/2013 12:35 PM, Benjamin Herrenschmidt wrote:
[...]
You need patch 2 of this series to fix this:
On Wed, 2013-05-22 at 07:26 -0500, Rob Herring wrote:
Did you have a chance to test this? I want to get this into -next.
Ah sorry, skipped out of my mind, I'll get to it asap...
Cheers,
Ben.
___
Linuxppc-dev mailing list
On Wed, May 22, 2013 at 12:13:58PM +0200, Sebastian Hesselbarth wrote:
On 05/22/2013 12:04 PM, tiejun.chen wrote:
On 05/22/2013 05:43 PM, Sebastian Hesselbarth wrote:
On 05/21/2013 07:48 PM, Andrew Lunn wrote:
On Tue, May 21, 2013 at 06:41:44PM +0200, Sebastian Hesselbarth wrote:
This patch
On Wed, May 22, 2013 at 11:25:36AM +0200, Arnd Bergmann wrote:
Given the most commonly used functions and a couple of architectures
I'm familiar with, these are the ones that currently call might_fault()
x86-32 x86-64 arm arm64 powerpc s390generic
On Thursday 16 May 2013, Michael S. Tsirkin wrote:
@@ -178,7 +178,7 @@ do {
\
long __pu_err; \
__typeof__(*(ptr)) __user *__pu_addr = (ptr); \
if
On Wednesday 22 May 2013, Russell King - ARM Linux wrote:
On Wed, May 22, 2013 at 11:25:36AM +0200, Arnd Bergmann wrote:
Given the most commonly used functions and a couple of architectures
I'm familiar with, these are the ones that currently call might_fault()
On Wed, May 22, 2013 at 03:59:01PM +0200, Arnd Bergmann wrote:
On Thursday 16 May 2013, Michael S. Tsirkin wrote:
@@ -178,7 +178,7 @@ do {
\
long __pu_err; \
On Wed, May 22, 2013 at 04:04:48PM +0200, Arnd Bergmann wrote:
On Wednesday 22 May 2013, Russell King - ARM Linux wrote:
On Wed, May 22, 2013 at 11:25:36AM +0200, Arnd Bergmann wrote:
Given the most commonly used functions and a couple of architectures
I'm familiar with, these are the
On 05/22/2013 05:53 PM, Stephane Eranian wrote:
Hi,
On Wed, May 22, 2013 at 8:43 AM, Anshuman Khandual
khand...@linux.vnet.ibm.com wrote:
On 05/21/2013 07:25 PM, Stephane Eranian wrote:
On Thu, May 16, 2013 at 12:15 PM, Michael Neuling mi...@neuling.org wrote:
Peter Zijlstra
On Tue, May 21, 2013 at 06:41:38PM +0200, Sebastian Hesselbarth wrote:
This patch set picks up work by Florian Fainelli bringing full DT
support to mv643xx_eth and Marvell SoCs using it.
Hi Sebastian
I tested on my QNAP and topkick. Works great.
Tested-by: Andrew Lunn and...@lunn.ch
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Architectures like powerpc use the deposited pgtable to store
hash index values. We need to make the deposted pgtable visible
to other cpus before we are ready to take a hash fault.
Signed-off-by: Aneesh Kumar K.V
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
We should use pmdp_set_access_flags to update access flags. Archs like powerpc
use extra checks(_PAGE_BUSY) when updating a hugepage PTE. A set_pmd_at doesn't
do those checks. We should use set_pmd_at only when updating a none hugepage
PTE.
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
This will be later used by powerpc THP support. In powerpc we want to use
pgtable for storing the hash index values. So instead of adding them to
mm_context list, we would like to store them in the second half of pmd
Reviewed-by: Andrea
Hi,
This is the second patchset needed to support THP on ppc64. Some of the changes
included in this series are tricky in that it changes the powerpc linux page
table
walk subtly. We also overload few of the pte flags for ptes at PMD level (huge
page PTEs).
mm/ changes are already merged to
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
We should not use set_pmd_at to update pmd_t with pgtable_t pointer. set_pmd_at
is used to set pmd with huge pte entries and architectures like ppc64, clear
few flags from the pte when saving a new entry. Without this change we observe
bad
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Reviewed-by: David Gibson da...@gibson.dropbear.id.au
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/mm/gup.c | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Replace find_linux_pte with find_linux_pte_or_hugepte and explicitly
document why we don't need to handle transparent hugepages at callsites.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
THP code does PTE page allocation along with large page request and deposit them
for later use. This is to ensure that we won't have any failures when we split
hugepages to regular pages.
On powerpc we want to use the deposited PTE page for
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Reviewed-by: David Gibson d...@au1.ibm.com
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/mm/hugetlbpage.c | 32 ++--
1 file changed, 26 insertions(+), 6 deletions(-)
diff --git
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Hugepage invalidate involves invalidating multiple hpte entries.
Optimize the operation using H_BULK_REMOVE on lpar platforms.
On native, reduce the number of tlb flush.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
We enable only if the we support 16MB page size.
Reviewed-by: David Gibson d...@au1.ibm.com
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/pgtable-ppc64.h | 3 +--
arch/powerpc/mm/pgtable_64.c
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
We need to have irqs disabled to handle all the possible parallel update for
linux page table without holding locks.
Events that we are intersted in while walking page tables are
1) Page fault
2) umap
3) THP split
4) THP collapse
A)
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
We will use this in the later patch for handling THP pages
Reviewed-by: David Gibson d...@au1.ibm.com
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/hugetlb.h | 8 +-
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
For architectures like ppc64 we look at deposited pgtable when
calling pmdp_get_and_clear. So do the pgtable_trans_huge_withdraw
after finishing pmdp related operations.
Reviewed-by: Andrea Arcangeli aarca...@redhat.com
Signed-off-by: Aneesh
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
For architectures like powerpc that support multiple explicit hugepage
sizes, HPAGE_SHIFT indicate the default explicit hugepage shift. For
THP to work the hugepage size should be same as PMD_SIZE. So use
PMD_SHIFT directly. So move the
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
GCC is very likely to read the pagetables just once and cache them in
the local stack or in a register, but it is can also decide to re-read
the pagetables. The problem is that the pagetable in those places can
change from under gcc.
With
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
The deposted PTE page in the second half of the PMD table is used to
track the state on hash PTEs. After updating the HPTE, we mark the
coresponding slot in the deposted PTE page valid.
Reviewed-by: David Gibson da...@gibson.dropbear.id.au
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
We now have pmd entries covering 16MB range and the PMD table double its
original size.
We use the second half of the PMD table to deposit the pgtable (PTE page).
The depoisted PTE page is further used to track the HPTE information. The
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
With THP we set pmd to none, before we do pte_clear. Hence we can't
walk page table to get the pte lock ptr and verify whether it is locked.
THP do take pte lock before calling pte_clear. So we don't change the locking
rules here. It is that
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
We find all the overlapping vma and mark them such that we don't allocate
hugepage in that range. Also we split existing huge page so that the
normal page hash can be invalidated and new page faulted in with new
protection bits.
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
We need to use smb_rmb when looking at hpte slot array. Otherwise we could
reorder the hpte_slot array load bfore even we marked the pmd trans huge.
Related smb_wmb()s is done in pgtable_trans_huge_deposit when we deposit
a pgtable.
On Wed, May 22, 2013 at 10:59:08AM -0600, Jason Gunthorpe wrote:
On Wed, May 22, 2013 at 09:10:10AM -0400, Jason Cooper wrote:
iirc, our solution to this was to parse the ATAGs for the mac addr and
update the appended dtb. This way, module load and unload would work
without loosing the
On Wed, May 22, 2013 at 09:10:10AM -0400, Jason Cooper wrote:
iirc, our solution to this was to parse the ATAGs for the mac addr and
update the appended dtb. This way, module load and unload would work
without loosing the mac address. I believe Jason Gunthorpe has a patch
to atags_to_fdt()
On 05/22/2013 06:59 PM, Jason Gunthorpe wrote:
On Wed, May 22, 2013 at 09:10:10AM -0400, Jason Cooper wrote:
iirc, our solution to this was to parse the ATAGs for the mac addr and
update the appended dtb. This way, module load and unload would work
without loosing the mac address. I believe
On Wed, May 22, 2013 at 07:32:51PM +0200, Sebastian Hesselbarth wrote:
On 05/22/2013 06:59 PM, Jason Gunthorpe wrote:
On Wed, May 22, 2013 at 09:10:10AM -0400, Jason Cooper wrote:
iirc, our solution to this was to parse the ATAGs for the mac addr and
update the appended dtb. This way, module
On 05/22/2013 07:35 PM, Jason Cooper wrote:
On Wed, May 22, 2013 at 07:32:51PM +0200, Sebastian Hesselbarth wrote:
On 05/22/2013 06:59 PM, Jason Gunthorpe wrote:
On Wed, May 22, 2013 at 09:10:10AM -0400, Jason Cooper wrote:
iirc, our solution to this was to parse the ATAGs for the mac addr
On Wed, May 22, 2013 at 07:42:36PM +0200, Sebastian Hesselbarth wrote:
On 05/22/2013 07:35 PM, Jason Cooper wrote:
On Wed, May 22, 2013 at 07:32:51PM +0200, Sebastian Hesselbarth wrote:
On 05/22/2013 06:59 PM, Jason Gunthorpe wrote:
On Wed, May 22, 2013 at 09:10:10AM -0400, Jason Cooper wrote:
On Wed, May 22, 2013 at 07:32:51PM +0200, Sebastian Hesselbarth wrote:
Not neccessary anyway, after talking Jason C in a Kirkwood-only
workaround I prepared a patch that reads mac address registers early
and stores it in the local-mac-address property.
That sounds great, but, FWIW, our
On 05/22/2013 07:48 PM, Jason Cooper wrote:
On Wed, May 22, 2013 at 07:42:36PM +0200, Sebastian Hesselbarth wrote:
Hmm, maybe a little bit too early. While restoring the MAC address now
works, another bug arises which I guess is related with phy setup
and aneg.
Will investigate and update
On Wed, 22 May 2013, Geert Uytterhoeven wrote:
JFYI, when comparing v3.10-rc2 to v3.10-rc1[3], the summaries are:
- build errors: +2/-13
One false positive due to a line concatenation, and
+ error: drivers/built-in.o: undefined reference to `il_pm_ops': =
.data+0x51ce4)
On Wed, May 22, 2013 at 08:44:20PM +0200, Sebastian Hesselbarth wrote:
On 05/22/2013 07:48 PM, Jason Cooper wrote:
On Wed, May 22, 2013 at 07:42:36PM +0200, Sebastian Hesselbarth wrote:
Hmm, maybe a little bit too early. While restoring the MAC address now
works, another bug arises which I
On 05/22/2013 08:24 PM, Jason Gunthorpe wrote:
On Wed, May 22, 2013 at 07:32:51PM +0200, Sebastian Hesselbarth wrote:
Not neccessary anyway, after talking Jason C in a Kirkwood-only
workaround I prepared a patch that reads mac address registers early
and stores it in the local-mac-address
On 05/22/2013 08:49 PM, Jason Cooper wrote:
On Wed, May 22, 2013 at 08:44:20PM +0200, Sebastian Hesselbarth wrote:
On 05/22/2013 07:48 PM, Jason Cooper wrote:
On Wed, May 22, 2013 at 07:42:36PM +0200, Sebastian Hesselbarth wrote:
Hmm, maybe a little bit too early. While restoring the MAC
On Wed, May 22, 2013 at 08:55:01PM +0200, Sebastian Hesselbarth wrote:
On 05/22/2013 08:49 PM, Jason Cooper wrote:
On Wed, May 22, 2013 at 08:44:20PM +0200, Sebastian Hesselbarth wrote:
On 05/22/2013 07:48 PM, Jason Cooper wrote:
On Wed, May 22, 2013 at 07:42:36PM +0200, Sebastian Hesselbarth
Kirkwood ethernet controllers suffer from loosing MAC register content
on gated clocks. In the past this was prevented by not gating the ethernet
controller clocks. With DT support for mv643xx_eth and corresponding
nodes available, a different approach is more reasonable.
This patch replaces the
Ethernet controllers found on Kirkwood SoCs not only suffer from loosing
MAC address register contents on clock gating but also some important
registers are reset to values that would break ethernet. This patch
clears the CLK125_BYPASS_EN bit for DT enabled Kirkwood only by using
On Wed, May 22, 2013 at 10:04:02PM +0200, Sebastian Hesselbarth wrote:
Ethernet controllers found on Kirkwood SoCs not only suffer from loosing
MAC address register contents on clock gating but also some important
registers are reset to values that would break ethernet. This patch
FWIW, we
Hi Sebastian,
On Tue, May 21, 2013 at 06:41:49PM +0200, Sebastian Hesselbarth wrote:
With DT support for mv643xx_eth, board specific init for some boards now
is unneccessary. Remove those board files, Kconfig entries, and
corresponding entries in kirkwood_defconfig.
Signed-off-by: Sebastian
On Thu, May 16, 2013 at 08:40:41PM +0200, Peter Zijlstra wrote:
On Thu, May 16, 2013 at 02:16:10PM +0300, Michael S. Tsirkin wrote:
There are several ways to make sure might_fault
calling function does not sleep.
One is to use it on kernel or otherwise locked memory - apparently
On Tue, May 21, 2013 at 01:57:34PM +0200, Peter Zijlstra wrote:
On Sun, May 19, 2013 at 12:35:26PM +0300, Michael S. Tsirkin wrote:
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -198,7 +198,6 @@ void might_fault(void);
#else
static inline void
On 05/22/2013 10:36 PM, Simon Baatz wrote:
Hi Sebastian,
On Tue, May 21, 2013 at 06:41:49PM +0200, Sebastian Hesselbarth wrote:
With DT support for mv643xx_eth, board specific init for some boards now
is unneccessary. Remove those board files, Kconfig entries, and
corresponding entries in
On 05/22/2013 10:16 PM, Jason Gunthorpe wrote:
On Wed, May 22, 2013 at 10:04:02PM +0200, Sebastian Hesselbarth wrote:
Ethernet controllers found on Kirkwood SoCs not only suffer from loosing
MAC address register contents on clock gating but also some important
registers are reset to values that
On Wed, May 22, 2013 at 10:55:43PM +0200, Sebastian Hesselbarth wrote:
On 05/22/2013 10:36 PM, Simon Baatz wrote:
Hi Sebastian,
On Tue, May 21, 2013 at 06:41:49PM +0200, Sebastian Hesselbarth wrote:
With DT support for mv643xx_eth, board specific init for some boards now
is unneccessary.
On 05/20/2013 10:06:46 PM, Alexey Kardashevskiy wrote:
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
index 8465c2a..da6bf61 100644
--- a/arch/powerpc/kvm/powerpc.c
@@ -396,6 +396,7 @@ int kvm_dev_ioctl_check_extension(long ext)
+++ b/arch/powerpc/kvm/powerpc.c
Recent commit e61133dda480062d221f09e4fc18f66763f8ecd0 added support
for a new firmware feature to force an adapter to use 32 bit MSIs.
However, this firmware is not available for all systems. The hack below
allows devices needing 32 bit MSIs to work on these systems as well.
It is careful to
On 05/22/2013 11:02 PM, Jason Cooper wrote:
On Wed, May 22, 2013 at 10:55:43PM +0200, Sebastian Hesselbarth wrote:
On 05/22/2013 10:36 PM, Simon Baatz wrote:
Hi Sebastian,
On Tue, May 21, 2013 at 06:41:49PM +0200, Sebastian Hesselbarth wrote:
With DT support for mv643xx_eth, board specific
On Sat, Apr 06, 2013 at 09:48:03AM -0700, Sukadev Bhattiprolu wrote:
From bdeacf7175241f6c79b5b2be0fa6b20b0d0b7d1c Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu suka...@linux.vnet.ibm.com
Date: Sat, 6 Apr 2013 08:48:26 -0700
Subject: [PATCH] perf: Power7: Make CPI stack events available
Original report:
http://oss.sgi.com/archives/xfs/2013-05/msg00683.html
Also seen on Power7:
http://marc.info/?l=linux-kernelm=136927904900692w=2
CAI Qian
- Original Message -
From: Dave Chinner da...@fromorbit.com
To: CAI Qian caiq...@redhat.com
Cc: LKML linux-ker...@vger.kernel.org,
Shaohui --
Thanks for the quick reply! Please find my investigation and results
below.
Xie Shaohui-B21989 b21...@freescale.com writes:
1. only update NOR for a long enough time, for ex. tens of seconds,
see if error happens;
It seems that I can do this without any errors:
/ #
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