Hi all,
Today's linux-next merge of the powernv-cpuidle tree got a conflict in
arch/powerpc/include/asm/opal.h between commit c7e64b9ce04a
(powerpc/powernv Platform dump interface) from the powerpc tree and
commit 97eb001f0349 (powerpc/powernv: Add OPAL call to resync timebase
on wakeup) from the
Hi all,
Today's linux-next merge of the powernv-cpuidle tree got a conflict in
arch/powerpc/platforms/powernv/opal-wrappers.S between commit
c7e64b9ce04a (powerpc/powernv Platform dump interface) from the powerpc
tree and commit 97eb001f0349 (powerpc/powernv: Add OPAL call to resync
timebase on
On 03/10/2014 04:40 PM, Gautham R. Shenoy wrote:
From: Srivatsa S. Bhat srivatsa.b...@linux.vnet.ibm.com
On POWER systems, the CPU frequency is controlled at a core-level and
hence we need to serialize so that only one of the threads in the core
switches the core's frequency at a time.
On 03/10/2014 04:40 PM, Gautham R. Shenoy wrote:
From: Gautham R. Shenoy e...@linux.vnet.ibm.com
Create a helper routine that can return the cpu-frequency for the
corresponding pstate_id.
Also, cache the values of the pstate_max, pstate_min and
pstate_nominal and nr_pstates in a static
On 03/10/2014 04:41 PM, Gautham R. Shenoy wrote:
From: Gautham R. Shenoy e...@linux.vnet.ibm.com
The current frequency of a cpu is reported through the sysfs file
cpuinfo_cur_freq. This requires the driver to implement a
-get(unsigned int cpu) method which will return the current
operating
On Fri, Mar 14, 2014 at 05:41:41PM -0500, Scott Wood wrote:
On Wed, 2014-03-12 at 15:46 +0800, Chenhui Zhao wrote:
On Tue, Mar 11, 2014 at 06:51:20PM -0500, Scott Wood wrote:
On Fri, 2014-03-07 at 12:58 +0800, Chenhui Zhao wrote:
In 64-bit mode, kernel just clears the irq soft-enable
On Fri, Mar 14, 2014 at 05:51:09PM -0500, Scott Wood wrote:
On Wed, 2014-03-12 at 16:34 +0800, Chenhui Zhao wrote:
On Tue, Mar 11, 2014 at 07:08:43PM -0500, Scott Wood wrote:
On Fri, 2014-03-07 at 12:58 +0800, Chenhui Zhao wrote:
From: Hongbo Zhang hongbo.zh...@freescale.com
In
On Fri, Mar 14, 2014 at 06:01:45PM -0500, Scott Wood wrote:
On Wed, 2014-03-12 at 17:42 +0800, Chenhui Zhao wrote:
On Tue, Mar 11, 2014 at 07:45:14PM -0500, Scott Wood wrote:
On Fri, 2014-03-07 at 12:58 +0800, Chenhui Zhao wrote:
From: Wang Dongsheng dongsheng.w...@freescale.com
On Fri, Mar 14, 2014 at 06:18:27PM -0500, Scott Wood wrote:
On Wed, 2014-03-12 at 18:40 +0800, Chenhui Zhao wrote:
On Tue, Mar 11, 2014 at 08:10:24PM -0500, Scott Wood wrote:
On Fri, 2014-03-07 at 12:58 +0800, Chenhui Zhao wrote:
From: Zhao Chenhui chenhui.z...@freescale.com
-Original Message-
From: Wood Scott-B07421
Sent: Friday, March 14, 2014 2:01 AM
To: Benjamin Herrenschmidt
Cc: linuxppc-dev@lists.ozlabs.org; Kumar Gala; Tiejun Chen; Wood Scott-
B07421; Caraman Mihai Claudiu-B02008; Anton Blanchard; Paul Mackerras;
kvm-...@vger.kernel.org
Subject:
While bolted handlers (including e6500) do not need to deal with a TLB
miss recursively causing another TLB miss, nested TLB misses can still
happen with crit/mc/debug exceptions -- so we still need to honor
SPRG_TLB_EXFRAME.
We don't need to spend time modifying it in the TLB miss fastpath,
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