On Fri, Jun 6, 2014 at 7:33 AM, Anshuman Khandual
khand...@linux.vnet.ibm.com wrote:
On 06/05/2014 08:51 PM, Shreyas B. Prabhu wrote:
Build throws following errors when CONFIG_SMP=n
arch/powerpc/platforms/powernv/setup.c: In function
‘pnv_kexec_wait_secondaries_down’:
Ping?
I guess this should go to 3.16 branch, shouldn't it?
(2014/05/30 12:18), Masami Hiramatsu wrote:
On ia64 and ppc64, the function pointer does not point the
entry address of the function, but the address of function
discriptor (which contains the entry address and misc
data.) Since the
The T2080 QorIQ multicore processor combines four dual-threaded e6500 Power
Architecture processor cores with high-performance datapath acceleration
logic and network and peripheral bus interfaces required for networking,
telecom/datacom, wireless infrastructure, and mil/aerospace applications.
Add support for Freescale T2080/T2081 QDS Development System Board.
The T2080QDS Development System is a high-performance computing,
evaluation, and development platform that supports T2080 QorIQ
Power Architecture processor, with following major features:
T2080QDS feature overview:
Processor:
T2080PCIe-RDB is a Freescale Reference Design Board that hosts T2080 SoC.
The board feature overview:
Processor:
- T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz
DDR Memory:
- Single memory controller capable of supporting DDR3 and DDR3-LP devices
- 72bit 4GB DDR3-LP
Modern IBM POWERPC systems support multiple IOMMU tables per PHB
so we need a more reliable way (compared to container_of()) to get
a PE pointer from the iommu_table struct pointer used in IOMMU functions.
This also provides better way of getting a PE handle from iommu_table
pointer.
This
Here is what I got for powernv in order to support variable page size
in iommu_table.
I am very uncertain about Patch #4 Add @it_owner to iommu_table struct
and wonder if there any better way to get PE from iommu_table.
Please comment. Thanks.
Alexey Kardashevskiy (6):
powerpc/powernv: use
Since a TCE page size can be other than 4K, make it configurable for
P5IOC2 and IODA PHBs.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
arch/powerpc/platforms/powernv/pci-ioda.c | 5 +++--
arch/powerpc/platforms/powernv/pci-p5ioc2.c | 3 ++-
arch/powerpc/platforms/powernv/pci.c
This fixes IODA1/2 to use it_page_shift as it may be bigger than 4K.
This changes involved constant values to use ull modifier.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
arch/powerpc/platforms/powernv/pci-ioda.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
This makes use of iommu_table::it_page_shift instead of TCE_SHIFT and
TCE_RPN_SHIFT hardcoded values.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
arch/powerpc/platforms/powernv/pci.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git
This implements pnv_pci_ioda(1|2)_tce_invalidate as a callback
of iommu_table to simplify code structure.
This registers invalidate() callbacks for IODA1 and IODA2.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
arch/powerpc/include/asm/iommu.h| 4
There are going to be other callbacks which are going to be used as
function parameters so change the existing set_bypass() callback to be
a type.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
arch/powerpc/include/asm/iommu.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff
Alexander Graf ag...@suse.de writes:
On 05.06.14 14:08, Aneesh Kumar K.V wrote:
We don't have SMT support yet, hence we should not find a doorbell
message generated
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/kvm/book3s_emulate.c | 18
Build throws following errors when CONFIG_SMP=n
arch/powerpc/platforms/powernv/setup.c: In function
‘pnv_kexec_wait_secondaries_down’:
arch/powerpc/platforms/powernv/setup.c:179:4: error: implicit declaration of
function ‘get_hard_smp_processor_id’
rc =
Build throws following errors when CONFIG_SMP=n
arch/powerpc/platforms/powernv/subcore.c: In function ‘cpu_update_split_mode’:
arch/powerpc/platforms/powernv/subcore.c:274:15: error: ‘setup_max_cpus’
undeclared (first use in this function)
arch/powerpc/platforms/powernv/subcore.c:285:5: error:
On 05.06.14 14:08, Aneesh Kumar K.V wrote:
This patchset adds support for emulating VTB, IC and Doorbell features in P8.
Doorbell support is dummy since we don't support SMT cores with PR-KVM.
Thanks, applied patches 1 and 4 to kvm-ppc-queue.
Alex
On 06/06/2014 03:52 PM, Shreyas B. Prabhu wrote:
Build throws following errors when CONFIG_SMP=n
arch/powerpc/platforms/powernv/subcore.c: In function ‘cpu_update_split_mode’:
arch/powerpc/platforms/powernv/subcore.c:274:15: error: ‘setup_max_cpus’
undeclared (first use in this function)
On 05.06.14 14:08, Aneesh Kumar K.V wrote:
virtual time base register is a per VM, per cpu register that needs
to be saved and restored on vm exit and entry. Writing to VTB is not
allowed in the privileged mode.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
For some reason
On Fri, 2014-06-06 at 11:03 +0530, Anshuman Khandual wrote:
On 06/05/2014 08:51 PM, Shreyas B. Prabhu wrote:
Build throws following errors when CONFIG_SMP=n
arch/powerpc/platforms/powernv/setup.c: In function
‘pnv_kexec_wait_secondaries_down’:
On 06/06/2014 10:18 AM, Shengzhou Liu wrote:
The T2080 QorIQ multicore processor combines four dual-threaded e6500 Power
Architecture processor cores with high-performance datapath acceleration
logic and network and peripheral bus interfaces required for networking,
telecom/datacom, wireless
On 06/04/2014 03:39 AM, Benjamin Herrenschmidt wrote:
On Wed, 2014-06-04 at 01:58 +0530, Srivatsa S. Bhat wrote:
Yep, that makes sense. But unfortunately I don't have enough insight into
why exactly powerpc has to online the CPUs before doing a kexec. I just
know from the commit log and the
On 06/04/2014 07:16 PM, Vivek Goyal wrote:
On Wed, Jun 04, 2014 at 08:09:25AM +1000, Benjamin Herrenschmidt wrote:
On Wed, 2014-06-04 at 01:58 +0530, Srivatsa S. Bhat wrote:
Yep, that makes sense. But unfortunately I don't have enough insight into
why exactly powerpc has to online the CPUs
On 06/04/2014 07:11 PM, Vivek Goyal wrote:
On Wed, Jun 04, 2014 at 01:58:40AM +0530, Srivatsa S. Bhat wrote:
On 05/28/2014 07:01 PM, Vivek Goyal wrote:
On Tue, May 27, 2014 at 04:25:34PM +0530, Srivatsa S. Bhat wrote:
If we try to perform a kexec when the machine is in ST (Single-Threaded)
On 06/06/2014 05:59 PM, Srivatsa S. Bhat wrote:
+bool kexec_cpu_wake(void)
+{
+ kexec_smp_down(NULL);
+
+ /* NOTREACHED */
+ return true;
+}
+
This function doesn't have to return anything, so we can define it as void.
The bool is a remnant of my previous attempt at making
On 06/04/2014 02:32 PM, Ed Swarthout wrote:
6712d2931933ada259b82f06c03a855b19937074 (cpufreq:
ppc-corenet-cpufreq: Fix __udivdi3 modpost error) used the remainder
from do_div instead of the quotient. Fix that and add one to ensure
minimum is met.
Signed-off-by: Ed Swarthout
Alexander Graf ag...@suse.de writes:
On 05.06.14 14:08, Aneesh Kumar K.V wrote:
virtual time base register is a per VM, per cpu register that needs
to be saved and restored on vm exit and entry. Writing to VTB is not
allowed in the privileged mode.
Signed-off-by: Aneesh Kumar K.V
On 2014-06-04 14:48:48 Wed, Anton Blanchard wrote:
struct OpalMemoryErrorData is passed to us from firmware, so we
have to byteswap it.
Signed-off-by: Anton Blanchard an...@samba.org
Tested-by: Mahesh Salgaonkar mah...@linux.vnet.ibm.com
---
Having enums in a firmware interface concerns
On Fri, 2014-06-06 at 15:00 +1000, Gavin Shan wrote:
The patch adds new IOCTL commands for sPAPR VFIO container device
to support EEH functionality for PCI devices, which have been passed
through from host to somebody else via VFIO.
Signed-off-by: Gavin Shan gws...@linux.vnet.ibm.com
On Fri, Jun 06, 2014 at 06:00:43PM +0530, Srivatsa S. Bhat wrote:
On 06/04/2014 07:16 PM, Vivek Goyal wrote:
On Wed, Jun 04, 2014 at 08:09:25AM +1000, Benjamin Herrenschmidt wrote:
On Wed, 2014-06-04 at 01:58 +0530, Srivatsa S. Bhat wrote:
Yep, that makes sense. But unfortunately I don't
On 06/06/2014 11:57 PM, Vivek Goyal wrote:
On Fri, Jun 06, 2014 at 06:00:43PM +0530, Srivatsa S. Bhat wrote:
On 06/04/2014 07:16 PM, Vivek Goyal wrote:
On Wed, Jun 04, 2014 at 08:09:25AM +1000, Benjamin Herrenschmidt wrote:
On Wed, 2014-06-04 at 01:58 +0530, Srivatsa S. Bhat wrote:
Yep, that
On Fri, 2014-06-06 at 00:04 -0500, Liu Shengzhou-B36685 wrote:
-Original Message-
From: linuxppc-release-boun...@linux.freescale.net [mailto:linuxppc-
release-boun...@linux.freescale.net] On Behalf Of Prabhakar Kushwaha
Sent: Monday, April 21, 2014 7:34 PM
To:
On 06/06/2014 05:59 PM, Srivatsa S. Bhat wrote:
On 06/04/2014 03:39 AM, Benjamin Herrenschmidt wrote:
On Wed, 2014-06-04 at 01:58 +0530, Srivatsa S. Bhat wrote:
Yep, that makes sense. But unfortunately I don't have enough insight into
why exactly powerpc has to online the CPUs before doing a
From: Ken Helias kenhel...@firemail.de
Many places in the code uses list_add_tail/list_add to insert an entry
before/after another entry. This confuses the reader because these are usually
used to add an item to a list_head and not an entry. Better use the self
explaining function name.
Everyone can write to these files, which is not what we want.
Cc: sta...@vger.kernel.org # 3.15
Signed-off-by: Anton Blanchard an...@samba.org
---
diff --git a/arch/powerpc/platforms/powernv/opal-sysparam.c
b/arch/powerpc/platforms/powernv/opal-sysparam.c
index d202f9b..9d1acf2 100644
---
The NX driver has endian issues so disable it for now.
Signed-off-by: Anton Blanchard an...@samba.org
---
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 03ccdb0..8280a7a3 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -313,7 +313,7 @@ config
Hi Linus !
Here is the bulk of the powerpc changes for this merge window. It got a bit
delayed in part because I wasn't paying attention, and in part because I
discovered I had a core PCI change without a PCI maintainer ack in it. Bjorn
eventually agreed it was ok to merge it though we'll
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