On Thu, Sep 25, 2014 at 02:14:20PM +1000, Gavin Shan wrote:
Please ignore this. I was told by Ben some drivers don't call
set_dev_mask(). So I have to fix it in another way.
Thanks,
Gavin
When using bypass window on IODA2, the incorrect DMA operations
dma_iommu_ops is used by devices. The
rtas_call() accepts and returns values in CPU endianness.
The ddw_query_response and ddw_create_response structs members are
defined and treated as BE but as they are passed to rtas_call() as
(u32 *) and they get byteswapped automatically, the data is CPU-endian.
This fixes ddw_query_response and
This patchset addresses endian issues and bugs in device tree update for
ibm,update-nodes and ibm,update-properties RTAS calls.
A subseqent patchset will deal with issues in device tree node addition
(ibm,configure-connector RTAS call) as well as more robust handling of
deleting critical device
Due to the requirement of of_changesets that of_changeset_apply be called
holding the of_mutex and that the of_mutex cannot be accessed nicely outside
the of code, added a wrapper which grabs the lock and called
of_changeset_apply.
Signed-off-by: Cyril Bur cyril@au1.ibm.com
---
These calls use a shared memory buffer to communicate device tree updates and
PAPR specifies that RTAS buffers are to be written in big endian. Used the
rtas buffer accessor to help solve both endian problems and standard buffer
access problems.
It seems more sane to stop trying to parse a
Added simple accessor functions for rtas in memory buffers which performs
accesses of appropriate type and performs endian conversions.
Signed-off-by: Cyril Bur cyril@au1.ibm.com
---
arch/powerpc/platforms/pseries/Makefile | 4 +-
arch/powerpc/platforms/pseries/pseries.h | 41
It is a rarely exercised case, so we want to have a test to ensure it
works as required.
Signed-off-by: Anton Blanchard an...@samba.org
Signed-off-by: Michael Ellerman m...@ellerman.id.au
---
arch/powerpc/include/asm/word-at-a-time.h | 13 +-
tools/testing/selftests/powerpc/Makefile
Hi Cyril,
Nit:
On Thu, 25 Sep 2014 16:41:28 +1000 Cyril Bur cyril@au1.ibm.com wrote:
Due to the requirement of of_changesets that of_changeset_apply be called
holding the of_mutex and that the of_mutex cannot be accessed nicely outside
the of code, added a wrapper which grabs the lock
On Thu, Sep 25, 2014 at 11:14:12AM +0800, Yijing Wang wrote:
Currently, PCI drivers will initialize bus-msi in
pcibios_add_bus(). pcibios_add_bus() will be called
in every pci bus initialization. So the bus-msi
assignment in pci_alloc_child_bus() is useless.
I think this should be the other
On Thu, Sep 25, 2014 at 11:14:11AM +0800, Yijing Wang wrote:
Msi_chip functions setup_irq/teardown_irq rarely use msi_chip
argument.
That's not true. Out of the four drivers that you modify two use the
parameter. And the two that don't probably should be using it too.
50% is not rarely. =)
On Thu, Sep 25, 2014 at 11:14:13AM +0800, Yijing Wang wrote:
Currently, pcie-designware, pcie-rcar, pci-tegra drivers
use irq chip_data to save the msi_chip pointer. They
already call irq_set_chip_data() in their own MSI irq map
functions. So irq_set_chip_data() in arch_setup_msi_irq()
is
When using bypass window on IODA2, the incorrect DMA operations
dma_iommu_ops is used by devices. The device driver calls
dma_get_required_mask() to determine using 32-bits or 64-bits
bypass DMA window. Unfortunately, the returned DMA mask always
forces the driver to use 32-bits DMA window. The
On Thu, Sep 25, 2014 at 11:14:16AM +0800, Yijing Wang wrote:
Introduce weak arch_find_msi_chip() to find the match msi_chip.
Currently, MSI chip associates pci bus to msi_chip. Because in
ARM platform, there may be more than one MSI controller in system.
Associate pci bus to msi_chip help pci
On Thu, Sep 25, 2014 at 11:14:22AM +0800, Yijing Wang wrote:
[...]
diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c
[...]
@@ -132,12 +132,12 @@ msi_irq_allocated:
/* Make sure the search for available interrupts didn't fail */
if (irq = 64) {
if
On Thu, Sep 25, 2014 at 11:14:24AM +0800, Yijing Wang wrote:
Use MSI chip framework instead of arch MSI functions to configure
MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.
Nit: s/irq/IRQ/ in the above.
Signed-off-by: Yijing Wang wangyij...@huawei.com
---
On Thu, Sep 25, 2014 at 11:14:25AM +0800, Yijing Wang wrote:
[...]
diff --git a/arch/mips/pci/pci-xlr.c b/arch/mips/pci/pci-xlr.c
[...]
@@ -214,11 +214,11 @@ static int get_irq_vector(const struct pci_dev *dev)
}
#ifdef CONFIG_PCI_MSI
-void arch_teardown_msi_irq(unsigned int irq)
+void
On Thu, Sep 25, 2014 at 11:14:27AM +0800, Yijing Wang wrote:
[...]
diff --git a/arch/s390/pci/pci.c b/arch/s390/pci/pci.c
[...]
@@ -358,7 +358,7 @@ static void zpci_irq_handler(struct airq_struct *airq)
}
}
-int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
+int
On Thu, Sep 25, 2014 at 11:14:10AM +0800, Yijing Wang wrote:
This series is based Bjorn's pci/msi branch
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git pci/msi
Currently, there are a lot of weak arch functions in MSI code.
Thierry Reding Introduced MSI chip framework to
On Wed, Sep 24, 2014 at 12:27:15PM -0700, Sukadev Bhattiprolu wrote:
From: Cody P Schafer c...@linux.vnet.ibm.com
Enable event specification like:
pmu/event_name,param1=0x1,param2=0x4/
Assuming that
/sys/bus/event_source/devices/pmu/events/event_name
Contains something
On Thu, 25 Sep 2014, Thierry Reding wrote:
On Thu, Sep 25, 2014 at 11:14:11AM +0800, Yijing Wang wrote:
Msi_chip functions setup_irq/teardown_irq rarely use msi_chip
argument.
That's not true. Out of the four drivers that you modify two use the
parameter. And the two that don't probably
Hi, Scott and Mike,
Could you please help review this patch and give an ACK if ok. Thanks.
Best Regards,
Jingchang
-Original Message-
From: Jingchang Lu [mailto:jingchang...@freescale.com]
Sent: Tuesday, September 23, 2014 2:47 PM
To: mturque...@linaro.org
Cc: Wood Scott-B07421;
On Thu, 25 Sep 2014, Yijing Wang wrote:
Introduce weak arch_find_msi_chip() to find the match msi_chip.
Currently, MSI chip associates pci bus to msi_chip. Because in
ARM platform, there may be more than one MSI controller in system.
Associate pci bus to msi_chip help pci device to find the
Hi Jingchang,
On 09/23/2014 09:46 AM, Jingchang Lu wrote:
The IP is shared by PPC and ARM, this renames it to qoriq for better
represention, and this also adds the CLK_OF_DECLARE support for being
initialized by of_clk_init() on ARM.
I think you need to also update
On Thu, Sep 25, 2014 at 11:14:10AM +0800, Yijing Wang wrote:
This series is based Bjorn's pci/msi branch
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git pci/msi
Is there a git tree for these patches?
Currently, there are a lot of weak arch functions in MSI code.
Thierry Reding
On Thu, Sep 25, 2014 at 11:14:14AM +0800, Yijing Wang wrote:
Commit 0e4ccb150 added two __weak arch functions arch_msix_mask_irq()
and arch_msi_mask_irq() to fix a bug found when running xen in x86.
Introduced these two funcntions make MSI code complex. And mask/unmask
These two functions made
On Fri 2014-09-05 12:17:16, Peter Hurley wrote:
On 09/05/2014 08:37 AM, David Laight wrote:
From: Peter Hurley
On 09/05/2014 04:30 AM, David Laight wrote:
I've seen gcc generate 32bit accesses for 16bit structure members on arm.
It does this because of the more limited range of the
On Thu, Sep 25, 2014 at 03:48:55PM +0100, Liviu Dudau wrote:
On Thu, Sep 25, 2014 at 09:42:36AM +0200, Thierry Reding wrote:
On Thu, Sep 25, 2014 at 11:14:10AM +0800, Yijing Wang wrote:
This series is based Bjorn's pci/msi branch
Well, like I said, I'd rather see the CLK_OF_DECLARE stuff be made to
work on PPC rather than have the driver carry around two binding
methods.
-Scott
On Thu, 2014-09-25 at 04:47 -0500, Lu Jingchang-B35083 wrote:
Hi, Scott and Mike,
Could you please help review this patch and give an ACK
On Thu, 2014-09-25 at 10:47 +0800, Zhao Qiang wrote:
qe need to call some common functions, move them into
public directory, add a new file drivers/soc/qe/qe_common.c
for them.
Signed-off-by: Zhao Qiang b45...@freescale.com
---
drivers/soc/qe/Makefile| 2 +-
Quoting Jingchang Lu (2014-09-22 23:46:46)
The IP is shared by PPC and ARM, this renames it to qoriq for better
represention, and this also adds the CLK_OF_DECLARE support for being
initialized by of_clk_init() on ARM.
Signed-off-by: Jingchang Lu jingchang...@freescale.com
---
changes in
On Thu, 2014-09-25 at 17:24 +1000, Gavin Shan wrote:
When using bypass window on IODA2, the incorrect DMA operations
dma_iommu_ops is used by devices. The device driver calls
dma_get_required_mask() to determine using 32-bits or 64-bits
bypass DMA window. Unfortunately, the returned DMA mask
On Thu, 2014-09-25 at 14:39 -0700, Mike Turquette wrote:
Quoting Jingchang Lu (2014-09-22 23:46:46)
+CLK_OF_DECLARE(qoriq_core_pll_v1, fsl,qoriq-core-pll-1.0, core_pll_init);
+CLK_OF_DECLARE(qoriq_core_pll_v2, fsl,qoriq-core-pll-2.0, core_pll_init);
+CLK_OF_DECLARE(qoriq_core_mux_v1,
On Thu, Sep 25, 2014 at 09:42:36AM +0200, Thierry Reding wrote:
On Thu, Sep 25, 2014 at 11:14:10AM +0800, Yijing Wang wrote:
This series is based Bjorn's pci/msi branch
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git pci/msi
Currently, there are a lot of weak arch functions
On Thu, Sep 25, 2014 at 06:49:38PM +0200, Thierry Reding wrote:
On Thu, Sep 25, 2014 at 03:48:55PM +0100, Liviu Dudau wrote:
On Thu, Sep 25, 2014 at 09:42:36AM +0200, Thierry Reding wrote:
On Thu, Sep 25, 2014 at 11:14:10AM +0800, Yijing Wang wrote:
This series is based Bjorn's pci/msi
On 09/24/2014 11:41 PM, Cyril Bur wrote:
Due to the requirement of of_changesets that of_changeset_apply be called
holding the of_mutex and that the of_mutex cannot be accessed nicely outside
the of code, added a wrapper which grabs the lock and called
of_changeset_apply.
Signed-off-by:
On 09/24/2014 11:41 PM, Cyril Bur wrote:
Added simple accessor functions for rtas in memory buffers which performs
accesses of appropriate type and performs endian conversions.
Signed-off-by: Cyril Bur cyril@au1.ibm.com
---
arch/powerpc/platforms/pseries/Makefile | 4 +-
Quoting Scott Wood (2014-09-25 13:08:00)
Well, like I said, I'd rather see the CLK_OF_DECLARE stuff be made to
work on PPC rather than have the driver carry around two binding
methods.
I guess that is an existing problem, and not related directly to this
patch? This patch is essentially just
On Thu, 2014-09-25 at 15:54 -0700, Mike Turquette wrote:
Quoting Scott Wood (2014-09-25 13:08:00)
Well, like I said, I'd rather see the CLK_OF_DECLARE stuff be made to
work on PPC rather than have the driver carry around two binding
methods.
I guess that is an existing problem, and not
On Fri, Sep 26, 2014 at 07:51:56AM +1000, Benjamin Herrenschmidt wrote:
On Thu, 2014-09-25 at 17:24 +1000, Gavin Shan wrote:
When using bypass window on IODA2, the incorrect DMA operations
dma_iommu_ops is used by devices. The device driver calls
dma_get_required_mask() to determine using
On Thursday, September 11, 2014 05:03:22 PM Viresh Kumar wrote:
On 11 September 2014 15:43, Shilpasri G Bhat
shilpa.b...@linux.vnet.ibm.com wrote:
This patch ensures the cpus to kexec/reboot at nominal frequency.
Nominal frequency is the highest cpu frequency on PowerPC at
which the cores
On Thu, 2014-09-25 at 15:47 -0700, Tyrel Datwyler wrote:
On 09/24/2014 11:41 PM, Cyril Bur wrote:
Added simple accessor functions for rtas in memory buffers which performs
accesses of appropriate type and performs endian conversions.
Signed-off-by: Cyril Bur cyril@au1.ibm.com
---
On 2014/9/25 15:06, Thierry Reding wrote:
On Thu, Sep 25, 2014 at 11:14:12AM +0800, Yijing Wang wrote:
Currently, PCI drivers will initialize bus-msi in
pcibios_add_bus(). pcibios_add_bus() will be called
in every pci bus initialization. So the bus-msi
assignment in pci_alloc_child_bus() is
On 2014/9/25 15:15, Thierry Reding wrote:
On Thu, Sep 25, 2014 at 11:14:11AM +0800, Yijing Wang wrote:
Msi_chip functions setup_irq/teardown_irq rarely use msi_chip
argument.
That's not true. Out of the four drivers that you modify two use the
parameter. And the two that don't probably
On 2014/9/25 15:19, Thierry Reding wrote:
On Thu, Sep 25, 2014 at 11:14:13AM +0800, Yijing Wang wrote:
Currently, pcie-designware, pcie-rcar, pci-tegra drivers
use irq chip_data to save the msi_chip pointer. They
already call irq_set_chip_data() in their own MSI irq map
functions. So
On 2014/9/25 15:26, Thierry Reding wrote:
On Thu, Sep 25, 2014 at 11:14:16AM +0800, Yijing Wang wrote:
Introduce weak arch_find_msi_chip() to find the match msi_chip.
Currently, MSI chip associates pci bus to msi_chip. Because in
ARM platform, there may be more than one MSI controller in
On 2014/9/25 15:34, Thierry Reding wrote:
On Thu, Sep 25, 2014 at 11:14:22AM +0800, Yijing Wang wrote:
[...]
diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c
[...]
@@ -132,12 +132,12 @@ msi_irq_allocated:
/* Make sure the search for available interrupts didn't fail
On 2014/9/25 15:36, Thierry Reding wrote:
On Thu, Sep 25, 2014 at 11:14:24AM +0800, Yijing Wang wrote:
Use MSI chip framework instead of arch MSI functions to configure
MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.
Nit: s/irq/IRQ/ in the above.
Signed-off-by:
On 2014/9/25 15:38, Thierry Reding wrote:
On Thu, Sep 25, 2014 at 11:14:27AM +0800, Yijing Wang wrote:
[...]
diff --git a/arch/s390/pci/pci.c b/arch/s390/pci/pci.c
[...]
@@ -358,7 +358,7 @@ static void zpci_irq_handler(struct airq_struct *airq)
}
}
-int arch_setup_msi_irqs(struct
On 2014/9/25 18:20, Thomas Gleixner wrote:
On Thu, 25 Sep 2014, Thierry Reding wrote:
On Thu, Sep 25, 2014 at 11:14:11AM +0800, Yijing Wang wrote:
Msi_chip functions setup_irq/teardown_irq rarely use msi_chip
argument.
That's not true. Out of the four drivers that you modify two use the
On 2014/9/25 15:37, Thierry Reding wrote:
On Thu, Sep 25, 2014 at 11:14:25AM +0800, Yijing Wang wrote:
[...]
diff --git a/arch/mips/pci/pci-xlr.c b/arch/mips/pci/pci-xlr.c
[...]
@@ -214,11 +214,11 @@ static int get_irq_vector(const struct pci_dev *dev)
}
#ifdef CONFIG_PCI_MSI
-void
Jiri Olsa [jo...@redhat.com] wrote:
| On Wed, Sep 24, 2014 at 12:27:15PM -0700, Sukadev Bhattiprolu wrote:
| From: Cody P Schafer c...@linux.vnet.ibm.com
|
| Enable event specification like:
|
| pmu/event_name,param1=0x1,param2=0x4/
|
| Assuming that
|
|
On 2014/9/25 18:38, Thomas Gleixner wrote:
On Thu, 25 Sep 2014, Yijing Wang wrote:
Introduce weak arch_find_msi_chip() to find the match msi_chip.
Currently, MSI chip associates pci bus to msi_chip. Because in
ARM platform, there may be more than one MSI controller in system.
Associate pci
On 2014/9/25 18:38, Thomas Gleixner wrote:
On Thu, 25 Sep 2014, Yijing Wang wrote:
Introduce weak arch_find_msi_chip() to find the match msi_chip.
Currently, MSI chip associates pci bus to msi_chip. Because in
ARM platform, there may be more than one MSI controller in system.
Associate pci
On 2014/9/25 22:23, Konrad Rzeszutek Wilk wrote:
On Thu, Sep 25, 2014 at 11:14:10AM +0800, Yijing Wang wrote:
This series is based Bjorn's pci/msi branch
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git pci/msi
Is there a git tree for these patches?
Hi Konrad, my git tree in
On 2014/9/25 22:33, Konrad Rzeszutek Wilk wrote:
On Thu, Sep 25, 2014 at 11:14:14AM +0800, Yijing Wang wrote:
Commit 0e4ccb150 added two __weak arch functions arch_msix_mask_irq()
and arch_msi_mask_irq() to fix a bug found when running xen in x86.
Introduced these two funcntions make MSI code
I am actually in disagreement with you, Thierry. I don't like the general
direction
of the patches, or at least I don't like the fact that we don't have a
portable
way of setting up the msi_chip without having to rely on weak architectural
hooks.
Oh, good. That's actually one of the
From: Ian Munsie imun...@au1.ibm.com
Currently spu_handle_mm_fault() is in the cell platform.
This code is generically useful for other non-cell co-processors on
powerpc.
This patch moves this function out of the cell platform into
arch/powerpc/mm so that others may use it.
From: Ian Munsie imun...@au1.ibm.com
__spu_trap_data_seg() currently contains code to determine the VSID
and ESID required for a particular EA and mm struct.
This code is generically useful for other co-processors. This moves
the code of the cell platform so it can be used by other
From: Ian Munsie imun...@au1.ibm.com
This add a hook into tlbie() so that we use global invalidations when
there are cxl contexts active.
Normally cxl snoops broadcast tlbie. cxl can have TLB entries
invalidated via MMIO, but we aren't doing that yet. So for now we
are just disabling
From: Ian Munsie imun...@au1.ibm.com
This adds the OPAL call to change a PHB into cxl mode.
Signed-off-by: Ian Munsie imun...@au1.ibm.com
Signed-off-by: Michael Neuling mi...@neuling.org
Reviewed-by: Anton Blanchard an...@samba.org
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