Hello Viresh,
When I use -C -M options, checkpatch reports error:
[tangyt@titan linux-pm]$ ./scripts/checkpatch.pl
0002-cpufreq-qoriq-rename-the-driver.patch
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#15:
drivers/cpufreq/{ppc-corenet-cpufreq.c =
On 21 November 2014 14:46, Yuantian Tang yuantian.t...@freescale.com wrote:
When I use -C -M options, checkpatch reports error:
[tangyt@titan linux-pm]$ ./scripts/checkpatch.pl
0002-cpufreq-qoriq-rename-the-driver.patch
WARNING: added, moved or deleted file(s), does MAINTAINERS need
Freescale introduced new ARM core-based SoCs which support dynamic
frequency switch feature. DFS on new SoCs are compatible with current
PowerPC CoreNet platforms. In order to support those new platforms,
this driver needs to be updated. The main changes include:
1. Changed the names of functions
This driver works on all QorIQ platforms which include
ARM-based cores and PPC-based cores.
Rename it in order to represent better.
Signed-off-by: Tang Yuantian yuantian.t...@freescale.com
---
v2:
- use -C -M options when format-patch
drivers/cpufreq/{ppc-corenet-cpufreq.c =
On 21 November 2014 14:48, Tang Yuantian yuantian.t...@freescale.com wrote:
Freescale introduced new ARM core-based SoCs which support dynamic
frequency switch feature. DFS on new SoCs are compatible with current
PowerPC CoreNet platforms. In order to support those new platforms,
this driver
On Thu, Nov 20, 2014 at 04:50:25PM -0500, Sasha Levin wrote:
On 11/20/2014 05:19 AM, Mel Gorman wrote:
V1 failed while running under kvm-tools very quickly and a second report
indicated that it happens on bare metal as well. This version survived
an overnight run of trinity running under
On Thu, Nov 20, 2014 at 11:54:06AM -0800, Linus Torvalds wrote:
On Thu, Nov 20, 2014 at 2:19 AM, Mel Gorman mgor...@suse.de wrote:
This is a preparatory patch that introduces protnone helpers for automatic
NUMA balancing.
Oh, I hadn't noticed that you had renamed these things. It was
On Fri, Nov 21, 2014 at 02:53:01AM +, Yijing Wang wrote:
pci_create_host_bridge() can get pci_host_bridge ops while
pci_create_root_bus() gets
the bus ops. For find out the MSI controller, the domain number and any
other HB
specific stuff, you use the HB ops. For config R/W acceses
On 11/14/2014 03:30 PM, Denis Kirjanov wrote:
On 11/13/14, Anshuman Khandual khand...@linux.vnet.ibm.com wrote:
On 11/11/2014 10:56 AM, Anshuman Khandual wrote:
This patch enables get and set of miscellaneous debug registers through
ptrace PTRACE_GETREGSET-PTRACE_SETREGSET interface by
From: Markus Elfring elfr...@users.sourceforge.net
Date: Fri, 21 Nov 2014 12:40:32 +0100
The tty_kref_put() function tests whether its argument is NULL and then
returns immediately. Thus the test around the call is not needed.
This issue was detected by using the Coccinelle software.
On 11/19/2014 02:48 AM, Sukadev Bhattiprolu wrote:
Anshuman Khandual [khand...@linux.vnet.ibm.com] wrote:
| This patch enables get and set of transactional memory related register
| sets through PTRACE_GETREGSET-PTRACE_SETREGSET interface by implementing
| four new powerpc specific register
On 11/11/2014 10:56 AM, Anshuman Khandual wrote:
This patch creates a new function called flush_tm_state to flush
the existing transactional memory state from the thread. It also
creates a function called flush_tmregs_to_thread which will then
be used on subsequent patches in this series.
A transhuge NUMA hinting fault may find the page is migrating and should
wait until migration completes. The check is race-prone because the pmd
is deferenced outside of the page lock and while the race is tiny, it'll
be larger if the PMD is cleared while marking PMDs for hinting fault.
This patch
The main change here is to rebase on mmotm-20141119 as the series had
significant conflicts that were non-obvious to resolve. The main blockers
for merging are independent testing from Sasha (trinity), independent
testing from Aneesh (ppc64 support) and acks from Ben and Paul on the
powerpc
This is a preparatory patch that introduces protnone helpers for automatic
NUMA balancing.
Signed-off-by: Mel Gorman mgor...@suse.de
Acked-by: Linus Torvalds torva...@linux-foundation.org
Acked-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/pgtable.h | 15
Convert existing users of pte_numa and friends to the new helper. Note
that the kernel is broken after this patch is applied until the other
page table modifiers are also altered. This patch layout is to make
review easier.
Signed-off-by: Mel Gorman mgor...@suse.de
Acked-by: Linus Torvalds
ppc64 should not be depending on DSISR_PROTFAULT and it's unexpected
if they are triggered. This patch adds warnings just in case they
are being accidentally depended upon.
Signed-off-by: Mel Gorman mgor...@suse.de
Acked-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
With PROT_NONE, the traditional page table manipulation functions are
sufficient.
Signed-off-by: Mel Gorman mgor...@suse.de
Acked-by: Linus Torvalds torva...@linux-foundation.org
Acked-by: Aneesh Kumar aneesh.ku...@linux.vnet.ibm.com
---
include/linux/huge_mm.h | 3 +--
mm/huge_memory.c
This patch removes the NUMA PTE bits and associated helpers. As a side-effect
it increases the maximum possible swap space on x86-64.
One potential source of problems is races between the marking of PTEs
PROT_NONE, NUMA hinting faults and migration. It must be guaranteed that
a PTE being
Faults on the huge zero page are pointless and there is a BUG_ON
to catch them during fault time. This patch reintroduces a check
that avoids marking the zero page PAGE_NONE.
Signed-off-by: Mel Gorman mgor...@suse.de
---
include/linux/huge_mm.h | 3 ++-
mm/huge_memory.c| 13
Commit b38af4721f59 (x86,mm: fix pte_special versus pte_numa) adjusted
the pte_special check to take into account that a special pte had SPECIAL
and neither PRESENT nor PROTNONE. Now that NUMA hinting PTEs are no
longer modifying _PAGE_PRESENT it should be safe to restore the original
pte_special
pte_protnone_numa is only safe to use after VMA checks for PROT_NONE are
complete. Treating a real PROT_NONE PTE as a NUMA hinting fault is going
to result in strangeness so add a check for it. BUG_ON looks like overkill
but if this is hit then it's a serious bug that could result in corruption
so
If a PTE or PMD is already marked NUMA when scanning to mark entries
for NUMA hinting then it is not necessary to update the entry and
incur a TLB flush penalty. Avoid the avoidhead where possible.
Signed-off-by: Mel Gorman mgor...@suse.de
---
mm/huge_memory.c | 14 --
mm/mprotect.c
On Thu, Nov 20, 2014 at 05:24:17PM +0100, Christophe Leroy wrote:
On CPM1, when the SPI parameter RAM is relocated to somewhere else than the
default location, in accordance with freescale documentation
(refer micropatch SPI application note EB662), init RX/TX params command shall
not be used
On Tue, 11 Nov 2014 10:56:30 +0530 Anshuman Khandual
khand...@linux.vnet.ibm.com wrote:
This patch adds four new core note sections for PowerPC transactional
memory and one core note section for general miscellaneous debug registers.
These addition of new elf core note sections extends the
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