On 06/02/2015 09:56 AM, Cyril Bur wrote:
Powerpc powernv platforms allow access to certain system flash devices
through a firmwarwe interface. This change adds an mtd driver for these
flash devices.
Minor updates from Jeremy Kerr and Joel Stanley.
Signed-off-by: Cyril Bur
Signed-off-by: Joel
On 2015/6/2 11:45, Michael Ellerman wrote:
> On Mon, 2015-01-06 at 08:05:42 UTC, Jiang Liu wrote:
>> Use irq_data access helper to access irq_data->msi_desc, so we could
>> move msi_desc from struct irq_data into struct irq_common_data later.
>>
>> Signed-off-by: Jiang Liu
>> ---
>> arch/powerpc/
Hi Michael,
Please add below minor additions in commit log once u
accept this patch. Thanks for your help with this. Let me know,
if anything else is needed from me on this.
Regards,
Vipin
On 05/18/2015 08:48 PM, Vipin K Parashar wrote:
This patch adds support for FSP EPOW (Early P
We print the respective warning after parsing EPOW interrupts,
prompting user to take action depending upon the severity of the
event.
Some times same EPOW event warning, such as below could flood kernel
log, over a period of time. So Limit the warnings by using ratelimit
variant of pr_err. Also,
* Michael Ellerman [2015-06-01 21:26:51]:
> On Thu, 2015-05-28 at 10:03 +0530, Kamalesh Babulal wrote:
> > We print the respective warning after parsing EPOW interrupts,
> > prompting user to take action depending upon the severity of the
> > event.
> >
> > Some times same EPOW event warning, su
On Fri, May 29, 2015 at 06:44:58PM +1000, Alexey Kardashevskiy wrote:
> This adds create/remove window ioctls to create and remove DMA windows.
> sPAPR defines a Dynamic DMA windows capability which allows
> para-virtualized guests to create additional DMA windows on a PCI bus.
> The existing linux
On Fri, May 29, 2015 at 06:44:57PM +1000, Alexey Kardashevskiy wrote:
> The existing implementation accounts the whole DMA window in
> the locked_vm counter. This is going to be worse with multiple
> containers and huge DMA windows. Also, real-time accounting would requite
> additional tracking of
Powerpc powernv platforms allow access to certain system flash devices
through a firmwarwe interface. This change adds an mtd driver for these
flash devices.
Minor updates from Jeremy Kerr and Joel Stanley.
Signed-off-by: Cyril Bur
Signed-off-by: Joel Stanley
Signed-off-by: Jeremy Kerr
---
Hel
On Tue, Jun 02, 2015 at 11:51:15AM +0800, Wei Yang wrote:
>On Mon, Jun 01, 2015 at 06:32:33PM -0500, Bjorn Helgaas wrote:
>>The subject says "Trace first 7 BARs..." I think maybe you meant "Track
>>first 7 BARs" or maybe "Cache only BARs, not windows or IOV BARs"
>>
>
>Agree, Track is more accurat
On Mon, 2015-01-06 at 03:26:44 UTC, Cyril Bur wrote:
> Powerpc powernv platforms allow access to certain system flash devices
> through a firmwarwe interface. This change adds an mtd driver for these
> flash devices.
>
> Minor updates from Jeremy Kerr and Joel Stanley.
>
> Signed-off-by: Cyril Bu
On Mon, Jun 01, 2015 at 06:32:33PM -0500, Bjorn Helgaas wrote:
>The subject says "Trace first 7 BARs..." I think maybe you meant "Track
>first 7 BARs" or maybe "Cache only BARs, not windows or IOV BARs"
>
Agree, Track is more accurate.
Gavin,
Which subject you prefer?
>On Tue, May 19, 2015 at
On Mon, Jun 01, 2015 at 06:20:05PM -0500, Bjorn Helgaas wrote:
>On Tue, May 19, 2015 at 06:50:05PM +0800, Wei Yang wrote:
>> As commit ac205b7b ("PCI: make sriov work with hotplug remove") indicates,
>
>The conventional reference is:
>
> ac205b7bb72f ("PCI: make sriov work with hotplug remove")
>
On Mon, 2015-01-06 at 08:05:42 UTC, Jiang Liu wrote:
> Use irq_data access helper to access irq_data->msi_desc, so we could
> move msi_desc from struct irq_data into struct irq_common_data later.
>
> Signed-off-by: Jiang Liu
> ---
> arch/powerpc/sysdev/xics/ics-opal.c |2 +-
> arch/powerpc/s
On Tue, 2015-06-02 at 10:53, Wood Scott wrote:
> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, June 02, 2015 10:53 AM
> To: Zhao Qiang-B45475
> Cc: linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org;
> net...@vger.kernel.org
> Subject: Re: [PATCH v5] QE: Move QE f
ls1 has qe and ls1 has arm cpu.
move qe from arch/powerpc to drivers/soc/fsl
to adapt to powerpc and arm
Signed-off-by: Zhao Qiang
---
Changes for v2:
- move code to driver/soc
Changes for v3:
- change drivers/soc/qe to drivers/soc/fsl-qe
Changes for v4:
- move drivers/soc
On Tue, 2015-06-02 at 10:37 +0800, Zhao Qiang wrote:
> ls1 has qe and ls1 has arm cpu.
> move qe from arch/powerpc to drivers/soc/fsl
> to adapt to powerpc and arm
>
> Signed-off-by: Zhao Qiang
> ---
> Changes for v2:
> - move code to driver/soc
> Changes for v3:
> - change drivers/so
On Fri, May 29, 2015 at 06:44:56PM +1000, Alexey Kardashevskiy wrote:
> We are adding support for DMA memory pre-registration to be used in
> conjunction with VFIO. The idea is that the userspace which is going to
> run a guest may want to pre-register a user space memory region so
> it all gets pi
On Fri, May 29, 2015 at 06:44:55PM +1000, Alexey Kardashevskiy wrote:
> Before the IOMMU user (VFIO) would take control over the IOMMU table
> belonging to a specific IOMMU group. This approach did not allow sharing
> tables between IOMMU groups attached to the same container.
>
> This introduces
On Fri, May 29, 2015 at 06:44:54PM +1000, Alexey Kardashevskiy wrote:
> This adds a way for the IOMMU user to know how much a new table will
> use so it can be accounted in the locked_vm limit before allocation
> happens.
>
> This stores the allocated table size in pnv_pci_ioda2_get_table_size()
>
On Fri, May 29, 2015 at 06:44:53PM +1000, Alexey Kardashevskiy wrote:
> The existing code programmed TVT#0 with some address and then
> immediately released that memory.
>
> This makes use of pnv_pci_ioda2_unset_window() and
> pnv_pci_ioda2_set_bypass() which do correct resource release and
> TVT
On Fri, May 29, 2015 at 06:44:52PM +1000, Alexey Kardashevskiy wrote:
> This extends iommu_table_group_ops by a set of callbacks to support
> dynamic DMA windows management.
>
> create_table() creates a TCE table with specific parameters.
> it receives iommu_table_group to know nodeid in order to
On Mon, 2015-06-01 at 15:56 +0200, Philippe Bergheaud wrote:
> Michael Neuling wrote:
> > Please use negative error codes here. -EIO?
> > And check it here.
>
> Mikey,
>
> I am reluctant to fail the entire CAPI init after a PSL timebase sync failure.
> If we ignore the error, the CAPI device s
On Fri, May 29, 2015 at 06:44:51PM +1000, Alexey Kardashevskiy wrote:
> TCE tables might get too big in case of 4K IOMMU pages and DDW enabled
> on huge guests (hundreds of GB of RAM) so the kernel might be unable to
> allocate contiguous chunk of physical memory to store the TCE table.
>
> To add
On Fri, May 29, 2015 at 06:44:50PM +1000, Alexey Kardashevskiy wrote:
> This is a part of moving DMA window programming to an iommu_ops
> callback. pnv_pci_ioda2_set_window() takes an iommu_table_group as
> a first parameter (not pnv_ioda_pe) as it is going to be used as
> a callback for VFIO DDW c
On Tue, May 19, 2015 at 06:50:10PM +0800, Wei Yang wrote:
> After PE reset, OPAL API opal_pci_reinit() is called on all devices
> contained in the PE to reinitialize them. However, VFs can't be seen
> from skiboot firmware. We have to implement the functions, similar
> those in skiboot firmware, to
On Tue, May 19, 2015 at 06:50:08PM +0800, Wei Yang wrote:
> Current EEH recovery code works with the assumption: the PE has primary
> bus. Unfortunately, that's not true to VF PEs, which generally contains
"Primary bus" normally means the bus on the upstream side of a PCI bridge.
But a PE is not a
On Tue, May 19, 2015 at 06:50:08PM +0800, Wei Yang wrote:
> Current EEH recovery code works with the assumption: the PE has primary
> bus. Unfortunately, that's not true to VF PEs, which generally contains
> one or multiple VFs (for VF group case). The patch creates PEs for VFs
> at PCI final fixup
The subject says "Trace first 7 BARs..." I think maybe you meant "Track
first 7 BARs" or maybe "Cache only BARs, not windows or IOV BARs"
On Tue, May 19, 2015 at 06:50:06PM +0800, Wei Yang wrote:
> EEH address cache, which helps to locate the PCI device according to
> the given (physical) MMIO ad
On Tue, May 19, 2015 at 06:50:05PM +0800, Wei Yang wrote:
> As commit ac205b7b ("PCI: make sriov work with hotplug remove") indicates,
The conventional reference is:
ac205b7bb72f ("PCI: make sriov work with hotplug remove")
> VFs, which might be hooked to same PCI bus as their PF should be rem
On Mon, 2015-06-01 at 00:04 -0500, Pan Lijun-B44306 wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Wednesday, May 13, 2015 5:18 PM
> > To: Pan Lijun-B44306
> > Cc: linuxppc-...@ozlabs.org
> > Subject: Re: [PATCH v3] powerpc/defconfig: new way of writing
> > defconfi
On Fri, 29 May 2015 10:13:25 -0400 Eric B Munson wrote:
> mlock() allows a user to control page out of program memory, but this
> comes at the cost of faulting in the entire mapping when it is
> allocated. For large mappings where the entire area is not necessary
> this is not ideal.
>
> This s
On Sun, 2015-05-31 at 23:09 -0500, Zhao Qiang-B45475 wrote:
> On Fri, Jan 30, 2015 at 1:22PM +0800, Wood Scott wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Friday, January 30, 2015 1:22 PM
> > To: Zhao Qiang-B45475
> > Cc: linux-ker...@vger.kernel.org; net...@vger.
On Mon, 2015-06-01 at 03:23 -0500, Liu Shengzhou-B36685 wrote:
> > Subject: Re: [2/4,v3] powerpc/fsl-booke: Add T1024 QDS board
> > support
> >
> > On Thu, Apr 09, 2015 at 04:07:43PM +0800, Shengzhou Liu wrote:
> > > + flash@2{
> > > + #address-cells = <1>
From: Igal Liberman
This patch adds two boolean properties to FMan Port.
FMan has 3 types of ports:
- 1G ports
By default, all ports support 1G rate
- 10G Ports
Port which use 10G hardware, and configured as 10G
- 10G Best effort ports
Michael Neuling wrote:
> Please use negative error codes here. -EIO?
> And check it here.
Mikey,
I am reluctant to fail the entire CAPI init after a PSL timebase sync failure.
If we ignore the error, the CAPI device stays available (without timebase sync).
If we honour the error, the CAPI devic
This patch introduces some functions for converting cputime to timespec64
and back, that repalce the timespec type with timespec64 type, as well as
for arch/s390 and arch/powerpc architecture.
And these new methods will replace the old
cputime_to_timespec/timespec_to_cputime
function to ready for
This patch series changes the 32-bit time types (timespec/itimerspec) to
the 64-bit types (timespec64/itimerspec64), since 32-bit time types will
break in the year 2038.
This patch series introduces new methods with timespec64/itimerspec64 type,
and removes the old ones with timespec/itimerspec ty
On Thu, 2015-05-28 at 10:03 +0530, Kamalesh Babulal wrote:
> We print the respective warning after parsing EPOW interrupts,
> prompting user to take action depending upon the severity of the
> event.
>
> Some times same EPOW event warning, such as below could flood kernel
> log, within very short
If both STRICT_MM_TYPECHECKS and DEBUG_PAGEALLOC are enabled, the code
in kernel_map_linear_page() is built, and so we fail with:
arch/powerpc/mm/hash_utils_64.c:1478:2:
error: incompatible type for argument 1 of 'htab_convert_pte_flags'
Fix it by using pgprot_val().
Reported-by: Geert Uytte
A working rtc kernel driver is needed so that hwclock can synchronize
system clock to rtc during shutdown/boot. We already have a rtc platform
driver for power arch located at drivers/rtc/rtc-opal.c However it
depends on CONFIG_RTC_CLASS which is disabled by default. So this driver
is not compiled
From: Anton Blanchard
When we take a PMU exception or a software event we call
perf_read_regs(). This overloads regs->result with a boolean that
describes if we should use the sampled instruction address register
(SIAR) or the regs.
If the exception is in kernel, we start with the kernel regs an
On Mon, Jun 1, 2015 at 12:09 PM, Geert Uytterhoeven
wrote:
> JFYI, when comparing v4.1-rc6[1] to v4.1-rc5[3], the summaries are:
> - build errors: +8/-52
+ /home/kisskb/slave/src/drivers/media/i2c/ov2659.c: error: 'struct
v4l2_subdev_fh' has no member named 'pad': => 1264:38
+ /home/kisskb
On Fri, May 29, 2015 at 10:49:27PM -0700, Andi Kleen wrote:
> On Fri, May 29, 2015 at 11:13:15AM +0200, Jiri Olsa wrote:
> > On Thu, May 28, 2015 at 10:45:06PM -0700, Sukadev Bhattiprolu wrote:
> > > Jiri Olsa [jo...@redhat.com] wrote:
> > > | > if (line[0] == '#' || line[0] == '\n')
These tests were merged in parallel to the install support, update them
now to use it.
This also adds cross compile support for the VPHN test which was missing
it.
Signed-off-by: Michael Ellerman
---
tools/testing/selftests/powerpc/switch_endian/Makefile | 14 --
tools/testing/selft
Michael Neuling wrote:
On Mon, 2015-06-01 at 09:37 +0200, Philippe Bergheaud wrote:
Michael Neuling wrote:
On Thu, 2015-05-28 at 15:12 +0200, Philippe Bergheaud wrote:
This patch configures the PSL Timebase function and enables it,
after the CAPP has been initialized by OPAL. Failures are
On Mon, 2015-06-01 at 09:37 +0200, Philippe Bergheaud wrote:
> Michael Neuling wrote:
> > On Thu, 2015-05-28 at 15:12 +0200, Philippe Bergheaud wrote:
> >
> >>This patch configures the PSL Timebase function and enables it,
> >>after the CAPP has been initialized by OPAL. Failures are reported
> >>
Hi Aisheng,
On Wed, May 27, 2015 at 7:46 PM, Suman Tripathi wrote:
>
>
> On Tue, May 26, 2015 at 6:06 PM, Ulf Hansson
> wrote:
>
>> On 21 May 2015 at 10:43, Suman Tripathi wrote:
>> > The sdhci framework disables SDR104/SDR50/DDR50 based on only quirk.
>> > This patch adds the support to disab
> Subject: Re: [2/4,v3] powerpc/fsl-booke: Add T1024 QDS board support
>
> On Thu, Apr 09, 2015 at 04:07:43PM +0800, Shengzhou Liu wrote:
> > + flash@2 {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > +
http://kisskb.ellerman.id.au/kisskb/buildresult/12433431/
arch/powerpc/mm/hash_utils_64.c:1478:2: error: incompatible type for
argument 1 of 'htab_convert_pte_flags'
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.o
Hi Finn,
On Sun, May 31, 2015 at 3:01 AM, Finn Thain wrote:
> A multi-platform kernel binary needs to decide at run-time how to dispatch
> the arch_nvram_ops calls. Add platform-independent arch_nvram_ops, for use
> when multiple platform-specific NVRAM ops implementations are needed.
Thanks for
Use irq_data access helper to access irq_data->msi_desc, so we could
move msi_desc from struct irq_data into struct irq_common_data later.
Signed-off-by: Jiang Liu
---
arch/ia64/kernel/msi_ia64.c |2 +-
arch/ia64/sn/kernel/msi_sn.c|2 +-
arch/powerpc/sysdev/xics/ics-opal.
Use access helper irq_data_get_affinity_mask() to hide implementation
details of struct irq_desc.
Signed-off-by: Jiang Liu
---
arch/powerpc/kernel/irq.c |2 +-
arch/powerpc/sysdev/xics/ics-opal.c |2 +-
arch/powerpc/sysdev/xics/ics-rtas.c |2 +-
3 files changed, 3 insertion
On Fri, May 29, 2015 at 06:44:49PM +1000, Alexey Kardashevskiy wrote:
> This is a part of moving TCE table allocation into an iommu_ops
> callback to support multiple IOMMU groups per one VFIO container.
>
> This moves the code which allocates the actual TCE tables to helpers:
> pnv_pci_ioda2_tabl
On Sun, May 31, 2015 at 3:01 AM, Finn Thain wrote:
> Signed-off-by: Finn Thain
Removal seems to be forgotten by full-history-linux
commit 17c6f4635bea74e110ab3558d408c9cd218c568a
Author: Benjamin Herrenschmidt
Date: Fri Feb 6 14:20:56 2004 +1100
ppc32: Rework nvram management
move d
Michael Neuling wrote:
On Thu, 2015-05-28 at 15:12 +0200, Philippe Bergheaud wrote:
This patch configures the PSL Timebase function and enables it,
after the CAPP has been initialized by OPAL. Failures are reported
and ignored.
Needs an Signed-off-by.
Yes.
Comments inline.
---
drivers/m
Am 28.05.2015 um 13:52 schrieb Dominik Dingel:
> Hi everyone,
>
> there is a potential bug with KVM and hugetlbfs if the hardware does not
> support hugepages (EDAT1).
> We fix this by making EDAT1 a hard requirement for hugepages and
> therefore removing and simplifying code.
The cleanup itself
On Fri, May 29, 2015 at 06:44:47PM +1000, Alexey Kardashevskiy wrote:
> At the moment writing new TCE value to the IOMMU table fails with EBUSY
> if there is a valid entry already. However PAPR specification allows
> the guest to write new TCE value without clearing it first.
>
> Another problem t
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