[PATCH V8 1/4] perf/powerpc: assign an id to each powerpc register

The enum definition assigns an 'id' to each register in "struct pt_regs" of arch/powerpc. The order of these values in the enum definition are based on the corresponding macros in arch/powerpc/include/uapi/asm/ptrace.h. Signed-off-by: Anju T Reviewed-by : Madhavan

[PATCH V8 2/4] perf/powerpc: add support for sampling intr machine state

The perf infrastructure uses a bit mask to find out valid registers to display. Define a register mask for supported registers defined in asm/perf_regs.h. The bit positions also correspond to register IDs which is used by perf infrastructure to fetch the register values. CONFIG_HAVE_PERF_REGS

[PATCH V8 3/4] tools/perf: Map the ID values with register names

Map ID values with corresponding register names. These names are then displayed when user issues perf record with the -I option followed by perf report/script with -D option. To test this patchset, Eg: $ perf record -I ls # record machine state at interrupt $ perf script -D # read the

[PATCH V1 4/4] tool/perf: Add sample_reg_mask to include all perf_regs regs

From: Madhavan Srinivasan Add sample_reg_mask array with pt_regs registers. This is needed for printing supported regs ( -I? option). Signed-off-by: Madhavan Srinivasan --- tools/perf/arch/powerpc/util/Build | 1 +

Re: [PATCH V8 3/4] tools/perf: Map the ID values with register names

On Fri, Jan 08, 2016 at 02:32:30PM +0530, Anju T wrote: SNIP > +#endif /* ARCH_PERF_REGS_H */ > diff --git a/tools/perf/config/Makefile b/tools/perf/config/Makefile > index 38a0853..acf0302 100644 > --- a/tools/perf/config/Makefile > +++ b/tools/perf/config/Makefile > @@ -23,6 +23,11 @@ $(call

[PATCH V8 0/4] perf/powerpc: Add ability to sample intr machine state in powerpc

This short patch series adds the ability to sample the interrupted machine state for each hardware sample. To test this patchset, Eg: $ perf record -I? # list supported registers output: available registers: gpr0 gpr1 gpr2 gpr3 gpr4 gpr5 gpr6 gpr7 gpr8 gpr9 gpr10 gpr11 gpr12 gpr13 gpr14

simple_alloc space tramples initrd

Hi, A powerpc machine I'm working on has this problem where the simple_alloc_init() area is trampling the initrd. The two are placed fairly close together. I have a fix for this proposed to add a section into arch/powerpc/boot/zImage.lds.S called "mallocarea" to account for this space, but not

[PATCH v2 2/2] cxl: use -Werror only with CONFIG_PPC_WERROR

Some developers really like to have -Werror enabled for their code, as it helps to ensure warning free code. Others don't want -Werror, as it (for example) can cause problems when newer (or older) compilers have different sets of warnings, or new warnings can appear just when turning up the

Re: [PATCH 2/6] QE: Add ucc hdlc document to bindings

On Fri, Jan 08, 2016 at 10:18:10AM +0800, Zhao Qiang wrote: > Add ucc hdlc document to > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt > > Signed-off-by: Zhao Qiang > --- > .../bindings/powerpc/fsl/cpm_qe/network.txt| 35 > ++ >

Re: [PATCH 1/3] TDM: Add maxim ds26522 document to bindings

On Fri, Jan 08, 2016 at 10:46:53AM +0800, Zhao Qiang wrote: > Add maxim ds26522 document to > Documentation/devicetree/bindings/tdm/maxim,ds26522.txt > > Signed-off-by: Zhao Qiang > --- > Documentation/devicetree/bindings/tdm/maxim,ds26522.txt | 13 + > 1 file

Re: [PATCH 1/6] QE: Add IC, SI and SIRAM document to device tree bindings.

On Fri, Jan 08, 2016 at 10:18:09AM +0800, Zhao Qiang wrote: > Add IC, SI and SIRAM document of QE to > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt > > Signed-off-by: Zhao Qiang > --- > .../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt | 53 >

Re: [PATCH 3/6] QE: Add uqe_serial document to bindings

On Fri, Jan 08, 2016 at 10:18:11AM +0800, Zhao Qiang wrote: > Add uqe_serial document to > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt > > Signed-off-by: Zhao Qiang > --- > .../bindings/powerpc/fsl/cpm_qe/uqe_serial.txt | 20 >

[PATCH v2 1/2] cxl: fix build for GCC 4.6.x

GCC 4.6.3 does not support -Wno-unused-const-variable. Instead, use the kbuild infrastructure that checks if this options exists. Fixes: 2cd55c68c0a4 ("cxl: Fix build failure due to -Wunused-variable behaviour change") Suggested-by: Michal Marek Suggested-by: Arnd Bergmann

[PATCH V9 3/4] tools/perf: Map the ID values with register names

Map ID values with corresponding register names. These names are then displayed when user issues perf record with the -I option followed by perf report/script with -D option. To test this patchset, Eg: $ perf record -I ls # record machine state at interrupt $ perf script -D # read the

[PATCH V9 0/4] perf/powerpc: Add ability to sample intr machine state in powerpc

This short patch series adds the ability to sample the interrupted machine state for each hardware sample. To test this patchset, Eg: $ perf record -I? # list supported registers output: available registers: gpr0 gpr1 gpr2 gpr3 gpr4 gpr5 gpr6 gpr7 gpr8 gpr9 gpr10 gpr11 gpr12 gpr13 gpr14

[PATCH V9 1/4] perf/powerpc: assign an id to each powerpc register

The enum definition assigns an 'id' to each register in "struct pt_regs" of arch/powerpc. The order of these values in the enum definition are based on the corresponding macros in arch/powerpc/include/uapi/asm/ptrace.h. Signed-off-by: Anju T Reviewed-by : Madhavan

[PATCH V9 2/4] perf/powerpc: add support for sampling intr machine state

The perf infrastructure uses a bit mask to find out valid registers to display. Define a register mask for supported registers defined in asm/perf_regs.h. The bit positions also correspond to register IDs which is used by perf infrastructure to fetch the register values. CONFIG_HAVE_PERF_REGS

[PATCH V1 4/4] tool/perf: Add sample_reg_mask to include all perf_regs regs

From: Madhavan Srinivasan Add sample_reg_mask array with pt_regs registers. This is needed for printing supported regs ( -I? option). Signed-off-by: Madhavan Srinivasan --- tools/perf/arch/powerpc/util/Build | 1 +

Re: [RFC][PATCH] ppc: Implement save_stack_trace_regs()

On Wed, 16 Dec 2015 12:24:19 -0500 Steven Rostedt wrote: > On Wed, 09 Dec 2015 12:03:05 +1100 > Michael Ellerman wrote: > > > > > Should I take this via powerpc or do you want it to go in via tracing? > > > > > > > > > > You can take it. And you

Re: [PATCH v4] perf: bpf: Fix build breakage due to libbpf

Hi Arnaldo, On Fri, Jan 08, 2016 at 10:46:08AM -0300, Arnaldo Carvalho de Melo wrote: > Em Fri, Jan 08, 2016 at 09:31:46PM +0800, Wangnan (F) escreveu: > > On 2016/1/8 20:51, Arnaldo Carvalho de Melo wrote: > > >Em Fri, Jan 08, 2016 at 11:09:35AM +0530, Naveen N. Rao escreveu: > > >>On 2016/01/07

Re: [PATCH 3/3] checkpatch: add virt barriers

On Mon, Jan 04, 2016 at 02:11:37PM -0800, Joe Perches wrote: > On Mon, 2016-01-04 at 23:07 +0200, Michael S. Tsirkin wrote: > > On Mon, Jan 04, 2016 at 08:47:53AM -0800, Joe Perches wrote: > > > On Mon, 2016-01-04 at 13:37 +0200, Michael S. Tsirkin wrote: > > > > Add virt_ barriers to list of

RE: Build failure: -Wno-unused-const-variable DNE on old GCC

From: Michael Ellerman > Sent: 08 January 2016 02:17 > > I doubt you plan to fix all those. So making -Werror configurable seems like > > the only way forward, then. (Glad you agreed!) > > Yep, I'm happy to make Werror configurable. > > cxl can probably just use the existing PPC_WERROR.

Re: [PATCH v4] perf: bpf: Fix build breakage due to libbpf

On 2016/1/8 20:51, Arnaldo Carvalho de Melo wrote: Em Fri, Jan 08, 2016 at 11:09:35AM +0530, Naveen N. Rao escreveu: On 2016/01/07 05:39PM, Arnaldo Carvalho de Melo wrote: Em Thu, Jan 07, 2016 at 12:28:15PM +0530, Naveen N. Rao escreveu: On 2015/12/17 09:19AM, Arnaldo Carvalho de Melo

Need some help

Dear Friend, I am sorry the previous mail got sent under a different subject line by mistake. Hence sending this mail again. I need some help. Actually I want to get enrolled for PhD. in *Embedded Systems, *but i am not able to define a Problem statement for my Research as I am not in touch

Re: [PATCH v4] perf: bpf: Fix build breakage due to libbpf

Em Fri, Jan 08, 2016 at 09:31:46PM +0800, Wangnan (F) escreveu: > On 2016/1/8 20:51, Arnaldo Carvalho de Melo wrote: > >Em Fri, Jan 08, 2016 at 11:09:35AM +0530, Naveen N. Rao escreveu: > >>On 2016/01/07 05:39PM, Arnaldo Carvalho de Melo wrote: > >>>Em Thu, Jan 07, 2016 at 12:28:15PM +0530, Naveen

[PATCH][v2] drivers/memory: Add deep sleep support for IFC

Add support of suspend, resume function to support deep sleep. Also make sure of SRAM initialization during resume. Signed-off-by: Prabhakar Kushwaha Signed-off-by: Raghav Dogra --- Changes for v2: Copying only the correct registers while resume.

Re: [PATCH v4] perf: bpf: Fix build breakage due to libbpf

Em Fri, Jan 08, 2016 at 11:09:35AM +0530, Naveen N. Rao escreveu: > On 2016/01/07 05:39PM, Arnaldo Carvalho de Melo wrote: > > Em Thu, Jan 07, 2016 at 12:28:15PM +0530, Naveen N. Rao escreveu: > > > On 2015/12/17 09:19AM, Arnaldo Carvalho de Melo wrote: > > > > Em Thu, Dec 17, 2015 at 10:37:14AM

Re: [PATCH v4] perf: bpf: Fix build breakage due to libbpf

On Thu, Jan 07, 2016 at 06:23:03PM -0300, Arnaldo Carvalho de Melo wrote: > Em Thu, Jan 07, 2016 at 05:39:57PM -0300, Arnaldo Carvalho de Melo escreveu: > > Em Thu, Jan 07, 2016 at 12:28:15PM +0530, Naveen N. Rao escreveu: > > > Can you please push at least the initial 3 patches of this for v4.4?