RE: [PATCH] mtd/ifc: Add support for IFC controller version 2.0

> -Original Message- > From: Scott Wood [mailto:o...@buserror.net] > Sent: Tuesday, February 16, 2016 6:12 AM > To: Raghav Dogra ; Brian Norris > ; Li Yang > Cc: Raghav Dogra ;

[PATCH][v2] mtd/ifc: Add support for IFC controller version 2.0

The new IFC controller version 2.0 has a different memory map page. Upto IFC 1.4 PAGE size is 4 KB and from IFC2.0 PAGE size is 64KB. This patch segregates the IFC global and runtime registers to appropriate PAGE sizes. Signed-off-by: Jaiprakash Singh Signed-off-by: Raghav

[PATCH V11_RESEND 06/10] powerpc/lib: Add new branch analysis support functions

Generic powerpc branch analysis support added in the code patching library which will help the subsequent patch on SW based filtering of branch records in perf. Signed-off-by: Anshuman Khandual --- arch/powerpc/include/asm/code-patching.h | 15

[PATCH V11_RESEND 08/10] powerpc/perf: Change POWER8 PMU configuration to work with SW filters

The kernel now supports SW based branch filters for book3s systems with some specific requirements while dealing with HW supported branch filters in order to achieve overall OR semantics prevailing in perf branch stack sampling framework. This patch adapts the BHRB branch filter configuration to

[PATCH V11_RESEND 05/10] powerpc/perf: Change the name of HW PMU branch filter tracking variable

This patch simply changes the name of the variable from 'bhrb_filter' to 'bhrb_hw_filter' in order to add one more variable which will track SW filters in generic powerpc book3s code which will be implemented in the subsequent patch. This patch does not change any functionality. Signed-off-by:

[PATCH V11_RESEND 04/10] powerpc/perf: Re organize BHRB processing

This patch cleans up some existing indentation problem in code and re organizes the BHRB processing code with an helper function named 'update_branch_entry' making it more readable. This patch does not change any functionality. Signed-off-by: Anshuman Khandual ---

[PATCH V11_RESEND 07/10] powerpc/perf: Enable SW filtering in branch stack sampling framework

This patch enables SW based post processing of BHRB captured branches to be able to meet more user defined branch filtration criteria in perf branch stack sampling framework. These changes increase the number of branch filters and their valid combinations on any powerpc64 server platform with BHRB

[PATCH V11_RESEND 10/10] selftests/powerpc: Add test for BHRB branch filters (HW & SW)

This patch adds a test for verifying that all the branch stack sampling filters supported on powerpc work correctly. It also adds some assembly helper functions in this regard. This patch extends the generic event description to handle kernel mapped ring buffers. Signed-off-by: Anshuman Khandual

[PATCH V11_RESEND 09/10] powerpc/perf: Enable privilege mode SW branch filters

This patch enables privilege mode SW branch filters. Also modifies POWER8 PMU branch filter configuration so that the privilege mode branch filter implemented as part of base PMU event configuration is reflected in bhrb filter mask. As a result, the SW will skip and not try to process the

[PATCH V11_RESEND 00/10] powerpc/perf: Enable SW branch filters

This is the continuation (rebased and reworked) of the series posted at https://lkml.org/lkml/2014/5/5/153 (which is V6). I remember to have incremented the version count for the re-send of the first four patches of the series to Peter Z for generic review which got pulled in last year.

[PATCH V11_RESEND 02/10] powerpc/perf: Re organize PMU branch filter processing on POWER8

This patch does some code re-arrangements to make it clear that kernel ignores any separate privilege level branch filter request and does not support any combinations of HW PMU branch filters. Signed-off-by: Anshuman Khandual --- arch/powerpc/perf/power8-pmu.c | 22

[PATCH V11_RESEND 03/10] powerpc/perf: Restore privilege level filter support for BHRB

'commit 9de5cb0f6df8 ("powerpc/perf: Add per-event excludes on Power8")' broke the PMU based BHRB privilege level filter. BHRB depends on the same MMCR0 bits for privilege level filter which was used to freeze all the PMCs as a group. Once we moved to individual event based privilege filters

[PATCH V11_RESEND 01/10] powerpc/perf: Change name & type of 'pred' in power_pmu_bhrb_read

Branch record attributes 'mispred' and 'predicted' are single bit fields as defined in the perf ABI. Hence the data type of the field 'pred' used during BHRB processing should be changed from integer to bool. This patch also changes the name of the variable from 'pred' to 'mispred' making the

[PATCH v2] powerpc/sstep.c - Fix emulation fall-through

There is a switch fallthough in instr_analyze() which can cause an invalid instruction to be emulated as a different, valid, instruction. The rld* (opcode 30) case extracts a sub-opcode from bits 3:1 of the instruction word. However, the only valid values of this field a 001 and 000. These cases

Re: [PATCH v8 8/8] livepatch: Detect offset for the ftrace location during build

* Petr Mladek [2016-02-12 17:45:17]: [...] > I guess that you used a broken gcc and cheated the check > to pass the compilation. Did you, please? > > The test used to detect the offset is using a minimalistic > function is is afftected by the gcc bug. > > The patch below

Re: [PATCH v4 1/9] selftests/powerpc: Test the preservation of FPU and VMX regs across syscall

On Tue, 2016-02-16 at 11:06 +1100, Cyril Bur wrote: > On Mon, 15 Feb 2016 22:29:17 +0530 > "Naveen N. Rao" wrote: > > > On 2016/02/15 04:07PM, Cyril Bur wrote: > > > Test that the non volatile floating point and Altivec registers get > > > correctly preserved

Re: [PATCH V3] powerpc/mm: Fix Multi hit ERAT cause by recent THP update

On Mon, 2016-02-15 at 16:31 +0530, Aneesh Kumar K.V wrote: > Balbir Singh writes: > > > > Now we can't depend for mm_cpumask, a parallel find_linux_pte_hugepte > > > can happen outside that. Now i had a variant for kick_all_cpus_sync that > > > ignored idle cpus. But then

Re: [PATCH v4 1/9] selftests/powerpc: Test the preservation of FPU and VMX regs across syscall

On 2016/02/16 11:06AM, Cyril Bur wrote: > On Mon, 15 Feb 2016 22:29:17 +0530 > "Naveen N. Rao" wrote: > > > On 2016/02/15 04:07PM, Cyril Bur wrote: > > > Test that the non volatile floating point and Altivec registers get > > > correctly preserved across the

Re: [PATCH v8 4/8] ppc64 ftrace_with_regs configuration variables

On Mon, 2016-02-15 at 23:21 +0100, Torsten Duwe wrote: > On Mon, Feb 15, 2016 at 03:04:08PM +0100, Torsten Duwe wrote: > > If you use "-pg -mprofile-kernel", gcc seems to forget that, and omits the > > TOC > > load, for a similar assembler calling sequence. > > > > Looking at the code I can

Re: [RFC, kernel] powerpc/ioda: Set "read" permission when "write" is set

On Tue, 2016-12-01 at 04:40:20 UTC, Alexey Kardashevskiy wrote: > Quite often drivers set only "write" permission assuming that this > includes "read" permission as well and this works on plenty platforms. > However IODA2 is strict about this and produces an EEH when "read" > permission is not and

Re: Rebase of my fixes branch

On Mon, 2016-02-15 at 16:46 +0530, Aneesh Kumar K.V wrote: > Michael Ellerman writes: > > > Hi folks, > > > > FYI I've rebased my fixes branch. > > > > Unfortunately we had a couple of fixes in fixes that needed fixes in order > > to > > be actual fixes. > > > > So if you're

Re: [PATCH kernel v3 7/7] KVM: PPC: Add support for multiple-TCE hcalls

On Tue, Feb 16, 2016 at 12:05:56PM +1100, Paul Mackerras wrote: > On Tue, Feb 16, 2016 at 11:40:58AM +1100, David Gibson wrote: > > On Mon, Feb 15, 2016 at 12:55:09PM +1100, Alexey Kardashevskiy wrote: > > > This adds real and virtual mode handlers for the H_PUT_TCE_INDIRECT and > > > H_STUFF_TCE

Re: [PATCH kernel v3 7/7] KVM: PPC: Add support for multiple-TCE hcalls

On Tue, Feb 16, 2016 at 11:40:58AM +1100, David Gibson wrote: > On Mon, Feb 15, 2016 at 12:55:09PM +1100, Alexey Kardashevskiy wrote: > > This adds real and virtual mode handlers for the H_PUT_TCE_INDIRECT and > > H_STUFF_TCE hypercalls for user space emulated devices such as IBMVIO > > devices or

Re: [PATCH] powerpc/lib/sstep.c - Fix emulation fall-through

On 16/02/16 10:28, Oliver O'Halloran wrote: There is a switch fallthough in instr_analyze() which can cause an invalid instruction to be emulated as a different, valid, instruction. The rld* (opcode 30) case extracts a sub-opcode from bits 3:1 of the instruction word. However, the only valid

Re: [PATCH] mtd/ifc: Add support for IFC controller version 2.0

On Mon, 2016-02-15 at 06:18 +, Raghav Dogra wrote: > > > -Original Message- > > From: Brian Norris [mailto:computersforpe...@gmail.com] > > Sent: Saturday, February 13, 2016 1:14 AM > > To: Li Yang > > Cc: Raghav Dogra ;

Re: [PATCH kernel v3 7/7] KVM: PPC: Add support for multiple-TCE hcalls

On Mon, Feb 15, 2016 at 12:55:09PM +1100, Alexey Kardashevskiy wrote: > This adds real and virtual mode handlers for the H_PUT_TCE_INDIRECT and > H_STUFF_TCE hypercalls for user space emulated devices such as IBMVIO > devices or emulated PCI. These calls allow adding multiple entries > (up to 512)

Re: [PATCH v4 1/9] selftests/powerpc: Test the preservation of FPU and VMX regs across syscall

On Mon, 15 Feb 2016 22:29:17 +0530 "Naveen N. Rao" wrote: > On 2016/02/15 04:07PM, Cyril Bur wrote: > > Test that the non volatile floating point and Altivec registers get > > correctly preserved across the fork() syscall. > > > > fork() works nicely for this

Re: [PATCH] powerpc/eeh: Remove duplicated check in eeh_dump_pe_log()

On 16/02/16 10:30, Gavin Shan wrote: Thanks for review. Do you want to see revised patch to include your comments? Not particularly - the comments were just detailing what I went through as I reviewed it. Feel free to include it if you feel it makes the description clearer, but I don't

Re: [PATCH kernel v3 6/7] KVM: PPC: Move reusable bits of H_PUT_TCE handler to helpers

On Mon, Feb 15, 2016 at 12:55:08PM +1100, Alexey Kardashevskiy wrote: > Upcoming multi-tce support (H_PUT_TCE_INDIRECT/H_STUFF_TCE hypercalls) > will validate TCE (not to have unexpected bits) and IO address > (to be within the DMA window boundaries). > > This introduces helpers to validate TCE

Re: [PATCH] powerpc/eeh: Remove duplicated check in eeh_dump_pe_log()

On Mon, Feb 15, 2016 at 02:25:53PM +1100, Andrew Donnellan wrote: >On 15/02/16 10:52, Gavin Shan wrote: >>When eeh_dump_pe_log() is called in eeh_slot_error_detail(), we >>already have the check that the PE isn't in PCI config blocked >>state. So we needn't the duplicated check in

[PATCH] powerpc/lib/sstep.c - Fix emulation fall-through

There is a switch fallthough in instr_analyze() which can cause an invalid instruction to be emulated as a different, valid, instruction. The rld* (opcode 30) case extracts a sub-opcode from bits 3:1 of the instruction word. However, the only valid values of this field a 001 and 000. These cases

Re: [PATCH v3 14/18] cxl: Support to flash a new image on the adapter from a guest

Excerpts from christophe lombard's message of 2016-02-16 07:53:54 +1100: > >> +void cxl_guest_reload_module(struct cxl *adapter) > >> +{ > >> +struct platform_device *pdev; > >> +int afu; > >> + > >> +for (afu = 0; afu < adapter->slices; afu++) > >> +

Re: [PATCH v2 2/4] powerpc/powernv: Fix stale PE primary bus

On Mon, Feb 15, 2016 at 09:38:35PM +1100, Michael Ellerman wrote: >On Fri, 2016-02-12 at 17:09 +1100, Gavin Shan wrote: > >> On Fri, Feb 12, 2016 at 05:02:46PM +1100, Andrew Donnellan wrote: > >> > On 09/02/16 15:50, Gavin Shan wrote: > >> > > When PCI bus is unplugged during full hotplug for EEH

Re: [PATCH v8 4/8] ppc64 ftrace_with_regs configuration variables

On Mon, Feb 15, 2016 at 03:04:08PM +0100, Torsten Duwe wrote: > If you use "-pg -mprofile-kernel", gcc seems to forget that, and omits the TOC > load, for a similar assembler calling sequence. > > Looking at the code I can _understand_ why this is so, but my GCC knowledge > is not that deep that

Re: [BUG] random kernel crashes after THP rework on s390 (maybe also on PowerPC and ARM)

On Mon, Feb 15, 2016 at 07:37:02PM +0100, Gerald Schaefer wrote: > On Mon, 15 Feb 2016 13:31:59 +0200 > "Kirill A. Shutemov" wrote: > > > On Sat, Feb 13, 2016 at 12:58:31PM +0100, Sebastian Ott wrote: > > > > > > On Sat, 13 Feb 2016, Kirill A. Shutemov wrote: > > > > Could

Re: [PATCH v3 14/18] cxl: Support to flash a new image on the adapter from a guest

@mpe since this patch introduces a new user API I'd appreciate it if you could give this a bit extra scrutiny. Excerpts from Frederic Barrat's message of 2016-02-07 00:29:01 +1100: +Starts and controls flashing a new FPGA image. Partial +reconfiguration is not supported (yet), so the

Re: Writes, smp_wmb(), and transitivity?

On Mon, Feb 15, 2016 at 06:58:32PM +, Will Deacon wrote: > On Mon, Feb 15, 2016 at 09:58:25AM -0800, Paul E. McKenney wrote: > > Hello! > > Hi Paul, > > > Some architectures provide local transitivity for a chain of threads doing > > writes separated by smp_wmb(), as exemplified by the

Re: Writes, smp_wmb(), and transitivity?

On Mon, Feb 15, 2016 at 09:58:25AM -0800, Paul E. McKenney wrote: > Hello! Hi Paul, > Some architectures provide local transitivity for a chain of threads doing > writes separated by smp_wmb(), as exemplified by the litmus tests below. > The pattern is that each thread writes to a its own

Re: [BUG] random kernel crashes after THP rework on s390 (maybe also on PowerPC and ARM)

On Mon, 15 Feb 2016 13:31:59 +0200 "Kirill A. Shutemov" wrote: > On Sat, Feb 13, 2016 at 12:58:31PM +0100, Sebastian Ott wrote: > > > > On Sat, 13 Feb 2016, Kirill A. Shutemov wrote: > > > Could you check if revert of fecffad25458 helps? > > > > I reverted fecffad25458 on

Writes, smp_wmb(), and transitivity?

Hello! Some architectures provide local transitivity for a chain of threads doing writes separated by smp_wmb(), as exemplified by the litmus tests below. The pattern is that each thread writes to a its own variable, does an smp_wmb(), then writes a different value to the next thread's variable.

Re: [PATCH v4 1/9] selftests/powerpc: Test the preservation of FPU and VMX regs across syscall

On 2016/02/15 04:07PM, Cyril Bur wrote: > Test that the non volatile floating point and Altivec registers get > correctly preserved across the fork() syscall. > > fork() works nicely for this purpose, the registers should be the same for > both parent and child > > Signed-off-by: Cyril Bur

Re: [BUG] random kernel crashes after THP rework on s390 (maybe also on PowerPC and ARM)

On Sat, 13 Feb 2016 01:15:10 +0200 "Kirill A. Shutemov" wrote: > > I'm trying to wrap my head around the issue and I don't think missing > serialization with gup_fast is the cause -- we just don't need it > anymore. > > Previously, __split_huge_page_splitting() required

Re: [BUG] random kernel crashes after THP rework on s390 (maybe also on PowerPC and ARM)

On Mon, 15 Feb 2016, Kirill A. Shutemov wrote: > > [ 59.851421] list_del corruption. next->prev should be 6e1eb000, > > but was 0400 > > This kinda interesting: 0x400 is TAIL_MAPPING.. Hm.. > > Could you check if you see the problem on commit 1c290f642101 and its >

[PATCH 7/7] usb: gadget: fsl_qe_udc: fix IS_ERR_VALUE usage

IS_ERR_VALUE macro should be used only with unsigned long type. Otherwise it can work incorrectly. The patch follows conclusion from discussion on LKML [1][2]. [1]: http://permalink.gmane.org/gmane.linux.kernel/2120927 [2]: http://permalink.gmane.org/gmane.linux.kernel/2150581 Signed-off-by:

[PATCH 0/7] fix IS_ERR_VALUE usage

Hi, This small set of independent patches tries to fix incorrect IS_ERR_VALUE macro usage. It fixes most usages leading to errors as described in [1]. It also follows conclusion from the discussion [1][2] - IS_ERR_VALUE should be used only with unsigned long type, signed types should use

Re: [PATCH v8 4/8] ppc64 ftrace_with_regs configuration variables

On Mon, Feb 15, 2016 at 09:27:15PM +1100, Michael Ellerman wrote: > > There is explicit code in gcc to check whether the TOC setup is needed and > only That's undestood. The claim here is: that check is incomplete, at least. > emit it when it's required. One case where it's *not* required is

Re: [PATCH v8 4/8] ppc64 ftrace_with_regs configuration variables

On Mon, 15 Feb 2016, Michael Ellerman wrote: > > > > +echo "int func() { return 0; }" | \ > > > > +$* -S -x c -O2 -p -mprofile-kernel - -o - 2> /dev/null | \ > > > > +sed -n -e '/func:/,/bl _mcount/p' | grep -q TOC > > > > + > > > > +leaf_toc_result=$? > > > > > > leaf_toc_result failed

Re: [BUG] random kernel crashes after THP rework on s390 (maybe also on PowerPC and ARM)

On Sat, Feb 13, 2016 at 12:58:31PM +0100, Sebastian Ott wrote: > > On Sat, 13 Feb 2016, Kirill A. Shutemov wrote: > > Could you check if revert of fecffad25458 helps? > > I reverted fecffad25458 on top of 721675fcf277cf - it oopsed with: > > ¢ 1851.721062! Unable to handle kernel pointer

Re: Rebase of my fixes branch

Michael Ellerman writes: > Hi folks, > > FYI I've rebased my fixes branch. > > Unfortunately we had a couple of fixes in fixes that needed fixes in order to > be actual fixes. > > So if you're basing some work on it you'll have to fetch and rebase. > > The old head commit

Re: [PATCH V3] powerpc/mm: Fix Multi hit ERAT cause by recent THP update

Balbir Singh writes: >> Now we can't depend for mm_cpumask, a parallel find_linux_pte_hugepte >> can happen outside that. Now i had a variant for kick_all_cpus_sync that >> ignored idle cpus. But then that needs more verification. >> >>

Re: [PATCH v2 2/4] powerpc/powernv: Fix stale PE primary bus

On Fri, 2016-02-12 at 17:09 +1100, Gavin Shan wrote: > On Fri, Feb 12, 2016 at 05:02:46PM +1100, Andrew Donnellan wrote: > > On 09/02/16 15:50, Gavin Shan wrote: > > > When PCI bus is unplugged during full hotplug for EEH recovery, > > > the platform PE instance (struct pnv_ioda_pe) isn't

Rebase of my fixes branch

Hi folks, FYI I've rebased my fixes branch. Unfortunately we had a couple of fixes in fixes that needed fixes in order to be actual fixes. So if you're basing some work on it you'll have to fetch and rebase. The old head commit was: 0fe53e8d335bfc02f81300b70211e61fb931a725 and now

Re: [PATCH v8 4/8] ppc64 ftrace_with_regs configuration variables

Hi guys, Sorry I haven't been keeping up to date with this thread I've been away. On Thu, 2016-02-11 at 09:42 +0100, Torsten Duwe wrote: > On Thu, Feb 11, 2016 at 06:48:17PM +1100, Balbir Singh wrote: > > On Wed, 2016-02-10 at 17:25 +0100, Torsten Duwe wrote: > > > + > > > +echo "int func() {

[PATCH v6] powerpc32: provide VIRT_CPU_ACCOUNTING

This patch provides VIRT_CPU_ACCOUTING to PPC32 architecture. PPC32 doesn't have the PACA structure, so we use the task_info structure to store the accounting data. In order to reuse on PPC32 the PPC64 functions, all u64 data has been replaced by 'unsigned long' so that it is u32 on PPC32 and u64

Re: [PATCH v5] powerpc32: provide VIRT_CPU_ACCOUNTING

Le 14/02/2016 21:40, Denis Kirjanov a écrit : On 2/11/16, Christophe Leroy wrote: This patch provides VIRT_CPU_ACCOUTING to PPC32 architecture. PPC32 doesn't have the PACA structure, so we use the task_info structure to store the accounting data. In order to reuse on