[PATCH v2] powerpc/pnv/pci: Fix incorrect PE reservation attempt on some 64-bit BARs

The generic allocation code may sometimes decide to assign a prefetchable 64-bit BAR to the M32 window. In fact it may also decide to allocate a 64-bit non-prefetchable BAR to the M64 one ! So using the resource flags as a test to decide which window was used for PE allocation is just wrong and

Re: [v4] powerpc: Export thread_struct.used_vr/used_vsr to user space

On Thu, Jul 07, 2016 at 11:21:18PM +1000, Benjamin Herrenschmidt wrote: > I think the right fix is that if a restore_sigcontext() has the MSR bits set, > it should set the corresponding used_* flag. > > Or is there a reason why that won't work ? That sounds reaonable to me. I will prepare a

Re: [PATCH 1/9] mm: Hardened usercopy

Kees Cook writes: > On Thu, Jul 7, 2016 at 4:01 AM, Arnd Bergmann wrote: >> On Wednesday, July 6, 2016 3:25:20 PM CEST Kees Cook wrote: >>> + >>> + /* Allow kernel rodata region (if not marked as Reserved). */ >>> + if (ptr >= (const void

Re: [PATCH v3 3/4] perf annotate: add powerpc support

Hi Michael, On Wednesday 06 July 2016 03:38 PM, Michael Ellerman wrote: Ravi Bangoria writes: On Thursday 30 June 2016 11:51 AM, Michael Ellerman wrote: On Thu, 2016-06-30 at 11:44 +0530, Ravi Bangoria wrote: diff --git a/tools/perf/util/annotate.c

[PATCH v4 3/3] perf annotate: add powerpc support

From: Naveen N. Rao Powerpc has long list of branch instructions and hardcoding them in table appears to be error-prone. So, add new function to find instruction instead of creating table. This function dynamically create table(list of 'struct ins'), and instead

[PATCH v4 2/3] perf annotate: Enable cross arch annotate

Change current data structures and function to enable cross arch annotate. Current implementation does not contain logic of record on one arch and annotating on other. This remote annotate is partially possible with current implementation for x86 (or may be arm as well) only. But, to make remote

[PATCH v4 1/3] perf: Define macro for normalized arch names

Define macro for each normalized arch name and use them instead of using arch name as string Signed-off-by: Ravi Bangoria --- Changes in v4: - Moved position of patch tools/perf/arch/common.c | 36 ++--

[PATCH v4 0/3] perf annotate: Enable cross arch annotate

Perf can currently only support code navigation (branches and calls) in annotate when run on the same architecture where perf.data was recorded. But cross arch annotate is not supported. This patchset enables cross arch annotate. Currently I've used x86 and arm instructions which are already

Re: [PATCH v7 07/11] powerpc/powernv: Add platform support for stop instruction

> > > > > > @@ -439,7 +540,18 @@ timebase_resync: > > >    */ > > >   bne cr4,clear_lock > > >   > > > - /* Restore per core state */ > > > + /* > > > +  * First thread in the core to wake up and its waking up > > > with > > > +  * complete hypervisor state loss. Restore per core > > >

Re: [PATCH v7 07/11] powerpc/powernv: Add platform support for stop instruction

On 07/08/2016 07:50 AM, Michael Neuling wrote: > >> diff --git a/arch/powerpc/include/asm/cpuidle.h >> b/arch/powerpc/include/asm/cpuidle.h >> index d2f99ca..3d7fc06 100644 >> --- a/arch/powerpc/include/asm/cpuidle.h >> +++ b/arch/powerpc/include/asm/cpuidle.h >> @@ -13,6 +13,8 @@ >> #ifndef

Re: [RFC/PATCH 2/4] powerpc/64/kexec: Fix MMU cleanup on radix

On Fri, 2016-07-08 at 12:55 +1000, Balbir Singh wrote: > + > > +/* For use by kexec */ > > +void mmu_cleanup_all(void) > > +{ > > + if (radix_enabled()) > > + radix__mmu_cleanup_all(); > > > Should this be more than just radix -- cpu_has_feature(CPU_FTR_ARCH_300)? I don't

[PATCH] powerpc: Add MTD_BLOCK to powernv_defconfig

This is so we can use the powernv_flash mtd driver as an block device. Signed-off-by: Michael Neuling --- arch/powerpc/configs/powernv_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/configs/powernv_defconfig

Re: t1040 IFC flash driver Extended Chip Select

On 07/07/2016 04:49 PM, Daniel Walker wrote: > On 07/07/2016 02:23 PM, Scott Wood wrote: >> >> I suspect that add the usage of cspr_ext into the driver would fix the >> issue we have. It reads like you would find that acceptable ? >> What specifically is the problem you're having? Is it that

Re: [RFC/PATCH 3/4] powerpc/64/kexec: Copy image with MMU off when possible

On 06/07/16 14:35, Benjamin Herrenschmidt wrote: > Currently we turn the MMU off after copying the image, and we make > sure there is no overlap between the hash table and the target pages > in that case. > > That doesn't work for Radix however. In that case, the page tables > are scattered and

RE: [PATCH 2/4] soc: fsl: add GUTS driver for QorIQ platforms

Hi Arnd, > -Original Message- > From: Arnd Bergmann [mailto:a...@arndb.de] > Sent: Thursday, July 07, 2016 4:30 PM > To: Yangbo Lu > Cc: Scott Wood; linuxppc-dev@lists.ozlabs.org; Mark Rutland; Ulf Hansson; > linux-ker...@vger.kernel.org; linux-...@vger.kernel.org; linux- >

Re: [RFC/PATCH 2/4] powerpc/64/kexec: Fix MMU cleanup on radix

On 06/07/16 14:34, Benjamin Herrenschmidt wrote: > Just using the hash ops won't work anymore since radix will have > NULL in there. Instead create an mmu_cleanup_all() function which > will do the right thing based on the MMU mode. > > For Radix, for now I clear UPRT and the PTCR, effectively

Re: [PATCH v7 00/11] powerpc/powernv/cpuidle: Add support for POWER ISA v3 idle states

Except for the issue with patch 7 I've already commented on the rest of this series is good with me.  FWIW: Acked-by: Michael Neuling Thanks. On Fri, 2016-07-08 at 02:17 +0530, Shreyas B. Prabhu wrote: > POWER ISA v3 defines a new idle processor core mechanism. In summary, >

Re: [PATCH v7 09/11] cpuidle/powernv: cleanup powernv_add_idle_states

>   /* > @@ -230,7 +238,7 @@ static int powernv_add_idle_states(void) >   strcpy(powernv_states[nr_idle_states].desc, > "FastSleep"); >   powernv_states[nr_idle_states].flags = > CPUIDLE_FLAG_TIMER_STOP; >  

Re: [PATCH v3 2/2] cpufreq: qoriq: Don't look at clock implementation details

Quoting Scott Wood (2016-07-06 21:13:23) > On Wed, 2016-07-06 at 18:30 -0700, Michael Turquette wrote: > > Quoting Scott Wood (2016-06-15 23:21:25) > > > > > > -static struct device_node *cpu_to_clk_node(int cpu) > > > +static struct clk *cpu_to_clk(int cpu) > > >  { > > > -   struct

Re: [PATCH v7 07/11] powerpc/powernv: Add platform support for stop instruction

> diff --git a/arch/powerpc/include/asm/cpuidle.h > b/arch/powerpc/include/asm/cpuidle.h > index d2f99ca..3d7fc06 100644 > --- a/arch/powerpc/include/asm/cpuidle.h > +++ b/arch/powerpc/include/asm/cpuidle.h > @@ -13,6 +13,8 @@ >  #ifndef __ASSEMBLY__ >  extern u32

RE: [PATCH v2] irqchip/qeic: move qeic driver from drivers/soc/fsl/qe

On Thu, Jul 07, 2016 at 10:25PM , Jason Cooper wrote: > -Original Message- > From: Jason Cooper [mailto:ja...@lakedaemon.net] > Sent: Thursday, July 07, 2016 10:25 PM > To: Qiang Zhao > Cc: o...@buserror.net; t...@linutronix.de;

Re: t1040 IFC flash driver Extended Chip Select

On 07/07/2016 03:37 PM, Scott Wood wrote: On 07/07/2016 05:01 PM, Daniel Walker wrote: On 07/07/2016 02:59 PM, Scott Wood wrote: On 07/07/2016 04:49 PM, Daniel Walker wrote: On 07/07/2016 02:23 PM, Scott Wood wrote: I suspect that add the usage of cspr_ext into the driver would fix the issue

Re: t1040 IFC flash driver Extended Chip Select

On 07/07/2016 02:44 PM, Daniel Walker wrote: > It seems natual that if cspr is in the device tree, you would also want > cspr_ext because both are used to identify the device. The fact that > it's missing to me is strange. As I said in my prior email, even if > uboot sets those, you could have

Re: t1040 IFC flash driver Extended Chip Select

On 07/07/2016 05:01 PM, Daniel Walker wrote: > On 07/07/2016 02:59 PM, Scott Wood wrote: >> On 07/07/2016 04:49 PM, Daniel Walker wrote: >>> On 07/07/2016 02:23 PM, Scott Wood wrote: I suspect that add the usage of cspr_ext into the driver would fix the issue we have. It reads like you

Re: t1040 IFC flash driver Extended Chip Select

On 07/07/2016 02:59 PM, Scott Wood wrote: On 07/07/2016 04:49 PM, Daniel Walker wrote: On 07/07/2016 02:23 PM, Scott Wood wrote: I suspect that add the usage of cspr_ext into the driver would fix the issue we have. It reads like you would find that acceptable ? What specifically is the problem

Re: t1040 IFC flash driver Extended Chip Select

On 07/07/2016 03:52 PM, Daniel Walker wrote: > On 07/07/2016 01:34 PM, Scott Wood wrote: >> On 07/07/2016 02:44 PM, Daniel Walker wrote: >>> It seems natual that if cspr is in the device tree, you would also want >>> cspr_ext because both are used to identify the device. The fact that >>> it's

Re: t1040 IFC flash driver Extended Chip Select

On 07/07/2016 02:23 PM, Scott Wood wrote: I suspect that add the usage of cspr_ext into the driver would fix the issue we have. It reads like you would find that acceptable ? What specifically is the problem you're having? Is it that CSPR_EXT is not getting written to, and thus the device does

Re: t1040 IFC flash driver Extended Chip Select

On 07/07/2016 10:48 AM, Daniel Walker wrote: > On 07/06/2016 05:57 PM, Scott Wood wrote: >> On 07/06/2016 03:23 PM, Daniel Walker wrote: >>> Hi, >>> >>> We are using the t1040 platform, and we have found that we need to >>> populate this register. In the Technical Reference Manual it's >>>

Re: t1040 IFC flash driver Extended Chip Select

On 07/07/2016 01:34 PM, Scott Wood wrote: On 07/07/2016 02:44 PM, Daniel Walker wrote: It seems natual that if cspr is in the device tree, you would also want cspr_ext because both are used to identify the device. The fact that it's missing to me is strange. As I said in my prior email, even if

[PATCH v7 11/11] powerpc/powernv: Use deepest stop state when cpu is offlined

If hardware supports stop state, use the deepest stop state when the cpu is offlined. Reviewed-by: Gautham R. Shenoy Signed-off-by: Shreyas B. Prabhu --- - No changes since v1 arch/powerpc/platforms/powernv/idle.c| 15 +--

[PATCH v7 10/11] cpuidle/powernv: Add support for POWER ISA v3 idle states

POWER ISA v3 defines a new idle processor core mechanism. In summary, a) new instruction named stop is added. b) new per thread SPR named PSSCR is added which controls the behavior of stop instruction. Supported idle states and value to be written to PSSCR register to enter any idle

[PATCH v7 09/11] cpuidle/powernv: cleanup powernv_add_idle_states

- Use stack instead of kzalloc'ed memory for variables while probing device tree for idle states. - Set cap for number of idle states that can be added to cpuidle_state_table - Minor change in way we check of_property_read_u32_array for error for sake of consistency - Drop unnecessary

[PATCH v7 08/11] cpuidle/powernv: Use CPUIDLE_STATE_MAX instead of MAX_POWERNV_IDLE_STATES

Use cpuidle's CPUIDLE_STATE_MAX macro instead of powernv specific MAX_POWERNV_IDLE_STATES. Cc: Rafael J. Wysocki Cc: Daniel Lezcano Cc: linux...@vger.kernel.org Acked-by: Daniel Lezcano Signed-off-by: Shreyas B.

[PATCH v7 07/11] powerpc/powernv: Add platform support for stop instruction

POWER ISA v3 defines a new idle processor core mechanism. In summary, a) new instruction named stop is added. This instruction replaces instructions like nap, sleep, rvwinkle. b) new per thread SPR named Processor Stop Status and Control Register (PSSCR) is added which controls

[PATCH v7 06/11] powerpc/powernv: abstraction for saving SPRs before entering deep idle states

Create a function for saving SPRs before entering deep idle states. This function can be reused for POWER9 deep idle states. Reviewed-by: Gautham R. Shenoy Signed-off-by: Shreyas B. Prabhu --- - No changes since v3 Changes in v3:

[PATCH v7 05/11] powerpc/powernv: Make pnv_powersave_common more generic

pnv_powersave_common does common steps needed before entering idle state and eventually changes MSR to MSR_IDLE and does rfid to pnv_enter_arch207_idle_mode. Move the updation of HSTATE_HWTHREAD_STATE to pnv_powersave_common from pnv_enter_arch207_idle_mode and make it more generic by passing the

[PATCH v7 04/11] powerpc/powernv: Rename reusable idle functions to hardware agnostic names

Functions like power7_wakeup_loss, power7_wakeup_noloss, power7_wakeup_tb_loss are used by POWER7 and POWER8 hardware. They can also be used by POWER9. Hence rename these functions hardware agnostic names. Suggested-by: Gautham R. Shenoy Signed-off-by: Shreyas B. Prabhu

[PATCH v7 03/11] powerpc/powernv: Rename idle_power7.S to idle_book3s.S

idle_power7.S handles idle entry/exit for POWER7, POWER8 and in next patch for POWER9. Rename the file to a non-hardware specific name. Reviewed-by: Gautham R. Shenoy Signed-off-by: Shreyas B. Prabhu --- Changes in v7: = - File

[PATCH v7 02/11] powerpc/kvm: make hypervisor state restore a function

In the current code, when the thread wakes up in reset vector, some of the state restore code and check for whether a thread needs to branch to kvm is duplicated. Reorder the code such that this duplication is avoided. At a higher level this is what the change looks like- Before this patch -

[PATCH v7 01/11] powerpc/powernv: Use PNV_THREAD_WINKLE macro while requesting for winkle

Signed-off-by: Shreyas B. Prabhu --- -No changes since v4 Changes in v4 = - New in v4 arch/powerpc/kernel/idle_power7.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/kernel/idle_power7.S

[PATCH v7 00/11] powerpc/powernv/cpuidle: Add support for POWER ISA v3 idle states

POWER ISA v3 defines a new idle processor core mechanism. In summary, a) new instruction named stop is added. This instruction replaces instructions like nap, sleep, rvwinkle. b) new per thread SPR named PSSCR is added which controls the behavior of stop instruction.

Re: [PATCH 2/4] soc: fsl: add GUTS driver for QorIQ platforms

On Thu, 2016-07-07 at 10:30 +0200, Arnd Bergmann wrote: > On Thursday, July 7, 2016 2:35:33 AM CEST Yangbo Lu wrote: > > > > Hi Arnd, > > > > Could you reply when you see the email? > > If your method doesn’t resolve the problem, we still want to use our old > > patchset. > > > > This guts

Re: t1040 IFC flash driver Extended Chip Select

On 07/07/2016 12:26 PM, Scott Wood wrote: On 07/07/2016 10:48 AM, Daniel Walker wrote: On 07/06/2016 05:57 PM, Scott Wood wrote: On 07/06/2016 03:23 PM, Daniel Walker wrote: Hi, We are using the t1040 platform, and we have found that we need to populate this register. In the Technical

Re: [PATCH 1/9] mm: Hardened usercopy

On Thu, 7 Jul 2016, Kees Cook wrote: > On Thu, Jul 7, 2016 at 3:42 AM, Thomas Gleixner wrote: > > I'd rather make that a weak function returning 1 which can be replaced by > > x86 for CONFIG_FRAME_POINTER=y. That also allows other architectures to > > implement their specific

Re: [kernel-hardening] Re: [PATCH 9/9] mm: SLUB hardened usercopy support

On Thu, Jul 7, 2016 at 12:35 AM, Michael Ellerman wrote: > Kees Cook writes: > >> Under CONFIG_HARDENED_USERCOPY, this adds object size checking to the >> SLUB allocator to catch any copies that may span objects. >> >> Based on code from PaX and

Re: [PATCH v21 8/8] Documentation: dt: usable-memory and elfcorehdr nodes for arm64 kexec

Am Donnerstag, 07 Juli 2016, 11:00:25 schrieb AKASHI Takahiro: > On Wed, Jul 06, 2016 at 04:29:18PM -0300, Thiago Jung Bauermann wrote: > > Hi, > > > > Am Mittwoch, 06 Juli 2016, 16:52:26 schrieb AKASHI Takahiro: > > > +linux,usable-memory > > > +--- > > > + > > > +This property

Re: Removing lots of IS_ERR_VALUE abuses and compilation warning.

Yes, You are right, -Now Return type of 'qe_muram_alloc' is 'unsigned long', That Was trying to assigned in member of this structure 'ucc_geth_private' . This structure variable are 'unsigned int'. So before assignment need a proper type casting. -Passing value in IS_ERR_VALUE() is wrong.

[PATCH] Need proper type casting before assignment, Remove compilation Warning.

-Return type of 'qe_muram_alloc' is 'unsigned long', That Was trying to assigned in ucc_fast_tx_virtual_fifo_base_offset and ucc_fast_rx_virtual_fifo_base_offset. These variable are 'unsigned int'. So before assginment need a proper type casting. -Passing value in IS_ERR_VALUE() is wrong, as they

Re: [PATCH 1/9] mm: Hardened usercopy

Hi Kees, On Thu, Jul 07, 2016 at 01:25:21PM -0400, Kees Cook wrote: > On Thu, Jul 7, 2016 at 1:37 AM, Baruch Siach wrote: > > On Wed, Jul 06, 2016 at 03:25:20PM -0700, Kees Cook wrote: > >> +#ifdef CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR > > > > Should be

Re: [Qemu-ppc] [PATCH v2] powerpc/pseries: start rtasd before PCI probing

Ping ? On Tue, 21 Jun 2016 11:02:01 +0200 Greg Kurz wrote: > On Wed, 15 Jun 2016 22:26:41 +0200 > Greg Kurz wrote: > > > A strange behaviour is observed when comparing PCI hotplug in QEMU, between > > x86 and pseries. If you consider the following

Re: [PATCH 1/9] mm: Hardened usercopy

On Thu, Jul 7, 2016 at 12:35 PM, Rik van Riel wrote: > On Wed, 2016-07-06 at 15:25 -0700, Kees Cook wrote: >> >> + /* Allow kernel rodata region (if not marked as Reserved). >> */ >> + if (ptr >= (const void *)__start_rodata && >> + end <= (const void

Re: [PATCH 1/9] mm: Hardened usercopy

On Thu, Jul 7, 2016 at 4:01 AM, Arnd Bergmann wrote: > On Wednesday, July 6, 2016 3:25:20 PM CEST Kees Cook wrote: >> This is the start of porting PAX_USERCOPY into the mainline kernel. This >> is the first set of features, controlled by CONFIG_HARDENED_USERCOPY. The >> work is

Re: [PATCH 1/9] mm: Hardened usercopy

On Thu, Jul 7, 2016 at 3:42 AM, Thomas Gleixner wrote: > On Wed, 6 Jul 2016, Kees Cook wrote: >> + >> +#if defined(CONFIG_FRAME_POINTER) && defined(CONFIG_X86) >> + const void *frame = NULL; >> + const void *oldframe; >> +#endif > > That's ugly Yeah, I'd like to have

Re: [PATCH 0/9] mm: Hardened usercopy

On Thu, Jul 7, 2016 at 3:30 AM, Christian Borntraeger wrote: > On 07/07/2016 12:25 AM, Kees Cook wrote: >> Hi, >> >> This is a start of the mainline port of PAX_USERCOPY[1]. After I started >> writing tests (now in lkdtm in -next) for Casey's earlier port[2], I >> kept

Re: [PATCH 1/9] mm: Hardened usercopy

On Thu, Jul 7, 2016 at 1:37 AM, Baruch Siach wrote: > Hi Kees, > > On Wed, Jul 06, 2016 at 03:25:20PM -0700, Kees Cook wrote: >> +#ifdef CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR > > Should be CONFIG_HARDENED_USERCOPY to match the slab/slub implementation > condition. > >> +const

Re: [PATCH 4/9] arm64/uaccess: Enable hardened usercopy

On Thu, Jul 7, 2016 at 6:07 AM, Mark Rutland wrote: > Hi, > > On Wed, Jul 06, 2016 at 03:25:23PM -0700, Kees Cook wrote: >> Enables CONFIG_HARDENED_USERCOPY checks on arm64. As done by KASAN in -next, >> renames the low-level functions to __arch_copy_*_user() so a static

Re: Removing lots of IS_ERR_VALUE abuses and compilation warning.

On Thu, Jul 07, 2016 at 09:30:14PM +0530, Arvind Yadav wrote: > Passing value in IS_ERR_VALUE() is wrong, as they pass an 'int' > into a function that takes an 'unsigned long' argument.This happens > to work because the type is sign-extended on 64-bit architectures > before it gets converted into

Re: Remove lots of IS_ERR_VALUE abuses and compilation warning.

Yes, You are right, -Now Return type of 'qe_muram_alloc' is 'unsigned long', That Was trying to assigned in ucc_fast_tx_virtual_fifo_base_offset and ucc_fast_rx_virtual_fifo_base_offset. These variable are 'unsigned int'. So before assignment need a proper type casting. -Passing value in

[PATCH] Need proper type casting before assignment, Remove compilation Warning.

-Return type of 'qe_muram_alloc' is 'unsigned long', That Was trying to assigned in ucc_fast_tx_virtual_fifo_base_offset and ucc_fast_rx_virtual_fifo_base_offset. These variable are 'unsigned int'. So before assginment need a proper type casting. -Passing value in IS_ERR_VALUE() is wrong, as they

[PATCH, RESEND, v2] powerpc/85xx: Don't report SRAM to L2 cache fallback as error

If the SRAM region parameters are missing the SRAM driver probing exits and the L2 region is configured as L2 cache entirely. This is the expected default behaviour, so it makes no sense to report it as an error. Signed-off-by: Claudiu Manoil --- v2: drop info print

Re: [PATCH 1/9] mm: Hardened usercopy

On Wed, 2016-07-06 at 15:25 -0700, Kees Cook wrote: >  > + /* Allow kernel rodata region (if not marked as Reserved). > */ > + if (ptr >= (const void *)__start_rodata && > + end <= (const void *)__end_rodata) > + return NULL; > One comment here. __check_object_size

Re: Remove lots of IS_ERR_VALUE abuses and compilation warning.

On Thu, Jul 07, 2016 at 08:57:29PM +0530, Arvind Yadav wrote: > Passing value in IS_ERR_VALUE() is wrong, as they > pass an 'int' into a function that takes an 'unsigned long' > argument. This happens to work because the type is sign-extended > on 64-bit architectures before it gets

[PATCH v4 8/9] powerpc: Add support for loading ELF kernels with kexec_file_load.

This uses all the infrastructure built up by the previous patches in the series to load an ELF vmlinux file and an initrd. It uses the flattened device tree at initial_boot_params as a base and adjusts memory reservations and its /chosen node for the next kernel. elf64_apply_relocate_add was

[PATCH v4 9/9] powerpc: Add purgatory for kexec_file_load implementation.

This purgatory implementation comes from kexec-tools, almost unchanged. The only changes were that the sha256_regions global variable was renamed to sha_regions to match what kexec_file_load expects, and to use the sha256.c file from x86's purgatory to avoid adding yet another SHA-256

[PATCH v4 7/9] powerpc: Implement kexec_file_load.

Adds the basic machinery needed by kexec_file_load. Signed-off-by: Josh Sklar Signed-off-by: Thiago Jung Bauermann Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Michael Ellerman

[PATCH v4 6/9] powerpc: Add functions to read ELF files of any endianness.

A little endian kernel might need to kexec a big endian kernel (the opposite is less likely but could happen as well), so we can't just cast the buffer with the binary to ELF structs and use them as is done elsewhere. This patch adds functions which do byte-swapping as necessary when populating

[PATCH v4 4/9] powerpc: Factor out relocation code from module_64.c to elf_util_64.c.

The kexec_file_load system call needs to relocate the purgatory, so factor out the module relocation code so that it can be shared. This patch's purpose is to move the ELF relocation logic from apply_relocate_add to elf_util_64.c with as few changes as possible. The following changes were needed:

[PATCH v4 5/9] powerpc: Generalize elf64_apply_relocate_add.

When apply_relocate_add is called, modules are already loaded at their final location in memory so Elf64_Shdr.sh_addr can be used for accessing the section contents as well as the base address for relocations. This is not the case for kexec's purgatory, because it will only be copied to its final

[PATCH v4 2/9] kexec_file: Change kexec_add_buffer to take kexec_buf as argument.

Adapt all callers to the new function prototype. In addition, change the type of kexec_buf.buffer from char * to void *. There is no particular reason for it to be a char *, and the change allows us to get rid of 3 existing casts to char * in the code. Signed-off-by: Thiago Jung Bauermann

[PATCH v4 3/9] kexec_file: Factor out kexec_locate_mem_hole from kexec_add_buffer.

kexec_locate_mem_hole will be used by the PowerPC kexec_file_load implementation to find free memory for the purgatory stack. Signed-off-by: Thiago Jung Bauermann Cc: Eric Biederman Cc: Dave Young --- include/linux/kexec.h

[PATCH v4 0/9] kexec_file_load implementation for PowerPC

Hello, Note: We are currently discussing whether we need a new syscall so that userspace can provide a custom device tree for the new kernel. Even if that ends up being the way forward, it would affect only patches 7 and 8, and even in those patches a significant part of the code would stay the

[PATCH v4 1/9] kexec_file: Allow arch-specific memory walking for kexec_add_buffer

Allow architectures to specify a different memory walking function for kexec_add_buffer. x86 uses iomem to track reserved memory ranges, but PowerPC uses the memblock subsystem. Signed-off-by: Thiago Jung Bauermann Cc: Eric Biederman Cc: Dave

Re: [PATCH 1/9] mm: Hardened usercopy

On Wed, 2016-07-06 at 15:25 -0700, Kees Cook wrote: > This is the start of porting PAX_USERCOPY into the mainline kernel. > This > is the first set of features, controlled by CONFIG_HARDENED_USERCOPY. > The > work is based on code by PaX Team and Brad Spengler, and an earlier > port > from Casey

[PATCH] Removing lots of IS_ERR_VALUE abuses and compilation warning.

Passing value in IS_ERR_VALUE() is wrong, as they pass an 'int' into a function that takes an 'unsigned long' argument.This happens to work because the type is sign-extended on 64-bit architectures before it gets converted into an unsigned type. Passing an 'unsigned short' or 'unsigned

Re: t1040 IFC flash driver Extended Chip Select

On 07/06/2016 05:57 PM, Scott Wood wrote: On 07/06/2016 03:23 PM, Daniel Walker wrote: Hi, We are using the t1040 platform, and we have found that we need to populate this register. In the Technical Reference Manual it's description is section 24.3.2. This option appears in the driver, but it

[PATCH] Removing lots of IS_ERR_VALUE abuses and compilation warning.

Passing value in IS_ERR_VALUE() is wrong, as they pass an 'int' into a function that takes an 'unsigned long' argument. This happens to work because the type is sign-extended on 64-bit architectures before it gets converted into an unsigned type. Passing an 'unsigned

Re: [PATCH] Removing lots of IS_ERR_VALUE abuses and compilation warning.

On Thursday, July 7, 2016 8:42:16 PM CEST Arvind Yadav wrote: > Passing value in IS_ERR_VALUE() is wrong, as they > pass an 'int' into a function that takes an 'unsigned long' > argument. This happens to work because the type is sign-extended > on 64-bit architectures before it

[PATCH] Remove lots of IS_ERR_VALUE abuses and compilation warning.

Passing value in IS_ERR_VALUE() is wrong, as they pass an 'int' into a function that takes an 'unsigned long' argument. This happens to work because the type is sign-extended on 64-bit architectures before it gets converted into an unsigned type. Passing an 'unsigned

[PATCH] Removing lots of IS_ERR_VALUE abuses and compilation warning.

Passing value in IS_ERR_VALUE() is wrong, as they pass an 'int' into a function that takes an 'unsigned long' argument. This happens to work because the type is sign-extended on 64-bit architectures before it gets converted into an unsigned type. Passing an 'unsigned

Re: [PATCH] Remove lots of IS_ERR_VALUE abuses.

As per your concern, I have change commit message. Submit other patch. Thanks, Arvind Yadav On Thursday 07 July 2016 01:40 PM, Arnd Bergmann wrote: On Thursday, July 7, 2016 12:47:43 AM CEST Arvind Yadav wrote: Most users of IS_ERR_VALUE() in the kernel are wrong, as they pass an

[PATCH 3/3] powerpc/pseries: Use kernel hotplug queue for PowerVM hotplug events

The sysfs interface used to handle PowerVM hotplug events should use the hotplug queue as well. PRRN events will soon be placing many hotplug events on the queue at once and we will need ordinary hotplug events to use the queue as well in order to ensure these events will still be handled and that

[PATCH 2/3] powerpc/pseries: Add support for hotplug interrupt source

Add handler for new hotplug interrupt. For memory and CPU hotplug events, we will add the hotplug errorlog to the hotplug workqueue. Since PCI hotplug is not currently supported in the kernel, PCI hotplug events are written to the rtas_log_bug and are handled by rtas_errd. Signed-off-by: John

[PATCH 1/3] powerpc/pseries: Add pseries hotplug workqueue

In support of PAPR changes to add a new hotplug interrupt, introduce a hotplug workqueue to avoid processing hotplug events in interrupt context. We will also take advantage of the queue on PowerVM to ensure hotplug events initiated from different sources (HMC and PRRN events) are handled and

[PATCH 0/3] powerpc/pseries: Add pseries hotplug queue and PowerVM/PowerKVM use cases

This series introduces a new workqueue for handling hotplug events. On PowerKVM guests, this provides a work deferral mechanism to avoid processing hotplug events in interrupt context. On PowerVM lpars, this will be used to ensure that hotplug events initiated from the HMC and from PRRN events are

Re: [PATCH v2] irqchip/qeic: move qeic driver from drivers/soc/fsl/qe

Hi Zhao Qiang, On Thu, Jul 07, 2016 at 09:23:55AM +0800, Zhao Qiang wrote: > The driver stays the same. > > Signed-off-by: Zhao Qiang > --- > Changes for v2: > - modify the subject and commit msg > > drivers/irqchip/Makefile| 1 + >

Re: [v4] powerpc: Export thread_struct.used_vr/used_vsr to user space

On 07/07/2016 15:21, Benjamin Herrenschmidt wrote: > On Thu, 2016-07-07 at 15:12 +0200, Laurent Dufour wrote: >> >> Basically, CRIU checkpoints the process register's state through the >> ptrace API, and it restores it through a signal frame at restart time. >> This is quite odd but that the way

Re: [v4] powerpc: Export thread_struct.used_vr/used_vsr to user space

On Thu, 2016-07-07 at 23:21 +1000, Benjamin Herrenschmidt wrote: >  > I think the right fix is that if a restore_sigcontext() has the MSR > bits set, > it should set the corresponding used_* flag. Something like this: (totally untested) diff --git a/arch/powerpc/kernel/signal_32.c

Re: [PATCH V5 2/2] cpufreq: Reuse new freq-table helpers

On Monday, June 27, 2016 09:59:34 AM Viresh Kumar wrote: > This patch migrates few users of cpufreq tables to the new helpers that > work on sorted freq-tables. > > Signed-off-by: Viresh Kumar Applied, thanks! ___

Re: [v4] powerpc: Export thread_struct.used_vr/used_vsr to user space

On Thu, 2016-07-07 at 15:12 +0200, Laurent Dufour wrote: > > Basically, CRIU checkpoints the process register's state through the > ptrace API, and it restores it through a signal frame at restart time. > This is quite odd but that the way it works on all the CRIU's supported > architectures. >

Re: [v4] powerpc: Export thread_struct.used_vr/used_vsr to user space

On 07/07/2016 13:15, Michael Ellerman wrote: > On Thu, 2016-07-07 at 07:49:36 UTC, Simon Guo wrote: >> From: Simon Guo >> >> These 2 fields track whether user process has used Altivec/VSX >> registers or not. They are used by kernel to setup signal frame >> on user stack

Re: [PATCH 02/41] drm: Fix broken use of _PAGE_NO_CACHE on powerpc

On Thu, 2016-07-07 at 22:38 +1000, Michael Ellerman wrote: > Benjamin Herrenschmidt writes: > > > That constant no longer exist. Use the proper accessor instead > > I still see it? Hrm, right, it does, I think it's just not always accessible or the wrong type. That

[PATCH 5/5] powerpc/xmon: Dump ISA 2.07 SPRs

Signed-off-by: Michael Ellerman --- arch/powerpc/include/asm/reg.h | 1 + arch/powerpc/xmon/xmon.c | 44 ++ 2 files changed, 45 insertions(+) diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index

[PATCH 4/5] powerpc/xmon: Dump ISA 2.06 SPRs

Signed-off-by: Michael Ellerman --- arch/powerpc/xmon/xmon.c | 31 +++ 1 file changed, 31 insertions(+) diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c index efe6f4ee4634..ed6f73a74378 100644 --- a/arch/powerpc/xmon/xmon.c +++

[PATCH 3/5] powerpc/xmon: Adjust spacing of existing SPRs to make room for more

Purely to make it pleasing to the eye. Signed-off-by: Michael Ellerman --- arch/powerpc/xmon/xmon.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c index 369501283994..efe6f4ee4634 100644

[PATCH 2/5] powerpc/xmon: Move static regno into its only user

Signed-off-by: Michael Ellerman --- arch/powerpc/xmon/xmon.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c index f351ba6a58ab..369501283994 100644 --- a/arch/powerpc/xmon/xmon.c +++

[PATCH 1/5] powerpc/xmon: Remove unused externs

None of these are used, or have been since we merged ppc & ppc64. Signed-off-by: Michael Ellerman --- arch/powerpc/xmon/xmon.c | 5 - 1 file changed, 5 deletions(-) diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c index c5e155108be5..f351ba6a58ab 100644

Re: [PATCH 2/3] nvme: implement DMA_ATTR_NO_WARN

On 07/06/2016 09:41 PM, Gabriel Krisman Bertazi wrote: checkpatch.pl complains about line wrapping. Other than that, this looks good to me. I'll submit a v2 w/ that and typos fixed. Thanks for reviewing. -- Mauricio Faria de Oliveira IBM Linux Technology Center

[PATCH v2 3/3] powerpc: implement DMA_ATTR_NO_WARN

Add support for the DMA_ATTR_NO_WARN attribute on powerpc iommu code. Signed-off-by: Mauricio Faria de Oliveira --- Changelog: v2: - address warnings from checkpatch.pl (line wrapping and typos) arch/powerpc/kernel/iommu.c | 6 -- 1 file changed, 4

[PATCH v2 2/3] nvme: implement DMA_ATTR_NO_WARN

Use the DMA_ATTR_NO_WARN attribute on dma_map_sg() calls of nvme driver. Signed-off-by: Mauricio Faria de Oliveira Reviewed-by: Gabriel Krisman Bertazi --- Changelog: v2: - address warnings from checkpatch.pl (line wrapping and typos)

[PATCH v2 1/3] dma: introduce DMA_ATTR_NO_WARN

Introduce the DMA_ATTR_NO_WARN attribute, and document it. Signed-off-by: Mauricio Faria de Oliveira --- Changelog: v2: - address warnings from checkpatch.pl (line wrapping and typos) Documentation/DMA-attributes.txt | 17 +

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