Re: [RFC] fs: add userspace critical mounts event support

On 03/09/2016 11:10, Dmitry Torokhov wrote: > I was thinking if we kernel could post > "conditions" (maybe simple stings) that it waits for, and userspace > could unlock these "conditions". One of them might be "firmware > available". On idea offered by Josh Triplett that seems to overlap with

[PATCH] crypto: sha1-powerpc: little-endian support

The driver does not handle endianness properly when loading the input data. Signed-off-by: Marcelo Cerri --- arch/powerpc/crypto/sha1-powerpc-asm.S | 13 +++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git

[powerpc:test 88/124] arch/powerpc/kernel/exceptions-64s.S:1493: Error: attempt to move .org backwards

Hi Nicholas, First bad commit (maybe != root cause): tree: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git test head: 6f13ef67fa45546813f6a7f798d95a27ba469f29 commit: 5bbf2094b13af5f9253a607681a51e27de249ab8 [88/124] powerpc/64s: consolidate Machine Check 0x200 interrupt

[bug] crypto/vmx/p8_ghash memory corruption in 4.8-rc7

Hi, I'm chasing a memory corruption with 4.8-rc7 as I'm observing random Oopses on ppc BE/LE systems (lpars, KVM guests). About 30% of issues is that module list gets corrupted, and "cat /proc/modules" or "lsmod" triggers an Oops, for example: [ 88.486041] Unable to handle kernel paging

Re: [PATCH 2/3] bpf powerpc: implement support for tail calls

On 09/23/2016 10:35 PM, Naveen N. Rao wrote: Tail calls allow JIT'ed eBPF programs to call into other JIT'ed eBPF programs. This can be achieved either by: (1) retaining the stack setup by the first eBPF program and having all subsequent eBPF programs re-using it, or, (2) by unwinding/tearing

Re: [PATCH 3/3] bpf powerpc: add support for bpf constant blinding

On 09/23/2016 10:35 PM, Naveen N. Rao wrote: In line with similar support for other architectures by Daniel Borkmann. 'MOD Default X' from test_bpf without constant blinding: 84 bytes emitted from JIT compiler (pass:3, flen:7) d58a4688 + : 0: nop 4: nop 8: std

[PATCH 2/2] bpf samples: update tracex5 sample to use __seccomp_filter

seccomp_phase1() does not exist anymore. Instead, update sample to use __seccomp_filter(). While at it, set max locked memory to unlimited. Signed-off-by: Naveen N. Rao --- I am not completely sure if __seccomp_filter is the right place to hook in. This works for

[PATCH 1/2] bpf samples: fix compiler errors with sockex2 and sockex3

These samples fail to compile as 'struct flow_keys' conflicts with definition in net/flow_dissector.h. Fix the same by renaming the structure used in the sample. Signed-off-by: Naveen N. Rao --- samples/bpf/sockex2_kern.c | 10 +-

[PATCH 3/3] bpf powerpc: add support for bpf constant blinding

In line with similar support for other architectures by Daniel Borkmann. 'MOD Default X' from test_bpf without constant blinding: 84 bytes emitted from JIT compiler (pass:3, flen:7) d58a4688 + : 0: nop 4: nop 8: std r27,-40(r1) c: std r28,-32(r1) 10: xor

[PATCH 2/3] bpf powerpc: implement support for tail calls

Tail calls allow JIT'ed eBPF programs to call into other JIT'ed eBPF programs. This can be achieved either by: (1) retaining the stack setup by the first eBPF program and having all subsequent eBPF programs re-using it, or, (2) by unwinding/tearing down the stack and having each eBPF program deal

[PATCH 1/3] bpf powerpc: introduce accessors for using the tmp local stack space

While at it, ensure that the location of the local save area is consistent whether or not we setup our own stackframe. This property is utilised in the next patch that adds support for tail calls. Signed-off-by: Naveen N. Rao --- arch/powerpc/net/bpf_jit64.h

Re: [PATCH 2/2] powernv:idle:Implement lite variant of power_enter_stop

Hi Michael, On Fri, Sep 23, 2016 at 09:03:45PM +1000, Michael Ellerman wrote: > "Gautham R. Shenoy" writes: > > > From: "Gautham R. Shenoy" > > > > This patch adds a function named power_enter_stop_lite() that can > > execute a stop instruction

ehea crash on boot

Heh, another thing to debug :) mm: Hashing failure ! EA=0xd80080124040 access=0x800e current=NetworkManager trap=0x300 vsid=0x13d349c ssize=1 base psize=2 psize 2 pte=0xc0003bc0300301ae mm: Hashing failure ! EA=0xd80080124040 access=0x800e current=NetworkManager

Re: [PATCH v2] powerpc/mm: export current mmu mode info

Hari Bathini writes: > diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h > index e2fb408..558987c 100644 > --- a/arch/powerpc/include/asm/mmu.h > +++ b/arch/powerpc/include/asm/mmu.h > @@ -199,6 +199,21 @@ static inline void

Re: [PATCH 2/2] powernv:idle:Implement lite variant of power_enter_stop

"Gautham R. Shenoy" writes: > From: "Gautham R. Shenoy" > > This patch adds a function named power_enter_stop_lite() that can > execute a stop instruction when ESL and EC bits are set to zero in the > PSSCR. The function handles the wake-up

Re: [PATCH] percpu: improve generic percpu modify-return implementation

On Thu, 22 Sep 2016 12:07:49 -0400 Tejun Heo wrote: > Hello, > > On Thu, Sep 22, 2016 at 02:35:00PM +1000, Nicholas Piggin wrote: > > Well thank you, how about you? > > Heh, can't complain. Hope to see you around sometime. It's been > forever. Yeah, it has been. Hopefully

Re: [PATCH kernel 14/15] vfio/spapr_tce: Export container API for external users

On Wed, Sep 21, 2016 at 04:56:52PM +1000, Alexey Kardashevskiy wrote: > On 07/09/16 19:09, Alexey Kardashevskiy wrote: > > On 29/08/16 23:27, David Gibson wrote: > >> On Mon, Aug 29, 2016 at 04:35:15PM +1000, Alexey Kardashevskiy wrote: > >>> On 18/08/16 10:22, Alexey Kardashevskiy wrote: >

Re: [PATCH v2] powerpc/mm: export current mmu mode info

On Friday 23 September 2016 10:14 AM, Aneesh Kumar K.V wrote: Hari Bathini writes: Hi Aneesh, On Thursday 22 September 2016 09:54 PM, Aneesh Kumar K.V wrote: Hari Bathini writes: The kernel now supports both radix and hash MMU

[PATCH v5 17/20] selftests/powerpc: Add checks for transactional VSXs in signal contexts

If a thread receives a signal while transactional the kernel creates a second context to show the transactional state of the process. This test loads some known values and waits for a signal and confirms that the expected values are in the signal context. Signed-off-by: Cyril Bur

[PATCH v5 13/20] selftests/powerpc: Check that signals always get delivered

Signed-off-by: Cyril Bur --- tools/testing/selftests/powerpc/Makefile | 1 + tools/testing/selftests/powerpc/signal/Makefile| 12 +++ tools/testing/selftests/powerpc/signal/signal.S| 50 ++ tools/testing/selftests/powerpc/signal/signal.c| 111

[PATCH v5 12/20] selftests/powerpc: Add TM tcheck helpers in C

Signed-off-by: Cyril Bur --- tools/testing/selftests/powerpc/tm/tm.h | 27 +++ 1 file changed, 27 insertions(+) diff --git a/tools/testing/selftests/powerpc/tm/tm.h b/tools/testing/selftests/powerpc/tm/tm.h index 60318ba..2c8da74 100644 ---

[PATCH v5 02/20] powerpc: Always restore FPU/VEC/VSX if hardware transactional memory in use

Comment from arch/powerpc/kernel/process.c:967: If userspace is inside a transaction (whether active or suspended) and FP/VMX/VSX instructions have ever been enabled inside that transaction, then we have to keep them enabled and keep the FP/VMX/VSX state loaded while ever the transaction

[PATCH v5 01/20] selftests/powerpc: Compile selftests against headers without AT_HWCAP2

It might be nice to compile selftests against older kernels and headers but which may not have HWCAP2. Signed-off-by: Cyril Bur --- tools/testing/selftests/powerpc/utils.h | 7 +++ 1 file changed, 7 insertions(+) diff --git a/tools/testing/selftests/powerpc/utils.h

[PATCH v5 03/20] powerpc: Add check_if_tm_restore_required() to giveup_all()

giveup_all() causes FPU/VMX/VSX facilities to be disabled in a threads MSR. If the thread performing the giveup was transactional, the kernel must record which facilities were in use before the giveup as the thread must have these facilities re-enabled on return to userspace. >From process.c: /*

[PATCH v5 10/20] selftests/powerpc: Introduce GPR asm helper header file

Signed-off-by: Cyril Bur --- tools/testing/selftests/powerpc/gpr_asm.h | 96 +++ 1 file changed, 96 insertions(+) create mode 100644 tools/testing/selftests/powerpc/gpr_asm.h diff --git a/tools/testing/selftests/powerpc/gpr_asm.h

[PATCH v5 06/20] powerpc: signals: Stop using current in signal code

Much of the signal code takes a pt_regs on which it operates. Over time the signal code has needed to know more about the thread than what pt_regs can supply, this information is obtained as needed by using 'current'. This approach is not strictly incorrect however it does mean that there is now

[PATCH v5 04/20] powerpc: Return the new MSR from msr_check_and_set()

msr_check_and_set() always performs a mfmsr() to determine if it needs to perform an mtmsr(), as mfmsr() can be a costly operation msr_check_and_set() could return the MSR now on the CPU to avoid callers of msr_check_and_set having to make their own mfmsr() call. Signed-off-by: Cyril Bur

[PATCH v5 00/20] Consistent TM structures

v5: Rebased on powerpc-next to solve conflict with commit e1c0d66fcb179a1737b3d5cc11c6e37bcabbd861 Author: Simon Guo Date: Tue Jul 26 16:06:01 2016 +0800 powerpc: Set used_(vsr|vr|spe) in sigreturn path when MSR bits are active v4: Address review from

[PATCH v5 20/20] powerpc: Remove do_load_up_transact_{fpu,altivec}

Previous rework of TM code leaves these functions unused Signed-off-by: Cyril Bur --- arch/powerpc/include/asm/tm.h | 5 - arch/powerpc/kernel/fpu.S | 26 -- arch/powerpc/kernel/vector.S | 25 - 3 files changed, 56

[PATCH v5 11/20] selftests/powerpc: Allow tests to extend their kill timeout

Signed-off-by: Cyril Bur --- tools/testing/selftests/powerpc/harness.c | 9 +++-- tools/testing/selftests/powerpc/utils.h | 2 +- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/tools/testing/selftests/powerpc/harness.c

[PATCH v5 19/20] powerpc: tm: Rename transct_(*) to ck(\1)_state

Make the structures being used for checkpointed state named consistently with the pt_regs/ckpt_regs. Signed-off-by: Cyril Bur --- arch/powerpc/include/asm/processor.h | 8 ++--- arch/powerpc/kernel/asm-offsets.c| 12 arch/powerpc/kernel/fpu.S| 2 +-

[PATCH v5 18/20] powerpc: tm: Always use fp_state and vr_state to store live registers

There is currently an inconsistency as to how the entire CPU register state is saved and restored when a thread uses transactional memory (TM). Using transactional memory results in the CPU having duplicated (almost) all of its register state. This duplication results in a set of registers which

[PATCH v5 14/20] selftests/powerpc: Add checks for transactional GPRs in signal contexts

If a thread receives a signal while transactional the kernel creates a second context to show the transactional state of the process. This test loads some known values and waits for a signal and confirms that the expected values are in the signal context. Signed-off-by: Cyril Bur

[PATCH v5 05/20] powerpc: Never giveup a reclaimed thread when enabling kernel {fp, altivec, vsx}

After a thread is reclaimed from its active or suspended transactional state the checkpointed state exists on CPU, this state (along with the live/transactional state) has been saved in its entirety by the reclaiming process. There exists a sequence of events that would cause the kernel to call

[PATCH v5 09/20] selftests/powerpc: Move VMX stack frame macros to header file

Signed-off-by: Cyril Bur --- tools/testing/selftests/powerpc/math/vmx_asm.S | 85 +- tools/testing/selftests/powerpc/vmx_asm.h | 98 ++ 2 files changed, 99 insertions(+), 84 deletions(-) create mode 100644

[PATCH v5 07/20] selftests/powerpc: Check for VSX preservation across userspace preemption

Ensure the kernel correctly switches VSX registers correctly. VSX registers are all volatile, and despite the kernel preserving VSX across syscalls, it doesn't have to. Test that during interrupts and timeslices ending the VSX regs remain the same. Signed-off-by: Cyril Bur

[PATCH v5 15/20] selftests/powerpc: Add checks for transactional FPUs in signal contexts

If a thread receives a signal while transactional the kernel creates a second context to show the transactional state of the process. This test loads some known values and waits for a signal and confirms that the expected values are in the signal context. Signed-off-by: Cyril Bur

[PATCH v5 16/20] selftests/powerpc: Add checks for transactional VMXs in signal contexts

If a thread receives a signal while transactional the kernel creates a second context to show the transactional state of the process. This test loads some known values and waits for a signal and confirms that the expected values are in the signal context. Signed-off-by: Cyril Bur

[PATCH v5 08/20] selftests/powerpc: Rework FPU stack placement macros and move to header file

The FPU regs are placed at the top of the stack frame. Currently the position expected to be passed to the macro. The macros now should be passed the stack frame size and from there they can calculate where to put the regs, this makes the use simpler. Also move them to a header file to be used in