Re: [PATCH] drivers/pcmcia: NO_IRQ removal for electra_cf.c

Arnd Bergmann writes: > On Tue, Mar 14, 2017 at 11:51 AM, Michael Ellerman > wrote: >> Michael Ellerman writes: >> >>> We'd like to eventually remove NO_IRQ on powerpc, so remove usages of it >>> from electra_cf.c which is a

Re: [PATCH kernel v8 10/10] KVM: PPC: VFIO: Add in-kernel acceleration for VFIO

On Tue, Mar 14, 2017 at 03:05:27PM -0600, Alex Williamson wrote: > On Fri, 10 Mar 2017 14:53:37 +1100 > Alexey Kardashevskiy wrote: > > > This allows the host kernel to handle H_PUT_TCE, H_PUT_TCE_INDIRECT > > and H_STUFF_TCE requests targeted an IOMMU TCE table used for VFIO > >

Re: [PATCH v2 16/23] MAINTAINERS: Add file patterns for powerpc device tree bindings

Geert Uytterhoeven writes: > Submitters of device tree binding documentation may forget to CC > the subsystem maintainer if this is missing. > > Signed-off-by: Geert Uytterhoeven > Cc: Benjamin Herrenschmidt > Cc: Paul

Re: Linux 4.11: Reported regressions as of Tuesday, 20176-03-14

Thorsten Leemhuis writes: > Hi! Find below my first regression report for Linux 4.11. It lists 9 > regressions I'm currently aware of. > > As always: Are you aware of any other regressions? Then please let me > know (simply CC regressi...@leemhuis.info). And please

Re: syscall statx not implemented on powerpc

Chris Packham writes: > On 15/03/17 00:57, Michael Ellerman wrote: >> Chris Packham writes: >>> On 13/03/17 21:52, Chandan Rajendra wrote: On Monday, March 13, 2017 03:33:07 AM Chris Packham wrote: > I've just

Re: [RFC PATCH 00/13] Introduce first class virtual address spaces

On Tue, 14 Mar 2017, Chris Metcalf wrote: > On 3/14/2017 12:12 PM, Till Smejkal wrote: > > On Mon, 13 Mar 2017, Andy Lutomirski wrote: > > > On Mon, Mar 13, 2017 at 7:07 PM, Till Smejkal > > > wrote: > > > > On Mon, 13 Mar 2017, Andy Lutomirski wrote: > > > > > This

Re: [RFC PATCH 00/13] Introduce first class virtual address spaces

On 3/14/2017 12:12 PM, Till Smejkal wrote: On Mon, 13 Mar 2017, Andy Lutomirski wrote: On Mon, Mar 13, 2017 at 7:07 PM, Till Smejkal wrote: On Mon, 13 Mar 2017, Andy Lutomirski wrote: This sounds rather complicated. Getting TLB flushing right seems tricky. Why

Re: [RFC PATCH 07/13] kernel/fork: Split and export 'mm_alloc' and 'mm_init'

On Tue, 14 Mar 2017, David Laight wrote: > From: Linuxppc-dev Till Smejkal > > Sent: 13 March 2017 22:14 > > The only way until now to create a new memory map was via the exported > > function 'mm_alloc'. Unfortunately, this function not only allocates a new > > memory map, but also completely

Re: [RFC PATCH 00/13] Introduce first class virtual address spaces

On Mon, 13 Mar 2017, Andy Lutomirski wrote: > On Mon, Mar 13, 2017 at 7:07 PM, Till Smejkal > wrote: > > On Mon, 13 Mar 2017, Andy Lutomirski wrote: > >> This sounds rather complicated. Getting TLB flushing right seems > >> tricky. Why not just map the same thing

Re: [PATCH kernel v8 10/10] KVM: PPC: VFIO: Add in-kernel acceleration for VFIO

On Fri, 10 Mar 2017 14:53:37 +1100 Alexey Kardashevskiy wrote: > This allows the host kernel to handle H_PUT_TCE, H_PUT_TCE_INDIRECT > and H_STUFF_TCE requests targeted an IOMMU TCE table used for VFIO > without passing them to user space which saves time on switching > to user

Re: [FIX PATCH v1] powerpc/pseries: Fix reference count leak during CPU unplug

On 03/13/2017 03:29 AM, Bharata B Rao wrote: > On Thu, Mar 09, 2017 at 01:34:00PM -0800, Tyrel Datwyler wrote: >> On 03/08/2017 08:37 PM, Bharata B Rao wrote: >>> The following warning is seen when a CPU is hot unplugged on a PowerKVM >>> guest: >> >> Is this the case with cpus present at boot?

Re: [PATCH kernel v8 04/10] powerpc/vfio_spapr_tce: Add reference counting to iommu_table

On Fri, 10 Mar 2017 14:53:31 +1100 Alexey Kardashevskiy wrote: > So far iommu_table obejcts were only used in virtual mode and had > a single owner. We are going to change this by implementing in-kernel > acceleration of DMA mapping requests. The proposed acceleration > will

Re: syscall statx not implemented on powerpc

On 15/03/17 00:57, Michael Ellerman wrote: > Chris Packham writes: > >> On 13/03/17 21:52, Chandan Rajendra wrote: >>> On Monday, March 13, 2017 03:33:07 AM Chris Packham wrote: Hi, I've just attempted to build a powerpc kernel from 4.11-rc2 using

Re: Linux 4.11: Reported regressions as of Tuesday, 20176-03-14

On Tue, Mar 14, 2017 at 3:02 AM, Thorsten Leemhuis wrote: > > Desc: PowerPC crashes on boot, bisected to commit 5657933dbb6e > Repo: 2017-03-02 > https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1343553.html > Stat: 2017-03-09 >

[GIT PULL 00/19] perf/core improvements and fixes

into perf/core (2017-03-07 08:14:14 +0100) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git tags/perf-core-for-mingo-4.12-20170314 for you to fetch changes up to 5f6bee34707973ea7879a7857fd63ddccc92fff3: kprobes: Convert

[PATCH 16/19] perf kretprobes: Offset from reloc_sym if kernel supports it

From: "Naveen N. Rao" We indicate support for accepting sym+offset with kretprobes through a line in ftrace README. Parse the same to identify support and choose the appropriate format for kprobe_events. As an example, without this perf patch, but with the

[PATCH 15/19] perf probe: Factor out the ftrace README scanning

From: "Naveen N. Rao" Simplify and separate out the ftrace README scanning logic into a separate helper. This is used subsequently to scan for all patterns of interest and to cache the result. Since we are only interested in availability of probe argument type

[PATCH 17/19] perf powerpc: Choose local entry point with kretprobes

From: "Naveen N. Rao" perf now uses an offset from _text/_stext for kretprobes if the kernel supports it, rather than the actual function name. As such, let's choose the LEP for powerpc ABIv2 so as to ensure the probe gets hit. Do it only if the kernel supports

Re: [PATCH kernel v8 03/10] powerpc/iommu/vfio_spapr_tce: Cleanup iommu_table disposal

On Fri, 10 Mar 2017 14:53:30 +1100 Alexey Kardashevskiy wrote: > At the moment iommu_table can be disposed by either calling > iommu_table_free() directly or it_ops::free(); the only implementation > of free() is in IODA2 - pnv_ioda2_table_free() - and it calls >

Re: [PATCH kernel v8 00/10] powerpc/kvm/vfio: Enable in-kernel acceleration

On Tue, 14 Mar 2017 11:55:33 +1100 David Gibson wrote: > On Tue, Mar 14, 2017 at 11:54:03AM +1100, Alexey Kardashevskiy wrote: > > On 10/03/17 15:48, David Gibson wrote: > > > On Fri, Mar 10, 2017 at 02:53:27PM +1100, Alexey Kardashevskiy wrote: > > >> This is my

Re: [PATCH 08/29] drivers, md: convert mddev.active from atomic_t to refcount_t

On Tue, 2017-03-14 at 12:29 +, Reshetova, Elena wrote: > > Elena Reshetova writes: > > > > > refcount_t type and corresponding API should be > > > used instead of atomic_t when the variable is used as > > > a reference counter. This allows to avoid accidental > > >

Re: [PATCH 3/3] powernv:Recover correct PACA on wakeup from a stop on P9 DD1

On Mon, 13 Mar 2017 11:31:28 +0530 "Gautham R. Shenoy" wrote: > From: "Gautham R. Shenoy" > > POWER9 platform can be configured to rebalance per-thread resources > within a core in order to improve SMT performance. Certain STOP > states can be

Re: [PATCH 2/3] powernv:idle: Don't override default/deepest directly in kernel

On Mon, 13 Mar 2017 11:31:27 +0530 "Gautham R. Shenoy" wrote: > From: "Gautham R. Shenoy" > > Currently during idle-init on power9, if we don't find suitable stop > states in the device tree that can be used as the > default_stop/deepest_stop,

RE: [PATCH 08/29] drivers, md: convert mddev.active from atomic_t to refcount_t

> Elena Reshetova writes: > > > refcount_t type and corresponding API should be > > used instead of atomic_t when the variable is used as > > a reference counter. This allows to avoid accidental > > refcounter overflows that might lead to use-after-free > > situations.

Re: [PATCH 1/3] powernv:smp: Add busy-wait loop as fall back for CPU-Hotplug

On Mon, 13 Mar 2017 11:31:26 +0530 "Gautham R. Shenoy" wrote: > [Changelog written with inputs from sva...@linux.vnet.ibm.com] > Signed-off-by: Gautham R. Shenoy Reviewed-by: Nicholas Piggin > --- >

Re: [PATCH v5 2/5] powerpc: kretprobes: override default function entry offset

Em Thu, Mar 09, 2017 at 05:37:38PM +1100, Michael Ellerman escreveu: > "Naveen N. Rao" writes: > > On 2017/03/08 11:29AM, Arnaldo Carvalho de Melo wrote: > >> > I wasn't sure if you were planning on picking up KPROBES_ON_FTRACE for > >> > v4.11. If so, it would

Re: [PATCH v2 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src

On Tue, Mar 14, 2017 at 02:31:51PM +0530, Madhavan Srinivasan wrote: > >Huh? PPC hasn't yet implemented this? Then why are you fixing it? > > yes, PPC hasn't implemented this (until now). until now where? > And did not understand "Then why are you fixing it?" I see no implementation; so why

Re: [PATCH] drivers/pcmcia: NO_IRQ removal for electra_cf.c

On Tue, Mar 14, 2017 at 11:51 AM, Michael Ellerman wrote: > Michael Ellerman writes: > >> We'd like to eventually remove NO_IRQ on powerpc, so remove usages of it >> from electra_cf.c which is a powerpc-only driver. >> >> Signed-off-by: Michael Ellerman

Re: [PATCH kernel] powerpc/powernv/ioda2: Update iommu table base on ownership change

On 02/20/2017 11:41 PM, Alexey Kardashevskiy wrote: Cc: Gavin Shan Signed-off-by: Alexey Kardashevskiy Tested-by: Mauricio Faria de Oliveira P.S.: sorry, late, but for the record. -- Mauricio Faria de Oliveira IBM

[PATCH 6/6] powerpc/64s: POWER8 add missing machine check definitions

POWER8 uses bit 36 in SRR1 like POWER9 for i-side machine checks, and contains several conditions for link timeouts that are not currently handled. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/mce_power.c | 26 +++--- 1 file changed, 19

[PATCH 5/6] powerpc/64s: data driven machine check handling

Move the handling (corrective action) of machine checks to the table based evaluation. This changes P7 and P8 ERAT flushing from using SLB flush to using ERAT flush. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/mce_power.c | 328

[PATCH 4/6] powerpc/64s: data driven machine check evaluation

Have machine types define i-side and d-side tables to describe their machine check encodings, and match entries to evaluate (for reporting) machine checks. Functionality is mostly unchanged (tested with a userspace harness), but it does make a change in that it no longer records DAR as the

[PATCH 3/6] powerpc/64s: move POWER machine check defines into mce_power.c

Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/mce.h | 91 arch/powerpc/kernel/mce_power.c | 92 + 2 files changed, 92 insertions(+), 91 deletions(-) diff --git

[PATCH 2/6] powerpc/64s: clean up machine check recovery flushing

Use the flush function introduced with the POWER9 machine check handler for POWER7 and 8, rather than open coding it multiple times in callers. There is a specific ERAT flush type introduced for POWER9, but the POWER7-8 ERAT errors continue to do SLB flushing (which also flushes ERAT), so as not

[PATCH 1/6] powerpc/64s: machine check print NIP

Print the faulting address of the machine check that may help with debugging. The effective address reported can be a target memory address rather than the faulting instruction address. Fix up a dangling bracket while here. Signed-off-by: Nicholas Piggin ---

[PATCH 0/6] table-based machine check handlers

Hi, This is a rebase of the table based MCE patches on top of the POWER9 handler that was merged upstream. Plus a couple of misc things (patches 1 and 6). The plan is to have OPAL firmware do most of this recovery and parsing in future, but I think it's worth tidying this up. IMO it's easier to

Re: [PATCH 08/29] drivers, md: convert mddev.active from atomic_t to refcount_t

Elena Reshetova writes: > refcount_t type and corresponding API should be > used instead of atomic_t when the variable is used as > a reference counter. This allows to avoid accidental > refcounter overflows that might lead to use-after-free > situations. > >

Re: syscall statx not implemented on powerpc

Chris Packham writes: > On 13/03/17 21:52, Chandan Rajendra wrote: >> On Monday, March 13, 2017 03:33:07 AM Chris Packham wrote: >>> Hi, >>> >>> I've just attempted to build a powerpc kernel from 4.11-rc2 using a >>> custom defconfig (available on request) and

Re: powerpc: Fix crash introduced with commit 5657933dbb6e

On Fri, 2017-03-10 at 02:33:51 UTC, Larry Finger wrote: > Code inserted during the code merged between kernels 4.10 and 4.11-rc1 > caused an early panic quickly followed by a complete shutdown for > PowerPC. The traceback was not displayed long enough to read or > photograph, thus it is not

Re: powerpc/boot: Fix zImage TOC alignment

On Tue, 2017-03-07 at 23:40:21 UTC, Michael Ellerman wrote: > Recent toolchains force the TOC to be 256 byte aligned. We need to > enforce this alignment in the zImage linker script, otherwise pointers > to our TOC variables (__toc_start) could be incorrect. If the actual > start of the TOC and

Re: selftests/powerpc: Replace stxvx and lxvx with their equivalent instruction

On Tue, 2017-03-07 at 00:39:31 UTC, Cyril Bur wrote: > On POWER8 (ISA 2.07) lxvx and stxvx are defined to be extended mnemonics > of lxvd2x and stxvd2x. For POWER9 (ISA 3.0) the HW architects in their > infinite wisdom made lxvx and stxvx instructions in their own right. > > POWER9 aware GCC will

Re: [1/3] powerpc/64s: fix handling of non-synchronous machine checks

On Tue, 2017-02-28 at 02:00:46 UTC, Nicholas Piggin wrote: > A synchronous machine check is an exception raised by the attempt to > execute the current instruction. If the error can't be corrected, it > can make sense to SIGBUS the currently running process. > > In other cases, the error

Re: [kernel] powerpc/powernv/ioda2: Gracefully fail if too many TCE levels requested

On Wed, 2017-02-22 at 04:43:59 UTC, Alexey Kardashevskiy wrote: > The IODA2 specification says that a 64 DMA address cannot use top 4 bits > (3 are reserved and one is a "TVE select"); bottom page_shift bits > cannot be used for multilevel table addressing either. > > The existing IODA2 table

Re: [kernel] powerpc/powernv/ioda2: Update iommu table base on ownership change

On Tue, 2017-02-21 at 02:41:31 UTC, Alexey Kardashevskiy wrote: > On POWERNV platform, in order to do DMA via IOMMU (i.e. 32bit DMA in > our case), a device needs an iommu_table pointer set via > set_iommu_table_base(). > > The codeflow is: > - pnv_pci_ioda2_setup_dma_pe() > -

Re: powerpc/perf: Handle sdar_mode for marked event in power9

On Mon, 2017-02-20 at 13:59:03 UTC, Madhavan Srinivasan wrote: > MMCRA[SDAR_MODE] specifices how the SDAR should be updated in > continous sampling mode. On P9 it must be set to 0b00 when > MMCRA[63] is set. > > Fixes: c7c3f568beff2 ('powerpc/perf: macros for power9 format encoding') >

Re: powerpc/perf: Fix perf_get_data_addr() for power9 DD1

On Mon, 2017-02-20 at 13:56:30 UTC, Madhavan Srinivasan wrote: > Power9 DD1 do not support PMU_HAS_SIER flag and sdsync > in perf_get_data_addr() defaults to MMCRA_SDSYNC which > is wrong. Since power9 MMCRA does not support SDSYNC bit, > patch includes PPMU_NO_SIAR flag to the check and set the >

Re: ioctl structs differ from x86_64?

Adding Pradipta and Christy. Harshal Patil E-mail: harshal.pa...@in.ibm.com     - Original message -From: Harshal Patil/India/IBMTo: linuxppc-dev@lists.ozlabs.orgCc: Sudipto Ghosh/India/IBM@IBMINSubject: ioctl structs differ from x86_64?Date: Tue, Mar 14, 2017 4:07 PM  Hello,   I am

Re: ioctl structs differ from x86_64?

 

ioctl structs differ from x86_64?

Hello,   I am looking into a bug, https://bugzilla.linux.ibm.com/show_bug.cgi?id=152493 ( external mirror is at, https://github.com/opencontainers/runc/issues/1364)    Recently in runc code, they added this code 

RE: [RFC PATCH 07/13] kernel/fork: Split and export 'mm_alloc' and 'mm_init'

From: Linuxppc-dev Till Smejkal > Sent: 13 March 2017 22:14 > The only way until now to create a new memory map was via the exported > function 'mm_alloc'. Unfortunately, this function not only allocates a new > memory map, but also completely initializes it. However, with the > introduction of

[PATCH V2 2/6] cxl: Keep track of mm struct associated with a context

The mm_struct corresponding to the current task is acquired each time an interrupt is raised. So to simplify the code, we only get the mm_struct when attaching an AFU context to the process. The mm_count reference is increased to ensure that the mm_struct can't be freed. The mm_struct will be

[PATCH V2 6/6] cxl: Add psl9 specific code

The new Coherent Accelerator Interface Architecture, level 2, for the IBM POWER9 brings new content and features: - POWER9 Service Layer - Registers - Radix mode - Process element entry - Dedicated-Shared Process Programming Model - Translation Fault Handling - CAPP - Memory Context ID If a

[PATCH V2 4/6] cxl: Rename some psl8 specific functions

Rename a few functions, changing the '_psl' suffix to '_psl8', to make clear that the implementation is psl8 specific. Those functions will have an equivalent implementation for the psl9 in a later patch. Signed-off-by: Christophe Lombard --- drivers/misc/cxl/cxl.h

[PATCH V2 0/6] cxl: Add support for Coherent Accelerator Interface Architecture 2.0

This series adds support for a cxl card which supports the Coherent Accelerator Interface Architecture 2.0. It requires IBM Power9 system and the Power Service Layer, version 9. The PSL provides the address translation and system memory cache for CAIA compliant Accelerators. the PSL attaches to

[PATCH V2 5/6] cxl: Isolate few psl8 specific calls

Point out the specific Coherent Accelerator Interface Architecture, level 1, registers. Code and functions specific to PSL8 (CAIA1) must be framed. Signed-off-by: Christophe Lombard --- drivers/misc/cxl/context.c | 28 +++- drivers/misc/cxl/cxl.h

[PATCH V2 3/6] cxl: Update implementation service layer

The service layer API (in cxl.h) lists some low-level functions whose implementation is different on PSL8, PSL9 and XSL: - Init implementation for the adapter and the afu. - Invalidate TLB/SLB. - Attach process for dedicated/directed models. - Handle psl interrupts. - Debug registers for the

[PATCH V2 1/6] cxl: Remove unused values in bare-metal environment.

The two fields pid and tid of the structure cxl_irq_info are only used in the guest environment. To avoid confusion, it's not necessary to fill the fields in the bare-metal environment. The PSL Process and Thread Identification Register is only used when attaching a dedicated process for PSL8

Re: [PATCH] drivers/pcmcia: NO_IRQ removal for electra_cf.c

Michael Ellerman writes: > We'd like to eventually remove NO_IRQ on powerpc, so remove usages of it > from electra_cf.c which is a powerpc-only driver. > > Signed-off-by: Michael Ellerman > --- > drivers/pcmcia/electra_cf.c | 4 ++-- > 1 file changed,

Linux 4.11: Reported regressions as of Tuesday, 20176-03-14

Hi! Find below my first regression report for Linux 4.11. It lists 9 regressions I'm currently aware of. As always: Are you aware of any other regressions? Then please let me know (simply CC regressi...@leemhuis.info). And please tell me if there is anything in the report that shouldn't be there.

[PATCH 8/8] powerpc/64s: idle POWER8 avoid full state loss recovery when possible

If not all threads were in winkle, full state loss recovery is not necessary and can be avoided. A previous patch removed this optimisation due to some complexity with the implementation. Re-implement it by counting the number of threads in winkle with the per-core idle state. Only restore full

[PATCH 7/8] powerpc/64s: idle do not hold reservation longer than required

When taking the core idle state lock, grab it immediately like a regular lock, rather than adding more tests in there. Holding the lock keeps it stable, so there is no need to do it whole holding the reservation. Signed-off-by: Nicholas Piggin ---

[PATCH 6/8] powerpc/64s: idle expand usable core idle state bits

In preparation for adding more bits to the core idle state word, move the lock bit up, and unlock by flipping the lock bit rather than masking off all but the thread bits. Add branch hints for atomic operations while we're here. Signed-off-by: Nicholas Piggin ---

[PATCH 5/8] powerpc/64s: use PACA_THREAD_IDLE_STATE only in POWER8

POWER9 does not use this field, so it should be moved into the POWER8 code. Update the documentation in the paca struct too. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/paca.h | 12 ++-- arch/powerpc/kernel/idle_book3s.S | 13 +++-- 2 files

[PATCH 4/8] powerpc/64s: fix POWER9 machine check handler from stop state

The ISA specifies power save wakeup can cause a machine check interrupt. The machine check handler currently has code to handle that for POWER8, but POWER9 crashes when trying to execute the P8 style sleep instructions. So queue up the machine check, then call into the idle code to wake up as the

[PATCH 3/8] powerpc/64s: use alternative feature patching

This reduces the number of nops for POWER8. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/idle_book3s.S | 19 --- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle_book3s.S

[PATCH 2/8] powerpc/64s: stop using bit in HSPRG0 to test winkle

The POWER8 idle code has a neat trick of programming the power on engine to restore a low bit into HSPRG0, so idle wakeup code can test and see if it has been programmed this way and therefore lost all state, and avoiding the expensive full restore if not. However this messes with our r13 PACA

[PATCH 1/8] powerpc/64s: move remaining system reset idle code into idle_book3s.S

Should be no functional change. Reviewed-by: Gautham R. Shenoy Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 26 +--- arch/powerpc/kernel/idle_book3s.S| 76 2 files changed,

[PATCH 0/8] idle fixes and changes for POWER8 and POWER9

Hi, This is a resend of the previous idle series, with the addition that I accounted for Gautham's feedback, and also re-introduced the feature to avoid full state restore by counting winkles rather than special HSPRG0 bit. The two big things we get from this, is no longer messing with HSPRG0 in

Re: [PATCH v2 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src

On Monday 13 March 2017 06:20 PM, Peter Zijlstra wrote: On Mon, Mar 13, 2017 at 04:45:51PM +0530, Madhavan Srinivasan wrote: - should you not have fixed this in the tool only? This patch effectively breaks ABI on big-endian architectures. IIUC, we are the first BE user for this feature

Re: [RFC][PATCH 0/2] reworking cause_ipi and adding global doorbell support

On Tue, 14 Mar 2017 15:50:01 +1100 Benjamin Herrenschmidt wrote: > On Tue, 2017-03-14 at 14:35 +1000, Nicholas Piggin wrote: > > > We might need a sync still between clearing the byte and calling the > > > handler no ? Or at least a smp_wmb() to ensure that the clear is