[PATCH] powerpc/crypto/crct10dif-vpmsum: Fix missing preempt_disable()

In crct10dif_vpmsum() we call enable_kernel_altivec() without first disabling preemption, which is not allowed. It used to be sufficient just to call pagefault_disable(), because that also disabled preemption. But the two were decoupled in commit 8222dbe21e79 ("sched/preempt, mm/fault: Decouple

Re: [PATCH v3 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src

Peter Zijlstra writes: > On Tue, Apr 11, 2017 at 07:21:05AM +0530, Madhavan Srinivasan wrote: >> From: Sukadev Bhattiprolu >> >> perf_mem_data_src is an union that is initialized via the ->val field >> and accessed via the bitmap fields. For

[PATCH v2] powerpc/powernv: Block PCI config access on BCM5718 during EEH recovery

Similar to what is done in commit b6541db13952 ("powerpc/eeh: Block PCI config access upon frozen PE"), we need block PCI config access for BCM5719 when recovering frozen error on them. Otherwise, an unexpected recursive fenced PHB error is observed. 0001:06:00.0 Ethernet controller: Broadcom

Re: [PATCH v2 1/2] fadump: reduce memory consumption for capture kernel

Michal Suchánek writes: > On Mon, 17 Apr 2017 20:43:02 +0530 > Hari Bathini wrote: >> On Friday 14 April 2017 01:28 AM, Michal Suchánek wrote: >> > more (optional) properties cannot be added? >> >> Kernel change seems simple over f/w

Re: [PATCH v4 4/5] perf report: Show branch type statistics for stdio mode

On 4/19/2017 8:53 AM, Jin, Yao wrote: On 4/19/2017 2:53 AM, Jiri Olsa wrote: On Wed, Apr 12, 2017 at 06:21:05AM +0800, Jin Yao wrote: SNIP +const char *branch_type_name(int type) +{ +const char *branch_names[PERF_BR_MAX] = { +"N/A", +"JCC", +"JMP", +

Re: powerpc: Drop include of linux/io.h from asm/io.h

On Thu, 2017-04-13 at 13:14:36 UTC, Michael Ellerman wrote: > Currently powerpc's asm/io.h includes linux/io.h, and linux/io.h > includes asm/io.h. > > This can cause problems because depending on which is included first the > order of definitions between the two files will change. > > The

Re: [1/4] powerpc: change the doorbell IPI calling convention

On Thu, 2017-04-13 at 10:16:21 UTC, Nicholas Piggin wrote: > Change the doorbell callers to know about their msgsnd addressing, > rather than have them set a per-cpu target data tag at boot that gets > sent to the cause_ipi functions. The data is only used for doorbell IPI > functions, no other

Re: [V4,7/7,remix] cxl: Add psl9 specific code

On Wed, 2017-04-12 at 14:34:07 UTC, Frederic Barrat wrote: > From: Christophe Lombard > > The new Coherent Accelerator Interface Architecture, level 2, for the > IBM POWER9 brings new content and features: > - POWER9 Service Layer > - Registers > - Radix mode > -

Re: powerpc/mm/hash: don't opencode VMALLOC_INDEX

On Wed, 2017-04-12 at 04:40:22 UTC, "Aneesh Kumar K.V" wrote: > Also remove wrong indentation to fix checkpatch.pl warning. > > Signed-off-by: Aneesh Kumar K.V Applied to powerpc next, thanks. https://git.kernel.org/powerpc/c/5f8122611b35c563a7c907485aafd8

Re: [V4,1/7] cxl: Read vsec perst load image

On Fri, 2017-04-07 at 14:11:53 UTC, Christophe Lombard wrote: > This bit is used to cause a flash image load for programmable > CAIA-compliant implementation. If this bit is set to ‘0’, a power > cycle of the adapter is required to load a programmable CAIA-com- > pliant implementation from

Re: [1/2] powerpc/64s: Add msgp facility unavailable log string

On Fri, 2017-04-07 at 01:27:43 UTC, Nicholas Piggin wrote: > Signed-off-by: Nicholas Piggin Series applied to powerpc next, thanks. https://git.kernel.org/powerpc/c/794464f4dea0b13dacad267c06a01f cheers

Re: [RFC,1/3] powerpc: Allow platforms to force-enable CONFIG_SMP

On Wed, 2017-04-05 at 02:44:49 UTC, Michael Ellerman wrote: > Of the 64-bit Book3S platforms, only powermac supports booting on an > actual non-SMP system. The other platforms can be built with SMP > disabled, but it doesn't make a lot of sense given the CPUs they support > are all multicore or

Re: [PATCH] powerpc/powernv: Block PCI config access on BCM5719 during EEH recovery

On Wed, Apr 19, 2017 at 12:39:43PM +1000, Gavin Shan wrote: >Similar to what is done in commit b6541db13952 ("powerpc/eeh: Block >PCI config access upon frozen PE"), we need block PCI config access >for BCM5719 when recovering frozen error on them. Otherwise, an >unexpected recursive fenced PHB

Re: [PATCH] of: introduce event tracepoints for dynamic device_node lifecyle

On 04/18/17 19:46, Steven Rostedt wrote: > On Tue, 18 Apr 2017 17:07:17 -0700 > Frank Rowand wrote: > > >> As far as I know, there is no easy way to combine trace data and printk() >> style data to create a single chronology of events. If some of the >> information

Re: [PATCH] of: introduce event tracepoints for dynamic device_node lifecyle

On Tue, 18 Apr 2017 18:42:32 -0700 Frank Rowand wrote: > And of course the other issue with using tracepoints is the extra space > required to hold the tracepoint info. With the pr_debug() approach, the > space usage can be easily removed for a production kernel via a

Re: [PATCH] of: introduce event tracepoints for dynamic device_node lifecyle

On Tue, 18 Apr 2017 17:07:17 -0700 Frank Rowand wrote: > As far as I know, there is no easy way to combine trace data and printk() > style data to create a single chronology of events. If some of the > information needed to debug an issue is trace data and some is

[PATCH] powerpc/powernv: Block PCI config access on BCM5719 during EEH recovery

Similar to what is done in commit b6541db13952 ("powerpc/eeh: Block PCI config access upon frozen PE"), we need block PCI config access for BCM5719 when recovering frozen error on them. Otherwise, an unexpected recursive fenced PHB error is observed. 0001:06:00.0 Ethernet controller: Broadcom

Re: [PATCH] of: introduce event tracepoints for dynamic device_node lifecyle

On 04/18/17 18:31, Michael Ellerman wrote: > Frank Rowand writes: > >> On 04/17/17 17:32, Tyrel Datwyler wrote: >>> This patch introduces event tracepoints for tracking a device_nodes >>> reference cycle as well as reconfig notifications generated in response >>> to

Re: [PATCH] of: introduce event tracepoints for dynamic device_node lifecyle

On Wed, Apr 19, 2017 at 2:46 AM, Rob Herring wrote: > On Mon, Apr 17, 2017 at 7:32 PM, Tyrel Datwyler > wrote: >> This patch introduces event tracepoints for tracking a device_nodes >> reference cycle as well as reconfig notifications generated in

[PATCH] powerpc: POWER9 DD1 remove SAO feature

Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/cputable.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h index 9c3a44bb4694..456f584952f8 100644 ---

[PATCH] powerpc: POWER9 remove ICSWX feature

POWER9 does not implement this instruction. Fixes: c3ab300ea5 ("powerpc: Add POWER9 cputable entry") Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/cputable.h| 2 +- arch/powerpc/platforms/Kconfig.cputype | 3 ++- 2 files changed, 3 insertions(+), 2

Re: [PATCH v11 4/7] powerpc/powernv: Override pcibios_default_alignment() to force PCI devices to be page aligned

On 19 April 2017 at 09:47, Michael Ellerman wrote: > Bjorn Helgaas writes: > >> On Mon, Apr 17, 2017 at 4:36 PM, Bjorn Helgaas wrote: >>> From: Yongji Xie >>> diff --git

Re: [PATCH] scsi: ibmvfc: don't check for failure from mempool_alloc()

NeilBrown writes: > mempool_alloc() cannot fail when passed GFP_NOIO or any other gfp > setting that is permitted to sleep. So remove this pointless code. Applied to 4.12/scsi-queue. Thanks! -- Martin K. Petersen Oracle Linux Engineering

Re: [PATCH v11 4/7] powerpc/powernv: Override pcibios_default_alignment() to force PCI devices to be page aligned

Bjorn Helgaas writes: > On Mon, Apr 17, 2017 at 4:36 PM, Bjorn Helgaas wrote: >> From: Yongji Xie >> diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c >> b/arch/powerpc/platforms/powernv/pci-ioda.c >> index

Re: [PATCH] of: introduce event tracepoints for dynamic device_node lifecyle

On 04/18/17 17:07, Frank Rowand wrote: > On 04/17/17 17:32, Tyrel Datwyler wrote: >> This patch introduces event tracepoints for tracking a device_nodes >> reference cycle as well as reconfig notifications generated in response >> to node/property manipulations. >> >> With the recent upstreaming

Re: [PATCH] of: introduce event tracepoints for dynamic device_node lifecyle

Frank Rowand writes: > On 04/17/17 17:32, Tyrel Datwyler wrote: >> This patch introduces event tracepoints for tracking a device_nodes >> reference cycle as well as reconfig notifications generated in response >> to node/property manipulations. >> >> With the recent

Re: [PATCH v4 4/5] perf report: Show branch type statistics for stdio mode

On 4/19/2017 2:53 AM, Jiri Olsa wrote: On Wed, Apr 12, 2017 at 06:21:05AM +0800, Jin Yao wrote: SNIP +const char *branch_type_name(int type) +{ + const char *branch_names[PERF_BR_MAX] = { + "N/A", + "JCC", + "JMP", + "IND_JMP", +

Re: [PATCH v4 4/5] perf report: Show branch type statistics for stdio mode

On 4/19/2017 2:53 AM, Jiri Olsa wrote: On Wed, Apr 12, 2017 at 06:21:05AM +0800, Jin Yao wrote: SNIP +static int hist_iter__branch_callback(struct hist_entry_iter *iter, + struct addr_location *al __maybe_unused, + bool

Re: [PATCH v4 5/5] perf report: Show branch type in callchain entry

On 4/19/2017 2:53 AM, Jiri Olsa wrote: On Wed, Apr 12, 2017 at 06:21:06AM +0800, Jin Yao wrote: SNIP +static int branch_type_str(struct branch_type_stat *stat, + char *bf, int bfsize) +{ + int i, j = 0, printed = 0; + u64 total = 0; + + for (i = 0;

Re: [PATCH v4 5/5] perf report: Show branch type in callchain entry

On 4/19/2017 2:53 AM, Jiri Olsa wrote: On Wed, Apr 12, 2017 at 06:21:06AM +0800, Jin Yao wrote: SNIP static int counts_str_build(char *bf, int bfsize, u64 branch_count, u64 predicted_count, u64 abort_count, u64 cycles_count, -

Re: [PATCH] of: introduce event tracepoints for dynamic device_node lifecyle

On 04/17/17 17:32, Tyrel Datwyler wrote: > This patch introduces event tracepoints for tracking a device_nodes > reference cycle as well as reconfig notifications generated in response > to node/property manipulations. > > With the recent upstreaming of the refcount API several device_node >

Re: [PATCH 1/9] mm/huge_memory: Use zap_deposited_table() more

On Wed, 12 Apr 2017, Oliver O'Halloran wrote: > Depending flags of the PMD being zapped there may or may not be a > deposited pgtable to be freed. In two of the three cases this is open > coded while the third uses the zap_deposited_table() helper. This patch > converts the others to use the

[patch V2 13/24] powerpc/powernv: Use stop_machine_cpuslocked()

set_subcores_per_core() holds get_online_cpus() while invoking stop_machine(). stop_machine() invokes get_online_cpus() as well. This is correct, but prevents the conversion of the hotplug locking to a percpu rwsem. Use stop_machine_cpuslocked() to avoid the nested call. Signed-off-by:

[patch V2 07/24] KVM/PPC/Book3S HV: Use cpuhp_setup_state_nocalls_cpuslocked()

From: Sebastian Andrzej Siewior kvmppc_alloc_host_rm_ops() holds get_online_cpus() while invoking cpuhp_setup_state_nocalls(). cpuhp_setup_state_nocalls() invokes get_online_cpus() as well. This is correct, but prevents the conversion of the hotplug locking to a percpu

[PATCH][OPAL] cpu-features: add base and POWER8, POWER9 /cpus/ibm, powerpc-cpu-features dt

Since last time: - Added binding specification and design overview documentation. - Renamed the dt node to ibm,powerpc specific. - Moved dependency building pass into its own function. --- core/Makefile.inc | 2 +- core/cpufeatures.c

[PATCH 4/4] powerpc/64s: cpu-features: initial implementation

The /cpus/ibm,powerpc-cpu-features dt binding describes CPU features with ascii names and extensible compatibility, privilege, and enablement metadata that allows improved flexibility and compatibility with new hardware. Design overview and specification of features is available in the OPAL

[PATCH 3/4] of/fdt: introduce of_scan_flat_dt_subnodes and of_get_flat_dt_phandle

Introduce primitives for FDT parsing. These will be used for powerpc cpufeatures node scanning, which has quite complex structure but should be processed early. Cc: devicet...@vger.kernel.org Acked-by: Rob Herring Signed-off-by: Nicholas Piggin ---

[PATCH 2/4] powerpc/64s: POWER9 no LPCR VRMASD bits

POWER9/ISAv3 has no VRMASD field in LPCR. Don't set reserved bits. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/cpu_setup_power.S | 21 - 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/arch/powerpc/kernel/cpu_setup_power.S

[PATCH 1/4] powerpc/64s: Revert setting LPCR LPES0 on POWER9

The XIVE enablement patches set LPES0 on POWER9 host. This bit sets external interrupts to guest delivery mode that uses SRR[01]. The host's EE interrupt handler expects HSRR[01] (for earlier CPUs). which is fine because XIVE is configured not to deliver EE to the host (HVI is used instead) so

[PATCH 0/4 v2] cpufeatures merge candidate

I included binding documentation in OPAL, and wrote a design overview and implementation guideline document. Writing updated documentation lead to some small changes in the specification. Also a number of other small changes to Linux and OPAL. Thanks, Nick

Re: [PATCH v4 4/5] perf report: Show branch type statistics for stdio mode

On Wed, Apr 12, 2017 at 06:21:05AM +0800, Jin Yao wrote: SNIP > +static int hist_iter__branch_callback(struct hist_entry_iter *iter, > + struct addr_location *al __maybe_unused, > + bool single __maybe_unused, > +

Re: [PATCH v4 4/5] perf report: Show branch type statistics for stdio mode

On Wed, Apr 12, 2017 at 06:21:05AM +0800, Jin Yao wrote: SNIP > +const char *branch_type_name(int type) > +{ > + const char *branch_names[PERF_BR_MAX] = { > + "N/A", > + "JCC", > + "JMP", > + "IND_JMP", > + "CALL", > +

Re: [PATCH v4 5/5] perf report: Show branch type in callchain entry

On Wed, Apr 12, 2017 at 06:21:06AM +0800, Jin Yao wrote: SNIP > static int counts_str_build(char *bf, int bfsize, >u64 branch_count, u64 predicted_count, >u64 abort_count, u64 cycles_count, > - u64 iter_count, u64

Re: [PATCH v4 5/5] perf report: Show branch type in callchain entry

On Wed, Apr 12, 2017 at 06:21:06AM +0800, Jin Yao wrote: SNIP > +static int branch_type_str(struct branch_type_stat *stat, > +char *bf, int bfsize) > +{ > + int i, j = 0, printed = 0; > + u64 total = 0; > + > + for (i = 0; i < PERF_BR_MAX; i++) > +

[PATCH v7 4/10] powerpc/perf: Add generic IMC pmu groupand event functions

From: Hemant Kumar Device tree IMC driver code parses the IMC units and their events. It passes the information to IMC pmu code which is placed in powerpc/perf as "imc-pmu.c". Patch adds a set of generic imc pmu related event functions to be used by each imc pmu

[PATCH v7 07/10] powerpc/perf: PMU functions for Core IMC and hotplugging

From: Hemant Kumar This patch adds the PMU function to initialize a core IMC event. It also adds cpumask initialization function for core IMC PMU. For initialization, a 8KB of memory is allocated per core where the data for core IMC counters will be accumulated. The

[PATCH v7 10/10] powerpc/perf: Thread imc cpuhotplug support

This patch adds support for thread IMC on cpuhotplug. When a cpu goes offline, the LDBAR for that cpu is disabled, and when it comes back online the previous ldbar value is written back to the LDBAR for that cpu. To register the hotplug functions for thread_imc, a new state

[PATCH v7 06/10] powerpc/powernv: Core IMC events detection

From: Hemant Kumar This patch adds support for detection of core IMC events along with the Nest IMC events. It adds a new domain IMC_DOMAIN_CORE and its determined with the help of the compatibility string "ibm,imc-counters-core" based on the IMC device tree.

[PATCH v7 02/10] powerpc/powernv: Autoload IMC device driver module

This patch does three things : - Enables "opal.c" to create a platform device for the IMC interface according to the appropriate compatibility string. - Find the reserved-memory region details from the system device tree and get the base address of HOMER (Reserved memory) region address

[PATCH v7 03/10] powerpc/powernv: Detect supported IMC units and its events

Parse device tree to detect IMC units. Traverse through each IMC unit node to find supported events and corresponding unit/scale files (if any). Here is the DTS file for reference: https://github.com/open-power/ima-catalog/blob/master/81E00612.4E0100.dts The device tree for IMC

[PATCH v7 9/10] powerpc/perf: Thread IMC PMU functions

This patch adds the PMU functions required for event initialization, read, update, add, del etc. for thread IMC PMU. Thread IMC PMUs are used for per-task monitoring. For each CPU, a page of memory is allocated and is kept static i.e., these pages will exist till the machine shuts down. The base

[PATCH v7 8/10] powerpc/powernv: Thread IMC events detection

Patch adds support for detection of thread IMC events. It adds a new domain IMC_DOMAIN_THREAD and it is determined with the help of the compatibility string "ibm,imc-counters-thread" based on the IMC device tree. Signed-off-by: Anju T Sudhakar Signed-off-by: Hemant Kumar

[PATCH v7 05/10] powerpc/perf: IMC pmu cpumask and cpuhotplug support

Adds cpumask attribute to be used by each IMC pmu. Only one cpu (any online CPU) from each chip for nest PMUs is designated to read counters. On CPU hotplug, dying CPU is checked to see whether it is one of the designated cpus, if yes, next online cpu from the same chip (for nest units) is

[PATCH v7 01/10] powerpc/powernv: Data structure and macros definitions for IMC

From: Hemant Kumar Create a new header file to add the data structures and macros needed for In-Memory Collection (IMC) counter support. Signed-off-by: Anju T Sudhakar Signed-off-by: Hemant Kumar Signed-off-by:

[PATCH v7 00/10] IMC Instrumentation Support

Power9 has In-Memory-Collection (IMC) infrastructure which contains various Performance Monitoring Units (PMUs) at Nest level (these are on-chip but off-core), Core level and Thread level. The Nest PMU counters are handled by a Nest IMC microcode which runs in the OCC (On-Chip Controller)

Re: [PATCH] of: introduce event tracepoints for dynamic device_node lifecyle

On Mon, Apr 17, 2017 at 7:32 PM, Tyrel Datwyler wrote: > This patch introduces event tracepoints for tracking a device_nodes > reference cycle as well as reconfig notifications generated in response > to node/property manipulations. > > With the recent upstreaming of

[PATCH v2] powerpc/book3s: mce: Move add_taint() later in virtual mode.

From: Mahesh Salgaonkar machine_check_early() gets called in real mode. The very first time when add_taint() is called, it prints a warning which ends up calling opal call (that uses OPAL_CALL wrapper) for writing it to console. If we get a very first machine check

Re: [PATCH v2 1/2] fadump: reduce memory consumption for capture kernel

On Mon, 17 Apr 2017 20:43:02 +0530 Hari Bathini wrote: > On Friday 14 April 2017 01:28 AM, Michal Suchánek wrote: > > On Thu, 13 Apr 2017 01:59:13 +0530 > > Hari Bathini wrote: > > > >> On Friday 07 April 2017 07:16 PM, Michael

Re: [PATCH v11 4/7] powerpc/powernv: Override pcibios_default_alignment() to force PCI devices to be page aligned

On Mon, Apr 17, 2017 at 4:36 PM, Bjorn Helgaas wrote: > From: Yongji Xie > > This overrides pcibios_default_alignment() to set default alignment > to PAGE_SIZE for all PCI devices on PowerNV platform. Thus sub-page > BARs would not share a page and could

RE: [PATCH v2 1/5] kprobes: convert kprobe_lookup_name() to a function

From: Naveen N. Rao > Sent: 12 April 2017 11:58 ... > +kprobe_opcode_t *kprobe_lookup_name(const char *name) > +{ ... > + char dot_name[MODULE_NAME_LEN + 1 + KSYM_NAME_LEN]; > + const char *modsym; > + bool dot_appended = false; > + if ((modsym = strchr(name, ':')) != NULL) { > +

Re: powerpc/64: Fix HMI exception on LE with CONFIG_RELOCATABLE=y

On Tue, 2017-04-18 at 05:04:46 UTC, Michael Ellerman wrote: > Prior to commit 2337d207288f ("powerpc/64: CONFIG_RELOCATABLE support for hmi > interrupts"), the branch from hmi_exception_early() to > hmi_exception_realmode() > was just a bl hmi_exception_realmode, which the linker would turn into

Re: [v2] ppc64/kprobe: Fix oops when kprobed on 'stdu' instruction

On Tue, 2017-04-11 at 05:08:13 UTC, Ravi Bangoria wrote: > If we set a kprobe on a 'stdu' instruction on powerpc64, we see a kernel > OOPS: > > [ 1275.165932] Bad kernel stack pointer cd93c840 at c0009868 > [ 1275.166378] Oops: Bad kernel stack pointer, sig: 6 [#1] > ... > GPR00:

Re: [PATCH] powerpc/32: Remove redundant test in transfer_to_handler()

Le 14/04/2017 à 15:31, Christophe Leroy a écrit : As stated in the comment on top of transfer_to_handler(), all callers set cr0.eq if the exception occurred in kernel mode (i.e. MSR:PR = 0) Therefore, it is not needed to do the test again Indeed, all callers set cr0.eq as required

[PATCH] powerpc/xive: fix spelling mistake: "initialize"

From: Colin Ian King Trivial fix to spelling mistake in pr_info message. Signed-off-by: Colin Ian King --- arch/powerpc/sysdev/xive/common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

Re: [PATCH] powerpc/32: Fix protection of kernel RAM after freeing unused memory

Le 18/04/2017 à 08:40, Michael Ellerman a écrit : Christophe Leroy writes: diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c index a65c0b4c0669..d506bd61b629 100644 --- a/arch/powerpc/mm/pgtable_32.c +++ b/arch/powerpc/mm/pgtable_32.c @@

[PATCH V2] powerpc/mm: Update mm context addr limit correctly.

We added the addr < TASK_SIZE check to avoid updating addr_limit unnecessarily and also to avoid calling slice_flush_segments on all the cpus. This had the side effect of having different behaviour when using an addr value above TASK_SIZE before updating addr_limit and after updating addr_limit

[PATCH] powerpc/32: Move entry_32 functions just after HEAD functions.

By default, PPC8xx PINs an ITLB on the first 8M of memory in order to avoid any ITLB miss on kernel code. However, with some debug functions like DEBUG_PAGEALLOC and (soon to come) DEBUG_RODATA, the PINned TLB is invalidated soon after startup so ITLB missed start to happen also on the kernel

Re: [PATCH 1/2] powerpc: string: implement optimized memset variants

Michael Ellerman writes: > "Naveen N. Rao" writes: >> (generic) is with Matt's arch-independent patches applied. Profiling >> indicates that most of the overhead is actually with the lzo >> decompression... >> >> Also, with a simple module

Re: [PATCH] powerpc/32: Fix protection of kernel RAM after freeing unused memory

Christophe Leroy writes: > diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c > index 9ee536ec0739..e95931c4e6cf 100644 > --- a/arch/powerpc/mm/mem.c > +++ b/arch/powerpc/mm/mem.c > @@ -401,6 +401,9 @@ void free_initmem(void) > { > ppc_md.progress =

Re: [PATCH v2] cxl: Enable PCI device IDs for future IBM CXL adapters

"Matthew R. Ochs" writes: >> On Mar 24, 2017, at 11:03 AM, Matthew R. Ochs >> wrote: >> >> Add support for future IBM Coherent Accelerator (CXL) devices >> with an IDs of 0x0623 and 0x0628. >> >> Signed-off-by: Matthew R. Ochs

[PATCH v2] powerpc/mm: Fix page table dump build on PPC32

On PPC32 (ex: mpc885_ads_defconfig), page table dump compilation fails as follows. This is because the memory layout is slightly different on PPC32. This patch adapts it. CC arch/powerpc/mm/dump_linuxpagetables.o arch/powerpc/mm/dump_linuxpagetables.c: In function 'walk_pagetables':

[PATCH] powerpc/mm: Rename table dump file name

Page table dump debugfs file is named 'kernel_page_tables' on all other architectures implementing it, while is is named 'kernel_pagetables' on powerpc. This patch renames it. Signed-off-by: Christophe Leroy --- arch/powerpc/mm/dump_linuxpagetables.c | 2 +- 1 file