HMM driver for KVM PPC to manage page transitions of
secure guest via H_SVM_PAGE_IN and H_SVM_PAGE_OUT hcalls.
H_SVM_PAGE_IN: Move the content of a normal page to secure page
H_SVM_PAGE_OUT: Move the content of a secure page to normal page
Signed-off-by: Bharata B Rao
---
Register the new memslot with UV during plug and unregister
the memslot during unplug.
This needs addition of kvm_mr_change argument to
kvm_ops->commit_memory_region()
Signed-off-by: Bharata B Rao
---
arch/powerpc/include/asm/kvm_ppc.h | 6 --
arch/powerpc/include/asm/ucall-api.h | 5
H_SVM_INIT_START: Initiate securing a VM
H_SVM_INIT_DONE: Conclude securing a VM
During early guest init, these hcalls will be issued by UV.
As part of these hcalls, [un]register memslots with UV.
Signed-off-by: Bharata B Rao
---
arch/powerpc/include/asm/hvcall.h| 2 ++
A secure guest will share some of its pages with hypervisor (Eg. virtio
bounce buffers etc). Support shared pages in HMM driver.
Signed-off-by: Bharata B Rao
---
arch/powerpc/include/asm/hvcall.h | 3 ++
arch/powerpc/kvm/book3s_hv_hmm.c | 58 +--
2 files changed,
Hi,
A pseries guest can be run as a secure guest on Ultravisor-enabled
POWER platforms. On such platforms, this driver will be used to manage
the movement of guest pages between the normal memory managed by
hypervisor (HV) and secure memory managed by Ultravisor (UV).
This is an early post of
On 20-11-18, 11:05, Yangtao Li wrote:
> The of_find_node_by_path() returns a node pointer with refcount
> incremented,but there is the lack of use of the of_node_put() when
> done.Add the missing of_node_put() to release the refcount.
>
> Signed-off-by: Yangtao Li
> ---
> Changes in v2
> -update
On 20-11-18, 07:54, Yangtao Li wrote:
> use of_node_put to release the refcount of node.
>
> Signed-off-by: Yangtao Li
> ---
> drivers/cpufreq/pmac64-cpufreq.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/cpufreq/pmac64-cpufreq.c
> b/drivers/cpufreq/pmac64-cpufreq.c
>
Commit 14c63f17b1fde ("perf: Drop sample rate when sampling is too
slow") introduced a way to throttle PMU interrupts if we're spending
too much time just processing those. Wire up powerpc PMI handler to
use this infrastructure.
We have throttling of the *rate* of interrupts, but this adds
On Wed, 2018-11-07 at 16:56 +, Christophe Leroy wrote:
> This patch implements a framework for Kernel Userspace Access
> Protection.
>
> Then subarches will have to possibility to provide their own
> implementation
> by providing setup_kuap(), and lock/unlock_user_rd/wr_access
>
> We
Hi Scott,
Any comments on this patch set?
BR,
Andy
> -Original Message-
> From: Yuantian Tang
> Sent: 2018年10月31日 14:58
> To: o...@buserror.net
> Cc: mturque...@baylibre.com; sb...@kernel.org; robh...@kernel.org;
> mark.rutl...@arm.com; b...@kernel.crashing.org; pau...@samba.org;
>
This argument is required to extend the generic ptrace API
with PTRACE_GET_SYSCALL_INFO request: syscall_get_arch() is going to be
called from ptrace_request() along with other syscall_get_* functions
with a tracee as their argument.
This change partially reverts commit 5e937a9ae913
On 11/20/2018 04:08 PM, Sinan Kaya wrote:
> One version is:
> "if HEST table is present, ignore _OSC"
> or
> Another version is:
> "if HEST table is present, make sure that FW sets _OSC bit for AER to
> false. Otherwise, warn like crazy that this BIOS is broken and needs
> an update and can cause
On 11/20/2018 04:28 PM, Sinan Kaya wrote:
On 11/20/2018 4:42 PM, Keith Busch wrote:
How does that work? If the OS takes control, it sets up MSIs that FW
don't
react to, and disables system errors through PCIe Root Control. Aren't
those sys errs the mechanism FW knows it has something to do,
On 11/20/2018 4:42 PM, Keith Busch wrote:
How does that work? If the OS takes control, it sets up MSIs that FW don't
react to, and disables system errors through PCIe Root Control. Aren't
those sys errs the mechanism FW knows it has something to do, which
means the OS can effectively fence it
On 11/20/2018 4:46 PM, alex_gagn...@dellteam.com wrote:
Now, let's assume, for the sake of argument, that the firmware on those
system's is broken, and it didn't intend to give the OS control of AER.
OSPM checking HEST instead of _OSC is still wrong, according to the
spec. Two wrongs don't make
On 11/20/2018 03:02 PM, Sinan Kaya wrote:
> On 11/20/2018 3:44 PM, alex_gagn...@dellteam.com wrote:
>> I'd prefer "sure" instead of "think". "I think it breaks some system I'm
>> not telling you about" doesn't help much in figuring out how not to
>> break said system(s).:)
>
> Sorry, I thought I
On Tue, Nov 20, 2018 at 04:02:21PM -0500, Sinan Kaya wrote:
> On 11/20/2018 3:44 PM, alex_gagn...@dellteam.com wrote:
> > I'd prefer "sure" instead of "think". "I think it breaks some system I'm
> > not telling you about" doesn't help much in figuring out how not to
> > break said system(s).:)
>
On 11/20/2018 3:44 PM, alex_gagn...@dellteam.com wrote:
I'd prefer "sure" instead of "think". "I think it breaks some system I'm
not telling you about" doesn't help much in figuring out how not to
break said system(s).:)
Sorry, I thought I mentioned why it would break but let me repeat.
The
On 11/19/2018 07:54 PM, Sinan Kaya wrote:
> On 11/19/2018 6:49 PM, alex_gagn...@dellteam.com wrote:
>> On 11/19/2018 02:33 PM, Sinan Kaya wrote:
>>> However; table assumes governance about for which entities firmware first
>>> should be enabled. There is no cross reference to _OSC or permission
On Tue, Nov 20, 2018 at 10:45:19AM -0800, Nick Desaulniers wrote:
> On Tue, Nov 20, 2018 at 10:20 AM Segher Boessenkool
> wrote:
> > > Segher, which tree contains the One True Upstream for longlong.h?
> >
> > You should probably get your updates from the same place as was used to
> > get the file
On Tue, Nov 20, 2018 at 09:45:33AM +1030, Joel Stanley wrote:
> On Tue, 20 Nov 2018 at 05:24, Nick Desaulniers
> wrote:
> > >
> > > The only functional change I noticed was this in udiv_qrnnd.
> > >
> > > __r1 = (n1) % __d1;
> > > __q1 = (n1) / __d1;
> > >
> > > Becomes this:
> > >
> > >
On Fri, Nov 10, 2017 at 11:48:44AM +0800, Bao Xiaowei wrote:
> Depend on http://patchwork.ozlabs.org/patch/815382/
>
> Bao Xiaowei (3):
> ARMv8: dts: ls1046a: add the property of IB and OB
> ARMv8: layerscape: add the pcie ep function support
> ARMv8: pcie: make the DWC EP driver support
The of_find_node_by_path() returns a node pointer with refcount
incremented,but there is the lack of use of the of_node_put() when
done.Add the missing of_node_put() to release the refcount.
Signed-off-by: Yangtao Li
---
Changes in v2
-update changelog
---
drivers/cpufreq/powernv-cpufreq.c | 17
On Tue, Nov 20, 2018 at 1:57 PM Yangtao Li wrote:
>
> use of_node_put() to release the refcount.
Again, this changelog is as good as no changelog at all.
If you are adding a missing of_node_put(), please say that and explain
why it is necessary.
Thanks,
Rafael
Fix a spelling mistake in a register description.
Signed-off-by: Alexandre Belloni
---
arch/powerpc/sysdev/fsl_rio.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/sysdev/fsl_rio.h b/arch/powerpc/sysdev/fsl_rio.h
index 12dd18fd4795..6c13d9a7b7b2 100644
---
On Tue, Nov 20, 2018 at 10:31:36PM +1100, Michael Ellerman wrote:
> Andrew Murray writes:
>
> > Update design.txt to reflect the presence of the exclude_host
> > and exclude_guest perf flags.
> >
> > Signed-off-by: Andrew Murray
> > ---
> > tools/perf/design.txt | 4
> > 1 file changed, 4
use of_node_put() to release the refcount.
Signed-off-by: Yangtao Li
---
drivers/ide/pmac.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/ide/pmac.c b/drivers/ide/pmac.c
index c5b902b86b44..203ed4adc04a 100644
--- a/drivers/ide/pmac.c
+++ b/drivers/ide/pmac.c
@@ -920,6 +920,7 @@
use of_node_put() to release the refcount.
Signed-off-by: Yangtao Li
---
drivers/cpufreq/powernv-cpufreq.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/cpufreq/powernv-cpufreq.c
b/drivers/cpufreq/powernv-cpufreq.c
index
use of_node_put to release the refcount of node.
Signed-off-by: Yangtao Li
---
drivers/cpufreq/pmac64-cpufreq.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/cpufreq/pmac64-cpufreq.c b/drivers/cpufreq/pmac64-cpufreq.c
index be623dd7b9f2..1d32a863332d 100644
---
Andrew Murray writes:
> Update design.txt to reflect the presence of the exclude_host
> and exclude_guest perf flags.
>
> Signed-off-by: Andrew Murray
> ---
> tools/perf/design.txt | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/tools/perf/design.txt b/tools/perf/design.txt
>
Andrew Murray writes:
> Add a macro that tests if any of the perf event exclusion flags
> are set on a given event.
>
> Signed-off-by: Andrew Murray
> ---
> include/linux/perf_event.h | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --git a/include/linux/perf_event.h
Andrew Murray writes:
> Replace checking of perf event exclusion flags with perf macro.
>
> Signed-off-by: Andrew Murray
> ---
> arch/powerpc/perf/hv-24x7.c | 7 +--
> arch/powerpc/perf/hv-gpci.c | 7 +--
> arch/powerpc/perf/imc-pmu.c | 14 ++
> 3 files changed, 4
Russell Currey writes:
> On Tue, 2018-11-20 at 17:55 +1100, Alexey Kardashevskiy wrote:
>>
>> On 20/11/2018 14:51, Sam Bobroff wrote:
>> > On Tue, Nov 20, 2018 at 01:51:06PM +1100, Michael Ellerman wrote:
>> > > Alexey Kardashevskiy writes:
>> > >
>> > > > The current implementation of the
Hi Breno,
Thanks for chasing this one down.
Breno Leitao writes:
> On a signal handler return, the user could set a context with MSR[TS] bits
> set, and these bits would be copied to task regs->msr.
>
> At restore_tm_sigcontexts(), after current task regs->msr[TS] bits are set,
> several
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