"Gautham R. Shenoy" writes:
> This is the v2 of the fix to change the default behaviour of
> cede_offline.
OK, but why keep the cede offline behavior at all? Can we remove it? I
think doing so would allow us to remove all the code that temporarily
onlines threads for partition migration.
On Wed, Oct 23, 2019 at 9:32 AM Russell King - ARM Linux admin
wrote:
>
> On Wed, Oct 23, 2019 at 08:52:33AM -0500, Rob Herring wrote:
> > > I think this should have been done the other way around and default to
> > > coherent since most traditional OF platforms are coherent, and you
> > > can't
On Fri, Oct 25, 2019 at 03:13:22PM +0800, Shengjiu Wang wrote:
> The output divider should align with the output sample
> rate, if use ideal sample rate, there will be a lot of overload,
> which would cause underrun.
>
> The maximum divider of asrc clock is 1024, but there is no
> judgement for
On Fri, Oct 25, 2019 at 03:13:53PM +0800, Shengjiu Wang wrote:
> xrun may happen at the end of stream, the
> trigger->fsl_esai_trigger_stop maybe called in the middle of
> fsl_esai_hw_reset, this may cause esai in wrong state
> after stop, and there may be endless xrun interrupt.
>
> This issue
On Fri, Oct 25, 2019 at 08:10:36AM +0200, Michal Simek wrote:
> Hi,
>
> these two patches come from discussion with Christoph, Bjorn, Palmer and
> Waiman. The first patch was suggestion by Christoph here
> https://lore.kernel.org/linux-riscv/20191008154604.ga7...@infradead.org/
> The second part
On 10/25/2019 10:02 AM, Nayna Jain wrote:
>> Is there any way to not use conditional compilation in
>> the above array definition? Maybe define different functions to get
>> "secure_rules" for when CONFIG_MODULE_SIG_FORCE is defined and when
>> it is not defined.
>
> How will you decide which
On 10/24/19 12:48 PM, Lakshmi Ramasubramanian wrote:
On 10/23/2019 8:47 PM, Nayna Jain wrote:
+/*
+ * ima_check_blacklist - determine if the binary is blacklisted.
+ *
+ * Add the hash of the blacklisted binary to the measurement list,
based
+ * on policy.
+ *
+ * Returns -EPERM if the
On 10/25/2019 10:24 AM, Nayna Jain wrote:
On 10/24/19 10:20 AM, Lakshmi Ramasubramanian wrote:
On 10/23/19 8:47 PM, Nayna Jain wrote:
Hi Nayna,
+void process_buffer_measurement(const void *buf, int size,
+ const char *eventname, enum ima_hooks func,
+ int
On 10/24/19 10:20 AM, Lakshmi Ramasubramanian wrote:
On 10/23/19 8:47 PM, Nayna Jain wrote:
Hi Nayna,
+void process_buffer_measurement(const void *buf, int size,
+ const char *eventname, enum ima_hooks func,
+ int pcr)
{
int ret = 0;
struct
On 10/24/19 12:35 PM, Lakshmi Ramasubramanian wrote:
On 10/23/2019 8:47 PM, Nayna Jain wrote:
+/*
+ * The "secure_rules" are enabled only on "secureboot" enabled systems.
+ * These rules verify the file signatures against known good values.
+ * The "appraise_type=imasig|modsig" option allows
On 10/24/19 12:26 PM, Lakshmi Ramasubramanian wrote:
On 10/23/2019 8:47 PM, Nayna Jain wrote:
This patch defines a function to detect the secure boot state of a
PowerNV system.
+bool is_ppc_secureboot_enabled(void)
+{
+ struct device_node *node;
+ bool enabled = false;
+
+ node =
On 10/24/19 12:38 PM, Lakshmi Ramasubramanian wrote:
On 10/23/2019 8:47 PM, Nayna Jain wrote:
+bool is_ppc_trustedboot_enabled(void)
+{
+ struct device_node *node;
+ bool enabled = false;
+
+ node = get_ppc_fw_sb_node();
+ enabled = of_property_read_bool(node, "trusted-enabled");
On Fri, Oct 25, 2019 at 04:33:13PM +0200, Carlo Pisani wrote:
> pci_bus :00: root bus resource [mem 0x5000-0x5fff]
> pci_bus :00: root bus resource [io 0x1880-0x188f]
> pci_bus :00: root bus resource [??? 0x flags 0x0]
> pci_bus :00: No busn resource found
On 10/24/19 5:58 PM, Nayna Jain wrote:
+
+/*
+ * Get a certificate list blob from the named secure variable.
+ */
+static __init void *get_cert_list(u8 *key, unsigned long keylen, uint64_t
*size)
+{
+ int rc;
+ void *db;
+
+ rc = secvar_ops->get(key, keylen, NULL, size);
+
On 10/24/19 5:47 PM, Nayna Jain wrote:
+static ssize_t size_show(struct kobject *kobj, struct kobj_attribute *attr,
+char *buf)
+{
+ uint64_t dsize;
+ int rc;
+
+ rc = secvar_ops->get(kobj->name, strlen(kobj->name) + 1, NULL, );
+ if (rc) {
+
On 10/24/19 5:47 PM, Nayna Jain wrote:
diff --git a/arch/powerpc/include/asm/opal-api.h
b/arch/powerpc/include/asm/opal-api.h
index 378e3997845a..c1f25a760eb1 100644
--- a/arch/powerpc/include/asm/opal-api.h
+++ b/arch/powerpc/include/asm/opal-api.h
@@ -211,7 +211,10 @@
#define
On Mon, Oct 21, 2019 at 04:51:45PM +0200, Geert Uytterhoeven wrote:
> Variables of type atomic{,64}_t can be used fine with
> debugfs_create_u{32,64}, when passing a pointer to the embedded counter.
> This allows to get rid of the casts, which prevented compiler checks.
>
> Signed-off-by: Geert
On Mon, Oct 14, 2019 at 07:45:14PM -0700, Eric Biggers wrote:
> This series converts the glue code for the PowerPC SPE implementations
> of AES-ECB, AES-CBC, AES-CTR, and AES-XTS from the deprecated
> "blkcipher" API to the "skcipher" API. This is needed in order for the
> blkcipher API to be
On Wed, Oct 16, 2019 at 06:46:08PM +0800, YueHaibing wrote:
> devm_platform_ioremap_resource() internally have platform_get_resource()
> and devm_ioremap_resource() in it. So instead of calling them separately
> use devm_platform_ioremap_resource() directly.
>
> YueHaibing (13):
> hwrng: atmel
pci_bus :00: root bus resource [mem 0x5000-0x5fff]
pci_bus :00: root bus resource [io 0x1880-0x188f]
pci_bus :00: root bus resource [??? 0x flags 0x0]
pci_bus :00: No busn resource found for root bus, will use [bus 00-ff]
pci :00:00.0: [Firmware Bug]:
From: Daniel Axtens
[ Upstream commit 934bda59f286d0221f1a3ebab7f5156a996cc37d ]
While developing KASAN for 64-bit book3s, I hit the following stack
over-read.
It occurs because the hypercall to put characters onto the terminal
takes 2 longs (128 bits/16 bytes) of characters at a time, and so
From: Daniel Axtens
[ Upstream commit 934bda59f286d0221f1a3ebab7f5156a996cc37d ]
While developing KASAN for 64-bit book3s, I hit the following stack
over-read.
It occurs because the hypercall to put characters onto the terminal
takes 2 longs (128 bits/16 bytes) of characters at a time, and so
From: Daniel Axtens
[ Upstream commit 934bda59f286d0221f1a3ebab7f5156a996cc37d ]
While developing KASAN for 64-bit book3s, I hit the following stack
over-read.
It occurs because the hypercall to put characters onto the terminal
takes 2 longs (128 bits/16 bytes) of characters at a time, and so
From: Daniel Axtens
[ Upstream commit 934bda59f286d0221f1a3ebab7f5156a996cc37d ]
While developing KASAN for 64-bit book3s, I hit the following stack
over-read.
It occurs because the hypercall to put characters onto the terminal
takes 2 longs (128 bits/16 bytes) of characters at a time, and so
From: Alexey Kardashevskiy
[ Upstream commit 3309bec85e60d60d6394802cb8e183a4f4a72def ]
The trace_hardirqs_on() sets current->hardirqs_enabled and from here
the lockdep assumes interrupts are enabled although they are remain
disabled until the context switches to the guest. Consequent
asm/cpm.h only exists on PPC, so this prevents use of this header on
other platforms. Drivers that need asm/cpm.h (and are thus inherently
PPC-specific) must include that explicitly.
Signed-off-by: Rasmus Villemoes
---
include/soc/fsl/qe/qe.h | 1 -
1 file changed, 1 deletion(-)
diff --git
The core QE code now also builds for ARM, so replace the FSL_SOC &&
PPC32 dependencies by the more lax requirements OF && HAS_IOMEM.
Signed-off-by: Rasmus Villemoes
---
drivers/soc/fsl/qe/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/fsl/qe/Kconfig
This driver uses #defines from asm/cpm.h, so instead of relying on
some other header pulling that in, do that explicitly.
Signed-off-by: Rasmus Villemoes
---
drivers/tty/serial/ucc_uart.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/tty/serial/ucc_uart.c
Currently SERIAL_QE depends on QUICC_ENGINE, which in turn depends on
PPC32, so this doesn't add any extra dependency. However, the QUICC
Engine IP block also exists on some arm boards, so this serves as
preparation for removing the PPC32 dependency from QUICC_ENGINE and
build the QE support in
Currently, QUICC_ENGINE depends on PPC32, so this in itself does not
change anything. In order to allow removing the PPC32 dependency from
QUICC_ENGINE and avoid allmodconfig build failures, add this explicit
dependency.
Signed-off-by: Rasmus Villemoes
---
drivers/net/ethernet/freescale/Kconfig
Now that the references from arch/powerpc/ are gone, these are only
referenced from inside qe_ic.c, so make them static.
Signed-off-by: Rasmus Villemoes
---
drivers/soc/fsl/qe/qe_ic.c | 6 +++---
include/soc/fsl/qe/qe_ic.h | 4
2 files changed, 3 insertions(+), 7 deletions(-)
diff --git
There are no current callers of these functions, and they use the
ppc-specific virq_to_hw(). So removing them gets us one step closer to
building QE support for ARM.
If the functionality is ever actually needed, the code can be dug out
of git and then adapted to work on all architectures, but for
Since commit 302c059f2e7b (QE: use subsys_initcall to init qe),
mpc85xx_qe_init() has done nothing apart from possibly emitting a
pr_err(). As part of reducing the amount of QE-related code in
arch/powerpc/ (and eventually support QE on other architectures),
remove this low-hanging fruit.
This is now exactly the same as mpc83xx_ipic_init_IRQ, so just use
that directly.
Signed-off-by: Rasmus Villemoes
---
arch/powerpc/platforms/83xx/km83xx.c | 2 +-
arch/powerpc/platforms/83xx/misc.c| 7 ---
arch/powerpc/platforms/83xx/mpc832x_mds.c | 2 +-
The qe_ic_cascade_{low,high}_mpic functions are now used as handlers
both when the interrupt parent is mpic as well as ipic, so remove the
_mpic suffix.
Signed-off-by: Rasmus Villemoes
---
arch/powerpc/platforms/83xx/misc.c| 2 +-
arch/powerpc/platforms/85xx/corenet_generic.c | 4
Having to call qe_ic_init() from platform-specific code makes it
awkward to allow building the QE drivers for ARM. It's also a needless
duplication of code, and slightly error-prone: Instead of the caller
needing to know the details of whether the QUICC Engine High and QUICC
Engine Low are
There's no point in registering with sysfs when that doesn't actually
allow any interaction with the device or driver (no uevents, no sysfs
files that provide information or allow configuration, no nothing).
Signed-off-by: Rasmus Villemoes
---
drivers/soc/fsl/qe/qe_ic.c | 31
high_active is only assigned to but never used. Remove it.
Signed-off-by: Rasmus Villemoes
---
drivers/soc/fsl/qe/qe_ic.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/soc/fsl/qe/qe_ic.c b/drivers/soc/fsl/qe/qe_ic.c
index f3659c312e13..61a40e40f3ae 100644
---
The *_ipic and *_mpic handlers are almost identical - the only
difference is that the latter end with an unconditional
chip->irq_eoi() call. Since IPIC does not have ->irq_eoi, we can
reduce some code duplication by calling irq_eoi conditionally.
This is similar to what is already done in
These functions are only ever called through a function pointer, and
therefore it makes no sense for them to be "static inline" - gcc has
no choice but to emit a copy in each translation unit that takes the
address of one of these (currently various platform code under
arch/powerpc/). So move them
These includes are not actually needed, and asm/rheap.h and
sysdev/fsl_soc.h are PPC-specific, hence prevent compiling QE for
other architectures.
Signed-off-by: Rasmus Villemoes
---
drivers/soc/fsl/qe/qe.c| 5 -
drivers/soc/fsl/qe/qe_io.c | 2 --
2 files changed, 7 deletions(-)
diff
The local qe_ic.h header is only used by qe_ic.c, so merge its
contents into the .c file. This is preparation for moving the driver
to drivers/irqchip/. It also avoids confusion between this header and
the one at include/soc/fsl/qe/qe_ic.h, which is included from a number
of places (qe_ic.c among
This is consistent with normal kernel coding style and the style used
in the struct definition above this one.
Signed-off-by: Rasmus Villemoes
---
drivers/soc/fsl/qe/qe_ic.h | 19 ++-
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/soc/fsl/qe/qe_ic.h
Commit e5c5c8d23fef (soc/fsl/qe: only apply QE_General4 workaround on
affected SoCs) introduced use of pvr_version_is(), saying
The QE_General4 workaround is only valid for the MPC832x and MPC836x
SoCs. The other SoCs that embed a QUICC engine are not affected by this
hardware bug and
In preparation for allowing to build QE support for architectures
other than PPC, replace the ppc-specific io accessors. Done via
$ spatch --sp-file io.cocci --in-place drivers/soc/fsl/qe/
where io.cocci is
@@
expression addr, val;
@@
- out_be32(addr, val)
+ iowrite32be(val, addr)
@@
In preparation for allowing QE to be built for architectures other
than ppc, use the generic readx_poll_timeout_atomic() helper from
iopoll.h rather than the ppc-only spin_event_timeout().
Signed-off-by: Rasmus Villemoes
---
drivers/soc/fsl/qe/qe.c | 13 +++--
1 file changed, 7
The actual io accessors (e.g. in_be32) implicitly add a volatile
qualifier to their address argument. Remove volatile from the struct
definition and the qe_ic_(read/write) helpers, in preparation for
switching from the ppc-specific io accessors to generic ones.
Signed-off-by: Rasmus Villemoes
Signed-off-by: Rasmus Villemoes
---
drivers/soc/fsl/qe/qe.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c
index 417df7e19281..2a0e6e642776 100644
--- a/drivers/soc/fsl/qe/qe.c
+++ b/drivers/soc/fsl/qe/qe.c
@@ -378,8
There have been several attempts in the past few years to allow
building the QUICC engine drivers for platforms other than PPC. This
is yet another attempt.
In v2, I've fixed a few style issues. But more importantly, it now
contains enough to actually remove the PPC32 dependency from
This wires up the close_range() syscall into all arches at once.
Suggested-by: Arnd Bergmann
Signed-off-by: Christian Brauner
Reviewed-by: Oleg Nesterov
Acked-by: Arnd Bergmann
Acked-by: Michael Ellerman (powerpc)
Cc: Jann Horn
Cc: David Howells
Cc: Dmitry V. Levin
Cc: Linus Torvalds
Cc:
Caching dates is never a good idea ;-)
Fixes: e7affb1dba0e9068 ("powerpc/cache: add cache flush operation for various
e500")
Signed-off-by: Geert Uytterhoeven
---
arch/powerpc/kernel/cpu_setup_fsl_booke.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Thiago Jung Bauermann writes:
> The ultravisor will do an integrity check of the kernel image but we
> relocated it so the check will fail. Restore the original image by
> relocating it back to the kernel virtual base address.
>
> This works because during build vmlinux is linked with an expected
On 10/25/2019 02:22 PM, Christophe Leroy wrote:
>
>
> Le 25/10/2019 à 10:24, Anshuman Khandual a écrit :
>>
>>
>> On 10/25/2019 12:41 PM, Christophe Leroy wrote:
>>>
>>>
>>> Le 25/10/2019 à 07:52, Qian Cai a écrit :
> On Oct 24, 2019, at 11:45 PM, Anshuman Khandual
>
From: Segher Boessenkool
> Sent: 24 October 2019 18:29
> On Thu, Oct 24, 2019 at 11:47:30AM +1100, Michael Ellerman wrote:
> > Some of our scripts are passed $objdump and then call it as
> > "$objdump". This doesn't work if it contains spaces because we're
> > using ccache, for example you get
Le 25/10/2019 à 10:24, Anshuman Khandual a écrit :
On 10/25/2019 12:41 PM, Christophe Leroy wrote:
Le 25/10/2019 à 07:52, Qian Cai a écrit :
On Oct 24, 2019, at 11:45 PM, Anshuman Khandual
wrote:
Nothing specific. But just tested this with x86 defconfig with relevant configs
which
On 10/25/2019 12:41 PM, Christophe Leroy wrote:
>
>
> Le 25/10/2019 à 07:52, Qian Cai a écrit :
>>
>>
>>> On Oct 24, 2019, at 11:45 PM, Anshuman Khandual
>>> wrote:
>>>
>>> Nothing specific. But just tested this with x86 defconfig with relevant
>>> configs
>>> which are required for this
https://bugzilla.kernel.org/show_bug.cgi?id=205303
A. Wilcox (awil...@adelielinux.org) changed:
What|Removed |Added
CC|
Hi Alastair,
On Fri, Oct 25, 2019 at 6:48 AM Alastair D'Silva wrote:
> From: Alastair D'Silva
>
> This series adds support for OpenCAPI SCM devices, exposing
> them as nvdimms so that we can make use of the existing
> infrastructure.
Thanks for your series!
The long CC list is a sign of
xrun may happen at the end of stream, the
trigger->fsl_esai_trigger_stop maybe called in the middle of
fsl_esai_hw_reset, this may cause esai in wrong state
after stop, and there may be endless xrun interrupt.
This issue may also happen with trigger->fsl_esai_trigger_start.
So Add spin lock to
The output divider should align with the output sample
rate, if use ideal sample rate, there will be a lot of overload,
which would cause underrun.
The maximum divider of asrc clock is 1024, but there is no
judgement for this limitaion in driver, which may cause the divider
setting not correct.
Le 25/10/2019 à 07:52, Qian Cai a écrit :
On Oct 24, 2019, at 11:45 PM, Anshuman Khandual
wrote:
Nothing specific. But just tested this with x86 defconfig with relevant configs
which are required for this test. Not sure if it involved W=1.
No, it will not. It needs to run like,
make
On Fri, Oct 25, 2019 at 05:33:17AM +, S.j. Wang wrote:
> > > > > + pair_err("The divider can't be used for non ideal
> > > > > mode\n");
> > > > > + return -EINVAL;
> > > > > + }
> > > > > +
> > > > > + /* Divider range is [1, 1024] */
> > > > > + div[IN] =
On 10/25/2019 11:22 AM, Qian Cai wrote:
>
>
>> On Oct 24, 2019, at 11:45 PM, Anshuman Khandual
>> wrote:
>>
>> Nothing specific. But just tested this with x86 defconfig with relevant
>> configs
>> which are required for this test. Not sure if it involved W=1.
>
> No, it will not. It needs
On 24. 10. 19 16:44, Masahiro Yamada wrote:
> On Thu, Oct 24, 2019 at 7:13 PM Michal Simek wrote:
>>
>> msi.h is generic for all architectures expect of x86 which has own version.
>
> Maybe a typo? "except"
unfortunately yes.
>
>
> Anyway, the code looks good to me.
>
> Reviewed-by:
Hi,
these two patches come from discussion with Christoph, Bjorn, Palmer and
Waiman. The first patch was suggestion by Christoph here
https://lore.kernel.org/linux-riscv/20191008154604.ga7...@infradead.org/
The second part was discussed
msi.h is generic for all architectures except of x86 which has own version.
Enabling MSI by including msi.h to architecture Kbuild is just additional
step which doesn't need to be done.
The patch was created based on request to enable MSI for Microblaze.
Suggested-by: Christoph Hellwig
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