Christoph Hellwig writes:
> Can you try this patch?
>
> ---
> From 1c9913360a0494375c5655b133899cb4323bceb4 Mon Sep 17 00:00:00 2001
> From: Christoph Hellwig
> Date: Tue, 9 Jun 2020 14:07:31 +0200
> Subject: scsi: wire up ata_scsi_dma_need_drain for SAS HBA drivers
>
> We need
Murilo Opsfelder Araújo writes:
> On Tue, Jun 09, 2020 at 03:28:31PM +1000, Michael Ellerman wrote:
>> On Thu, 21 May 2020 11:43:34 +1000, Alistair Popple wrote:
>> > This series brings together several previously posted patches required for
>> > POWER10 support and introduces a new patch
On 26/05/20 1:45 pm, Balamuruhan S wrote:
> Few ppc instructions are encoded in test_emulate_step.c, consolidate
> them and use it from ppc-opcode.h
>
> Signed-off-by: Balamuruhan S
> Acked-by: Naveen N. Rao
> Tested-by: Naveen N. Rao
> ---
> arch/powerpc/include/asm/ppc-opcode.h | 35
On 26/05/20 1:45 pm, Balamuruhan S wrote:
> move macro definitions of powerpc instructions from bpf_jit.h to ppc-opcode.h
> and adopt the users of the macros accordingly. `PPC_MR()` is defined twice in
> bpf_jit.h, remove the duplicate one.
>
> Signed-off-by: Balamuruhan S
> Acked-by: Naveen
On 26/05/20 1:45 pm, Balamuruhan S wrote:
> remove duplicate macro definitions from bpf_jit.h and reuse the macros from
> ppc-opcode.h
>
> Signed-off-by: Balamuruhan S
> Acked-by: Naveen N. Rao
> Tested-by: Naveen N. Rao
> ---
> arch/powerpc/net/bpf_jit.h| 18 +-
>
Satheesh Rajendran writes:
> Argument "align" in alloc_shared_lppaca() function was unused inside the
> function. Let's fix it and update code comment.
>
> Cc: linux-ker...@vger.kernel.org
> Cc: Thiago Jung Bauermann
> Cc: Ram Pai
> Cc: Sukadev Bhattiprolu
> Cc: Laurent Dufour
>
Satheesh Rajendran writes:
> Early secure guest boot hits the below crash while booting with
> vcpus numbers aligned with page boundary for PAGE size of 64k
> and LPPACA size of 1k i.e 64, 128 etc, due to the BUG_ON assert
> for shared_lppaca_total_size equal to shared_lppaca_size,
>
> [
On Wed, 3 Jun 2020 15:36:32 -0500, Tyrel Datwyler wrote:
> The adatper info MAD is used to send the client info and receive the
> host info as a response. A peristent buffer is used and as such the
> client info is overwritten after the response. During the course of
> a normal adapter reset the
Hello,
KVM-PR doesn't work anymore on my Nemo board [1]. I figured out that the
Git kernels and the kernel 5.7 are affected.
Error message: Fienix kernel: kvmppc_exit_pr_progint: emulation at 700
failed ()
I can boot virtual QEMU PowerPC machines with KVM-PR with the kernel 5.6
On Tue, Jun 9, 2020 at 10:54 AM Vaibhav Jain wrote:
>
> Thanks Dan for the consideration and taking time to look into this.
>
> My responses below:
>
> Dan Williams writes:
>
> > On Mon, Jun 8, 2020 at 5:16 PM kernel test robot wrote:
> >>
> >> Hi Vaibhav,
> >>
> >> Thank you for the patch!
Thanks Dan for the consideration and taking time to look into this.
My responses below:
Dan Williams writes:
> On Mon, Jun 8, 2020 at 5:16 PM kernel test robot wrote:
>>
>> Hi Vaibhav,
>>
>> Thank you for the patch! Perhaps something to improve:
>>
>> [auto build test WARNING on powerpc/next]
On Tue, Jun 09, 2020 at 03:28:31PM +1000, Michael Ellerman wrote:
> On Thu, 21 May 2020 11:43:34 +1000, Alistair Popple wrote:
> > This series brings together several previously posted patches required for
> > POWER10 support and introduces a new patch enabling POWER10 architected
> > mode to
/20200609-051451
base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: powerpc-randconfig-r031-20200608 (attached as .config)
compiler: clang version 11.0.0 (https://github.com/llvm/llvm-project
bc2b70982be8f5250cd0082a7190f8b417bd4dfe)
reproduce (this is a W=1 build
On Tue, Jun 09, 2020 at 10:29:57AM +, Will Springer wrote:
> On Saturday, May 30, 2020 3:56:47 PM PDT you wrote:
> > On Friday, May 29, 2020 12:24:27 PM PDT Rich Felker wrote:
> > > The argument passing for pread/pwrite is historically a mess and
> > > differs between archs. musl has a
Hi Christophe,
On Tue, 9 Jun 2020 17:24:14 +0200 Christophe Leroy
wrote:
>
> Le 09/06/2020 à 14:05, Joerg Roedel a écrit :
> > From: Joerg Roedel
> >
> > The functions are only used in two source files, so there is no need
> > for them to be in the global header. Move them to the new
> >
Can you try this patch?
---
>From 1c9913360a0494375c5655b133899cb4323bceb4 Mon Sep 17 00:00:00 2001
From: Christoph Hellwig
Date: Tue, 9 Jun 2020 14:07:31 +0200
Subject: scsi: wire up ata_scsi_dma_need_drain for SAS HBA drivers
We need ata_scsi_dma_need_drain for all drivers wired up to drive
Le 09/06/2020 à 14:05, Joerg Roedel a écrit :
From: Joerg Roedel
The functions are only used in two source files, so there is no need
for them to be in the global header. Move them to the new
header and include it only where needed.
Do you mean we will now create a new header file for
On Tue, Jun 09, 2020 at 02:05:33PM +0200, Joerg Roedel wrote:
> From: Joerg Roedel
>
> The functions are only used in two source files, so there is no need
> for them to be in the global header. Move them to the new
> header and include it only where needed.
>
> Signed-off-by: Joerg Roedel
I wouldn't normally go through spelling fixes, but I caught sight of
this typo twice, and then foolishly grepped the tree for it, and saw how
pervasive it was.
so here I am ... fixing a typo globally... but with an addition in
scripts/spelling.txt so it shouldn't re-appear ;-)
Cc:
The word 'descriptor' is misspelled throughout the tree.
Fix it up accordingly:
decriptors -> descriptors
Signed-off-by: Kieran Bingham
---
drivers/scsi/ibmvscsi/ibmvfc.c| 2 +-
drivers/scsi/ibmvscsi/ibmvscsi.c | 2 +-
drivers/scsi/qla2xxx/qla_inline.h | 2 +-
* Palmer Dabbelt:
> This patch set adds fchmodat4(), a new syscall. The actual
> implementation is super simple: essentially it's just the same as
> fchmodat(), but LOOKUP_FOLLOW is conditionally set based on the flags.
> I've attempted to make this match "man 2 fchmodat" as closely as
>
On Mon, Jun 08, 2020 at 03:07:00PM +0800, Shengjiu Wang wrote:
> The issue log is:
>
> [ 48.021506] CPU: 0 PID: 664 Comm: aplay Not tainted
> 5.7.0-rc1-13120-g12b434cbbea0 #343
> [ 48.031063] Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
> [ 48.037638] [] (unwind_backtrace)
Le 09/06/2020 à 12:57, Satheesh Rajendran a écrit :
Early secure guest boot hits the below crash while booting with
vcpus numbers aligned with page boundary for PAGE size of 64k
and LPPACA size of 1k i.e 64, 128 etc, due to the BUG_ON assert
for shared_lppaca_total_size equal to
From: Joerg Roedel
The functions are only used in two source files, so there is no need
for them to be in the global header. Move them to the new
header and include it only where needed.
Signed-off-by: Joerg Roedel
---
include/linux/mm.h| 45 ---
On Tue, Jun 09, 2020 at 08:00:35PM +1000, Michael Ellerman wrote:
> Hi all,
>
> I'm seeing crashes on powerpc with the ipr driver, which I'm fairly sure
> are due to dma_need_drain being NULL.
Ooops, my changes completely forgot about SAS attached ATAPI devices.
I'll cook up a fix in a bit.
Argument "align" in alloc_shared_lppaca() function was unused inside the
function. Let's fix it and update code comment.
Cc: linux-ker...@vger.kernel.org
Cc: Thiago Jung Bauermann
Cc: Ram Pai
Cc: Sukadev Bhattiprolu
Cc: Laurent Dufour
Signed-off-by: Satheesh Rajendran
---
Early secure guest boot hits the below crash while booting with
vcpus numbers aligned with page boundary for PAGE size of 64k
and LPPACA size of 1k i.e 64, 128 etc, due to the BUG_ON assert
for shared_lppaca_total_size equal to shared_lppaca_size,
[0.00] Partition configured for 64 cpus.
On Saturday, May 30, 2020 3:56:47 PM PDT you wrote:
> On Friday, May 29, 2020 12:24:27 PM PDT Rich Felker wrote:
> > The argument passing for pread/pwrite is historically a mess and
> > differs between archs. musl has a dedicated macro that archs can
> > define to override it. But it looks like it
On Tue, Jun 09, 2020 at 01:44:23PM +0530, Harish wrote:
> On systems with large number of cpus, test fails trying to set
> affinity by calling sched_setaffinity() with smaller size for
> affinity mask. This patch fixes it by making sure that the size of
> allocated affinity mask is dependent on
Hi all,
I'm seeing crashes on powerpc with the ipr driver, which I'm fairly sure
are due to dma_need_drain being NULL.
The backtrace is:
scsi_init_io+0x1d8/0x350
scsi_queue_rq+0x7a4/0xc30
blk_mq_dispatch_rq_list+0x1b0/0x910
blk_mq_sched_dispatch_requests+0x154/0x270
On 6/9/20 1:44 PM, Harish wrote:
> On systems with large number of cpus, test fails trying to set
> affinity by calling sched_setaffinity() with smaller size for
> affinity mask. This patch fixes it by making sure that the size of
> allocated affinity mask is dependent on the number of CPUs as
>
For mono channel, ssi will switch to normal mode. In normal
mode, the Word Length Control bits control the word length
divider in clock generator, which is different with I2S master
mode, the word length is fixed to 32bit.
So we refine the famula for mono channel, otherwise there
will be sound
On systems with large number of cpus, test fails trying to set
affinity by calling sched_setaffinity() with smaller size for
affinity mask. This patch fixes it by making sure that the size of
allocated affinity mask is dependent on the number of CPUs as
reported by get_nprocs().
Fixes:
The size of the CPU affinity mask must be large enough for
systems with a very large number of CPUs. Otherwise, tests
which try to determine the first online CPU by calling
sched_getaffinity() will fail. This makes sure that the size
of the allocated affinity mask is dependent on the number of
Le 09/06/2020 à 07:38, sathn...@linux.vent.ibm.com a écrit :
From: Satheesh Rajendran
Early secure guest boot hits the below crash while booting with
vcpus numbers aligned with page boundary for PAGE size of 64k
and LPPACA size of 1k i.e 64, 128 etc, due to the BUG_ON assert
for
On 6/9/20 9:10 AM, Harish wrote:
> On systems with large number of cpus, test fails trying to set
> affinity for child process by calling sched_setaffinity() with
> smaller size for cpuset. This patch fixes it by making sure that
> the size of allocated cpu set is dependent on the number of CPUs
For testing only at the moment, firmware does not define these bits.
---
arch/powerpc/include/asm/hvcall.h | 1 +
arch/powerpc/include/uapi/asm/kvm.h | 1 +
arch/powerpc/kvm/powerpc.c| 9 +++--
arch/powerpc/platforms/powernv/setup.c| 3 +++
If both count cache and link stack are to be flushed, and can be flushed
with the special bcctr, patch that in directly to the flush/branch nop
site.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/security_features.h | 2 ++
arch/powerpc/kernel/security.c | 27
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/ppc-opcode.h | 2 ++
arch/powerpc/kernel/entry_64.S| 6 ++
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/include/asm/ppc-opcode.h
b/arch/powerpc/include/asm/ppc-opcode.h
index
Branch cache flushing code patching has inter-dependencies on both the
link stack and the count cache flushing state.
To make the code clearer and to separate the link stack and count
cache handling, split the "toggle" (setting up variables and printing
enable/disable) from the code patching.
Make the count-cache and link-stack messages look the same
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/security.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/kernel/security.c b/arch/powerpc/kernel/security.c
index
Prepare to allow for hardware link stack flushing by using the
none/sw/hw type, same as the count cache state.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/security.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kernel/security.c
The count cache flush mostly refers to both count cache and link stack
flushing. As a first step to untangling these a bit, re-name the bits
that apply to both.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/asm-prototypes.h | 4 +--
arch/powerpc/kernel/entry_64.S| 7
This series allows the link stack to be flushed with the speical
bcctr 2,0,0 flush instruction that also flushes the count cache if
the processor supports it.
Firmware does not support this at the moment, but I've tested it in
simulator with a patched firmware to advertise support.
Thanks,
Nick
On Tue, Jun 09, 2020 at 09:10:05AM +0530, Harish wrote:
> On systems with large number of cpus, test fails trying to set
> affinity for child process by calling sched_setaffinity() with
> smaller size for cpuset. This patch fixes it by making sure that
> the size of allocated cpu set is dependent
On 08/06/20 8:12 pm, Sandipan Das wrote:
> The size of the cpu set must be large enough for systems
> with a very large number of CPUs. Otherwise, tests which
> try to determine the first online CPU by calling
> sched_getaffinity() will fail. This makes sure that the
> size of the allocated cpu
For testing only at the moment, firmware does not define these bits.
---
arch/powerpc/include/asm/hvcall.h | 1 +
arch/powerpc/include/uapi/asm/kvm.h | 1 +
arch/powerpc/kvm/powerpc.c| 9 +++--
arch/powerpc/platforms/powernv/setup.c| 3 +++
If both count cache and link stack are to be flushed, and can be flushed
with the special bcctr, patch that in directly to the flush/branch nop
site.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/security_features.h | 2 ++
arch/powerpc/kernel/security.c | 27
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/ppc-opcode.h | 2 ++
arch/powerpc/kernel/entry_64.S| 6 ++
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/include/asm/ppc-opcode.h
b/arch/powerpc/include/asm/ppc-opcode.h
index
Branch cache flushing code patching has inter-dependencies on both the
link stack and the count cache flushing state.
To make the code clearer and to separate the link stack and count
cache handling, split the "toggle" (setting up variables and printing
enable/disable) from the code patching.
Make the count-cache and link-stack messages look the same
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/security.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/kernel/security.c b/arch/powerpc/kernel/security.c
index
Prepare to allow for hardware link stack flushing by using the
none/sw/hw type, same as the count cache state.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/security.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kernel/security.c
The count cache flush mostly refers to both count cache and link stack
flushing. As a first step to untangling these a bit, re-name the bits
that apply to both.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/asm-prototypes.h | 4 +--
arch/powerpc/kernel/entry_64.S| 7
This series allows the link stack to be flushed with the speical
bcctr 2,0,0 flush instruction that also flushes the count cache if
the processor supports it.
Firmware does not support this at the moment, but I've tested it in
simulator with a patched firmware to advertise support.
Thanks,
Nick
On 08/06/20 8:12 pm, Sandipan Das wrote:
> The size of the cpu set must be large enough for systems
> with a very large number of CPUs. Otherwise, tests which
> try to determine the first online CPU by calling
> sched_getaffinity() will fail. This makes sure that the
> size of the allocated cpu
On Sat, 2020-05-02 at 11:59:49 UTC, Christophe JAILLET wrote:
> Fix a cut'n'paste error in a warning message. This should be
> 'cpu-idle-state-residency-ns' to match the property searched in the
> previous 'of_property_read_u32_array()'
>
> Fixes: 9c7b185ab2fe ("powernv/cpuidle: Parse dt idle
On Tue, 2019-04-02 at 20:47:22 UTC, Andrey Abramov wrote:
> Replace relaswap with built-in one, because relaswap
> does a simple byte to byte swap.
>
> Since Spectre mitigations have made indirect function calls more
> expensive, and the default simple byte copies swap is implemented
> without
On Sat, 2020-05-16 at 16:20:46 UTC, Geoff Levand wrote:
> The ps3's otheros flash loader has a size limit of 16 MiB for the
> uncompressed image. If that limit will be reached output the
> flash image file as 'otheros-too-big.bld'.
>
> Signed-off-by: Geoff Levand
Applied to powerpc next,
On Wed, 29 Apr 2020 16:56:48 +1000, Nicholas Piggin wrote:
> Well the last series was a disaster, I'll try again sending the
> patches with proper subject and changelogs written.
>
> Nicholas Piggin (6):
> powerpc/64/kuap: move kuap checks out of MSR[RI]=0 regions of exit
> code
>
On Tue, Jun 09, 2020 at 03:28:38PM +1000, Michael Ellerman wrote:
> On Mon, 24 Feb 2020 18:02:10 + (UTC), Christophe Leroy wrote:
> > In order to avoid Oopses, use probe_address() to read the
> > instruction at the address where the trap happened.
>
> Applied to powerpc/next.
>
> [1/1]
On Sat, 2020-05-16 at 11:54:49 UTC, Michael Ellerman wrote:
> From: Jordan Niethe
>
> Currently patch_imm32_load_insns() is used to load an instruction to
> r4 to be emulated by emulate_step(). For prefixed instructions we
> would like to be able to load a 64bit immediate to r4. To prepare for
>
On Tue, 21 Apr 2020 18:15:39 +1000, Oliver O'Halloran wrote:
> The vio and ibmebus buses are used for pseries specific paravirtualised
> devices and currently they're initialised by the generic initcall types.
> This is mostly fine, but it can result in some nuisance errors in dmesg
> when booting
On Tue, 2 Jun 2020 09:42:08 +0530, Ravi Bangoria wrote:
> kbuild test robot reported few build warnings with hw_breakpoint code
> when compiled with clang[1]. Fix those.
>
> [1]:
> https://lore.kernel.org/linuxppc-dev/202005192233.oi9cjrta%25...@intel.com/
Applied to powerpc/next.
[1/1]
On Mon, 6 Apr 2020 13:07:39 +1000, Oliver O'Halloran wrote:
> Re-work the control flow a bit so what's going on is a little clearer.
> This also ensures the table_group is only initialised once in the P9
> case. This shouldn't be a functional change since all the GPU PCI
> devices should have the
On Wed, 15 Apr 2020 09:35:02 +1000, Oliver O'Halloran wrote:
> It's pretty obsecure and confused me for a long time so I figured it's
> worth documenting properly.
Applied to powerpc/next.
[1/1] powerpc/powernv/pci: Add an explaination for PNV_IODA_PE_BUS_ALL
On Wed, 8 Apr 2020 21:22:13 +1000, Oliver O'Halloran wrote:
> Quite useful to know in some cases.
Applied to powerpc/next.
[1/1] powerpc/powernv: Add a print indicating when an IODA PE is released
https://git.kernel.org/powerpc/c/e5500ab657c51bec5af8dcf564a096de48e7a132
cheers
On Wed, 29 Apr 2020 17:02:47 +1000, Nicholas Piggin wrote:
> Christian reports:
>
> MODPOST vmlinux.o
> WARNING: modpost: vmlinux.o(.text.unlikely+0x1a0): Section mismatch in
> reference from the function .early_init_mmu() to the function
> .init.text:.radix__early_init_mmu()
> The
On Wed, 29 Apr 2020 16:24:21 +1000, Nicholas Piggin wrote:
> The same complicated sequence for juggling EE, RI, soft mask, and
> irq tracing is repeated 3 times, tidy these up into one function.
>
> This differs qiute a bit between sub architectures, so this makes
> the ppc32 port cleaner as
On Mon, 4 May 2020 22:29:07 +1000, Nicholas Piggin wrote:
> The idea behind this prefetch was to kick off a page table walk before
> returning from the fault, getting some pipelining advantage.
>
> But this never showed up any noticable performance advantage, and in
> fact with KUAP the
On Fri, 17 Apr 2020 17:35:05 +1000, Oliver O'Halloran wrote:
> For each PHB we maintain a reverse-map that can be used to find the
> PE that a BDFN is currently mapped to. Add a helper for doing this
> lookup so we can check if a PE has been configured without looking
> at pdn->pe_number.
Applied
On Tue, 21 Apr 2020 23:05:42 +0530, Naveen N. Rao wrote:
> This series addresses the crash reported by Qian Cai on ppc64le with
> -mprofile-kernel here:
> https://lore.kernel.org/r/15ac5b0e-a221-4b8c-9039-fa96b8ef7...@lca.pw
>
> While fixing patch_instruction() should address the crash, we should
On Mon, 13 Apr 2020 12:06:45 -0700, Nathan Chancellor wrote:
> A 0day randconfig uncovered an error with clang, trimmed for brevity:
>
> arch/powerpc/platforms/embedded6xx/wii.c:195:7: error: attribute
> declaration must precede definition [-Werror,-Wignored-attributes]
> if
On Wed, 20 May 2020 21:17:40 +1000, Michael Ellerman wrote:
> Show the address of the tasks regs in the process listing in xmon. The
> regs should always be on the stack page that we also print the address
> of, but it's still helpful not to have to find them by hand.
Applied to powerpc/next.
On Mon, 11 May 2020 22:58:24 +1000, Michael Ellerman wrote:
> This option increases the number of SLB misses by limiting the number
> of kernel SLB entries, and increased flushing of cached lookaside
> information. This helps stress test difficult to hit paths in the
> kernel.
>
> [mpe: Relocate
On Thu, 28 May 2020 00:58:40 +1000, Michael Ellerman wrote:
> __init_FSCR() was added originally in commit 2468dcf641e4 ("powerpc:
> Add support for context switching the TAR register") (Feb 2013), and
> only set FSCR_TAR.
>
> At that point FSCR (Facility Status and Control Register) was not
>
On Tue, 26 May 2020 17:26:30 +1000, Michael Ellerman wrote:
> The code patching code wants to get the value of a struct ppc_inst as
> a u64 when the instruction is prefixed, so we can pass the u64 down to
> __put_user_asm() and write it with a single store.
>
> The optprobes code wants to load a
On Mon, 18 May 2020 11:10:43 -0700, Nathan Chancellor wrote:
> This causes a build error with CONFIG_WALNUT because kb_cs and kb_data
> were removed in commit 917f0af9e5a9 ("powerpc: Remove arch/ppc and
> include/asm-ppc").
>
> ld.lld: error: undefined symbol: kb_cs
> > referenced by
On Fri, 22 May 2020 23:33:18 +1000, Michael Ellerman wrote:
> In a few places we want to calculate the address of the next
> instruction. Previously that was simple, we just added 4 bytes, or if
> using a u32 * we incremented that pointer by 1.
>
> But prefixed instructions make it more
On Wed, 20 May 2020 22:12:57 +1000, Michael Ellerman wrote:
> This adds the CPU or thread number to printk messages. This helps a
> lot when deciphering concurrent oopses that have been interleaved.
>
> Example output, of PID1 (T1) triggering a warning:
>
> [1.581678][T1] WARNING: CPU:
On Mon, 25 May 2020 15:50:04 +1000, Michael Ellerman wrote:
> The code patching code wants to get the value of a struct ppc_inst as
> a u64 when the instruction is prefixed, so we can pass the u64 down to
> __put_user_asm() and write it with a single store.
>
> This is a bit awkward because the
On Thu, 21 May 2020 17:26:48 +1000, Michael Ellerman wrote:
>
Applied to powerpc/next.
[1/1] powerpc/4xx: Don't unmap NULL mbase
https://git.kernel.org/powerpc/c/bcec081ecc940fc38730b29c743bbee661164161
cheers
On Wed, 25 Mar 2020 15:05:46 +1100, Michael Neuling wrote:
> The ISA has a quirk that's useful for the Linux implementation.
> Document it here so others are less likely to trip over it.
Applied to powerpc/next.
[1/1] powerpc/tm: Document h/rfid and mtmsrd quirk
On Fri, 29 May 2020 09:07:31 +1000, Michael Neuling wrote:
> Currently when we boot on a big core system, we get this print:
> [0.040500] Using small cores at SMT level
>
> This is misleading as we've actually detected big cores.
>
> This patch clears up the print to say we've detect big
On Tue, 19 May 2020 14:30:09 +1000, Michael Neuling wrote:
> This gives us OF_PMEM which is useful in mambo.
>
> This adds 153K to the text of ppc64le_defconfig which 0.8% of the
> total text.
>
> LIBNVDIMM text databss dec hex
> Without 18574833 5518150 1539240 25632223
On Mon, 30 Mar 2020 15:32:15 +0200, Michal Simek wrote:
> recently we wanted to update xilinx intc driver and we found that function
> which we wanted to remove is still wired by ancient Xilinx PowerPC
> platforms. Here is the thread about it.
>
On Thu, 2 Apr 2020 16:51:57 -0300, Leonardo Bras wrote:
> While providing guests, it's desirable to resize it's memory on demand.
>
> By now, it's possible to do so by creating a guest with a small base
> memory, hot-plugging all the rest, and using 'movable_node' kernel
> command-line parameter,
On Sat, 25 Apr 2020 19:05:18 -0700, Ram Pai wrote:
> >From 10ea2eaf492ca3f22f67a5a63a2b7865e45299ad Mon Sep 17 00:00:00 2001
> From: Ram Pai
> Date: Mon, 24 Feb 2020 01:09:48 -0500
> Subject: [PATCH v3] powerpc/XIVE: SVM: share the event-queue page with the
> Hypervisor.
>
> XIVE interrupt
On Mon, 18 May 2020 20:42:43 -0300, Leonardo Bras wrote:
> Patch 2 implement rtas_call_reentrant() for reentrant rtas-calls:
> "ibm,int-on", "ibm,int-off",ibm,get-xive" and "ibm,set-xive",
> according to LoPAPR Version 1.1 (March 24, 2016).
>
> For that, it's necessary that every call uses a
On Tue, 12 May 2020 18:45:35 -0300, Leonardo Bras wrote:
> Currently, if printk lock (logbuf_lock) is held by other thread during
> crash, there is a chance of deadlocking the crash on next printk, and
> blocking a possibly desired kdump.
>
> At the start of default_machine_crash_shutdown, make
On Mon, 25 May 2020 16:13:02 +0530, Kajol Jain wrote:
> Patchset fixes the inconsistent results we are getting when
> we run multiple 24x7 events.
>
> "hv_24x7" pmu interface events needs system dependent parameter
> like socket/chip/core. For example, hv_24x7 chip level events needs
> specific
On Wed, 1 Apr 2020 22:00:44 +0800, Pingfan Liu wrote:
> 'mem=" option is an easy way to put high pressure on memory during some
> test. Hence after applying the memory limit, instead of total mem, the
> actual usable memory should be considered when reserving mem for
> crashkernel. Otherwise the
On Wed, 27 May 2020 15:14:35 +0530, Hari Bathini wrote:
> If the memory chunk found for reserving memory overshoots the memory
> limit imposed, do not proceed with reserving memory. Default behavior
> was this until commit 140777a3d8df ("powerpc/fadump: consider reserved
> ranges while reserving
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