Re: [PATCH] ASoC: fsl_spdif: Add pm runtime function

2020-06-18 Thread Nicolin Chen
On Thu, Jun 18, 2020 at 07:55:34PM +0800, Shengjiu Wang wrote: > Add pm runtime support and move clock handling there. > Close the clocks at suspend to reduce the power consumption. > > fsl_spdif_suspend is replaced by pm_runtime_force_suspend. > fsl_spdif_resume is replaced by

[PATCH 4/4] powerpc/pseries/iommu: Remove default DMA window before creating DDW

2020-06-18 Thread Leonardo Bras
On LoPAR "DMA Window Manipulation Calls", it's recommended to remove the default DMA window for the device, before attempting to configure a DDW, in order to make the maximum resources available for the next DDW to be created. This is a requirement for some devices to use DDW, given they only

[PATCH 3/4] powerpc/pseries/iommu: Move window-removing part of remove_ddw into remove_dma_window

2020-06-18 Thread Leonardo Bras
Move the window-removing part of remove_ddw into a new function (remove_dma_window), so it can be used to remove other DMA windows. It's useful for removing DMA windows that don't create DIRECT64_PROPNAME property, like the default DMA window from the device, which uses "ibm,dma-window".

[PATCH 2/4] powerpc/pseries/iommu: Implement ibm, reset-pe-dma-windows rtas call

2020-06-18 Thread Leonardo Bras
Platforms supporting the DDW option starting with LoPAR level 2.7 implement ibm,ddw-extensions. The first extension available (index 2) carries the token for ibm,reset-pe-dma-windows rtas call, which is used to restore the default DMA window for a device, if it has been deleted. It does so by

[PATCH 1/4] powerpc/pseries/iommu: Update call to ibm, query-pe-dma-windows

2020-06-18 Thread Leonardo Bras
>From LoPAR level 2.8, "ibm,ddw-extensions" index 3 can make the number of outputs from "ibm,query-pe-dma-windows" go from 5 to 6. This change of output size is meant to expand the address size of largest_available_block PE TCE from 32-bit to 64-bit, which ends up shifting page_size and

[PATCH 0/4] Remove default DMA window before creating DDW

2020-06-18 Thread Leonardo Bras
There are some devices that only allow 1 DMA window to exist at a time, and in those cases, a DDW is never created to them, since the default DMA window keeps using this resource. LoPAR recommends this procedure: 1. Remove the default DMA window, 2. Query for which configs the DDW can be created,

Re: [PATCH 2/2] powerpc/hv-24x7: Add sysfs files inside hv-24x7 device to show cpumask

2020-06-18 Thread Gautham R Shenoy
On Thu, Jun 18, 2020 at 05:57:13PM +0530, Kajol Jain wrote: > Patch here adds a cpumask attr to hv_24x7 pmu along with ABI documentation. > > command:# cat /sys/devices/hv_24x7/cpumask > 0 > > Signed-off-by: Kajol Jain > --- > .../sysfs-bus-event_source-devices-hv_24x7| 6 >

Re: [PATCH 1/2] powerpc/perf/hv-24x7: Add cpu hotplug support

2020-06-18 Thread Gautham R Shenoy
Hello Kajol, On Thu, Jun 18, 2020 at 05:57:12PM +0530, Kajol Jain wrote: > Patch here adds cpu hotplug functions to hv_24x7 pmu. > A new cpuhp_state "CPUHP_AP_PERF_POWERPC_HV_24x7_ONLINE" enum > is added. > > The online function update the cpumask only if its NULL. > As the primary intention for

Re: [PATCHv2] tpm: ibmvtpm: Wait for ready buffer before probing for TPM2 attributes

2020-06-18 Thread Jerry Snitselaar
On Fri Jun 19 20, David Gibson wrote: The tpm2_get_cc_attrs_tbl() call will result in TPM commands being issued, which will need the use of the internal command/response buffer. But, we're issuing this *before* we've waited to make sure that buffer is allocated. This can result in intermittent

[PATCHv2] tpm: ibmvtpm: Wait for ready buffer before probing for TPM2 attributes

2020-06-18 Thread David Gibson
The tpm2_get_cc_attrs_tbl() call will result in TPM commands being issued, which will need the use of the internal command/response buffer. But, we're issuing this *before* we've waited to make sure that buffer is allocated. This can result in intermittent failures to probe if the hypervisor /

Re: [PATCH V3 (RESEND) 0/3] arm64: Enable vmemmap mapping from device memory

2020-06-18 Thread Anshuman Khandual
On 06/18/2020 02:26 PM, Mike Rapoport wrote: > On Thu, Jun 18, 2020 at 06:45:27AM +0530, Anshuman Khandual wrote: >> This series enables vmemmap backing memory allocation from device memory >> ranges on arm64. But before that, it enables vmemmap_populate_basepages() >> and

Re: [PATCH v2 2/4] KVM: PPC: Book3S HV: track the state GFNs associated with secure VMs

2020-06-18 Thread Ram Pai
On Thu, Jun 18, 2020 at 03:31:06PM +0200, Laurent Dufour wrote: > Le 18/06/2020 à 11:19, Ram Pai a écrit : > > .snip.. > > > > 1. States of a GFN > > --- > > The GFN can be in one of the following states. >

[PATCH net v2] ibmveth: Fix max MTU limit

2020-06-18 Thread Thomas Falcon
The max MTU limit defined for ibmveth is not accounting for virtual ethernet buffer overhead, which is twenty-two additional bytes set aside for the ethernet header and eight additional bytes of an opaque handle reserved for use by the hypervisor. Update the max MTU to reflect this overhead.

[PATCH net] ibmvnic: continue to init in CRQ reset returns H_CLOSED

2020-06-18 Thread Dany Madden
Continue the reset path when partner adapter is not ready or H_CLOSED is returned from reset crq. This patch allows the CRQ init to proceed to establish a valid CRQ for traffic to flow after reset. Signed-off-by: Dany Madden --- drivers/net/ethernet/ibm/ibmvnic.c | 9 +++-- 1 file changed,

[PATCH] pci: pcie: AER: Fix logging of Correctable errors

2020-06-18 Thread Matt Jolly
The AER documentation indicates that correctable (severity=Corrected) errors should be output as a warning so that users can filter these errors if they choose to; This functionality does not appear to have been implemented. This patch modifies the functions aer_print_error and __aer_print_error

Re: rename probe_kernel_* and probe_user_*

2020-06-18 Thread Helge Deller
On 18.06.20 21:48, Linus Torvalds wrote: > [ Explicitly added architecture lists and developers to the cc to make > this more visible ] > > On Wed, Jun 17, 2020 at 12:38 AM Christoph Hellwig wrote: >> >> Andrew and I decided to drop the patches implementing your suggested >> rename of the

Re: [PATCH net] ibmveth: Fix max MTU limit

2020-06-18 Thread Thomas Falcon
On 6/18/20 10:57 AM, Jakub Kicinski wrote: On Thu, 18 Jun 2020 10:43:46 -0500 Thomas Falcon wrote: The max MTU limit defined for ibmveth is not accounting for virtual ethernet buffer overhead, which is twenty-two additional bytes set aside for the ethernet header and eight additional bytes of

Re: [PATCH v2 0/4] Migrate non-migrated pages of a SVM.

2020-06-18 Thread Ram Pai
I should have elaborated on the problem and the need for these patches. Explaining it here. Will add it to the series in next version. - The time taken to switch a VM to Secure-VM, increases by the size of the VM. A 100GB VM takes

Re: rename probe_kernel_* and probe_user_*

2020-06-18 Thread Linus Torvalds
[ Explicitly added architecture lists and developers to the cc to make this more visible ] On Wed, Jun 17, 2020 at 12:38 AM Christoph Hellwig wrote: > > Andrew and I decided to drop the patches implementing your suggested > rename of the probe_kernel_* and probe_user_* helpers from -mm as there

Re: [PATCH v2 02/12] ocxl: Change type of pasid to unsigned int

2020-06-18 Thread Frederic Barrat
Le 18/06/2020 à 17:37, Fenghua Yu a écrit : The first 3 patches clean up pasid and flag defitions to prepare for following patches. If you think this patch can be dropped, we will drop it. Yes, I think that's the case. Thanks, Fred

[PATCH v1 5/5] KVM: PPC: Book3S HV: Use H_RPT_INVALIDATE in nested KVM

2020-06-18 Thread Bharata B Rao
In the nested KVM case, replace H_TLB_INVALIDATE by the new hcall H_RPT_INVALIDATE if available. The availability of this hcall is determined from "hcall-rpt-invalidate" string in ibm,hypertas-functions DT property. Signed-off-by: Bharata B Rao --- arch/powerpc/include/asm/firmware.h | 4

[PATCH v1 4/5] powerpc/mm/book3s64/radix: Off-load TLB invalidations to host when !GTSE

2020-06-18 Thread Bharata B Rao
From: Nicholas Piggin When platform doesn't support GTSE, let TLB invalidation requests for radix guests be off-loaded to the host using H_RPT_INVALIDATE hcall. Signed-off-by: Nicholas Piggin Signed-off-by: Bharata B Rao [hcall wrapper, error path handling and renames] ---

[PATCH v1 3/5] powerpc/pseries: H_REGISTER_PROC_TBL should ask for GTSE only if enabled

2020-06-18 Thread Bharata B Rao
H_REGISTER_PROC_TBL asks for GTSE by default. GTSE flag bit should be set only when GTSE is supported. Signed-off-by: Bharata B Rao --- arch/powerpc/platforms/pseries/lpar.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/platforms/pseries/lpar.c

[PATCH v1 2/5] powerpc/prom_init: Ask for Radix GTSE only if supported.

2020-06-18 Thread Bharata B Rao
In the case of radix, don't ask for GTSE by default but ask only if GTSE is enabled. Signed-off-by: Bharata B Rao --- arch/powerpc/kernel/prom_init.c | 13 - 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/kernel/prom_init.c

[PATCH v1 1/5] powerpc/mm: Make GTSE an MMU FTR

2020-06-18 Thread Bharata B Rao
Make GTSE an MMU feature and enable it by default for radix. However for guest, conditionally enable it if hypervisor supports it via OV5 vector. Having GTSE as an MMU feature will make it easy to enable radix without GTSE. Currently radix assumes GTSE is enabled by default. Signed-off-by:

[PATCH v1 0/5] Off-load TLB invalidations to host for !GTSE

2020-06-18 Thread Bharata B Rao
Hypervisor may choose not to enable Guest Translation Shootdown Enable (GTSE) option for the guest. When GTSE isn't ON, the guest OS isn't permitted to use instructions like tblie and tlbsync directly, but is expected to make hypervisor calls to get the TLB flushed. This series enables the TLB

Re: [PATCH net] ibmveth: Fix max MTU limit

2020-06-18 Thread Jakub Kicinski
On Thu, 18 Jun 2020 10:43:46 -0500 Thomas Falcon wrote: > The max MTU limit defined for ibmveth is not accounting for > virtual ethernet buffer overhead, which is twenty-two additional > bytes set aside for the ethernet header and eight additional bytes > of an opaque handle reserved for use by

[PATCH net] ibmveth: Fix max MTU limit

2020-06-18 Thread Thomas Falcon
The max MTU limit defined for ibmveth is not accounting for virtual ethernet buffer overhead, which is twenty-two additional bytes set aside for the ethernet header and eight additional bytes of an opaque handle reserved for use by the hypervisor. Update the max MTU to reflect this overhead.

Re: [PATCH v2 02/12] ocxl: Change type of pasid to unsigned int

2020-06-18 Thread Fenghua Yu
Hi, Frederic, On Thu, Jun 18, 2020 at 10:05:19AM +0200, Frederic Barrat wrote: > > > Le 13/06/2020 à 02:41, Fenghua Yu a écrit : > >PASID is defined as "int" although it's a 20-bit value and shouldn't be > >negative int. To be consistent with type defined in iommu, define PASID > >as "unsigned

[PATCH 4/6] exec: split prepare_arg_pages

2020-06-18 Thread Christoph Hellwig
Move counting the arguments and enviroment variables out of prepare_arg_pages and rename the rest of the function to check_arg_limit. This prepares for a version of do_execvat that takes kernel pointers. Signed-off-by: Christoph Hellwig --- fs/exec.c | 26 ++ 1 file

[PATCH 6/6] kernel: add a kernel_wait helper

2020-06-18 Thread Christoph Hellwig
Add a helper that waits for a pid and stores the status in the passed in kernel pointer. Use it to fix the usage of kernel_wait4 in call_usermodehelper_exec_sync that only happens to work due to the implicit set_fs(KERNEL_DS) for kernel threads. Signed-off-by: Christoph Hellwig ---

[PATCH 5/6] exec: add a kernel_execveat helper

2020-06-18 Thread Christoph Hellwig
Add a kernel_execveat helper to execute a binary with kernel space argv and envp pointers. Switch executing init and user mode helpers to this new helper instead of relying on the implicit set_fs(KERNEL_DS) for early init code and kernel threads, and move the getname call into the do_execve

[PATCH 3/6] exec: cleanup the count() function

2020-06-18 Thread Christoph Hellwig
Remove the max argument as it is hard wired to MAX_ARG_STRINGS, and give the function a slightly less generic name. Signed-off-by: Christoph Hellwig --- fs/exec.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/fs/exec.c b/fs/exec.c index

[PATCH 2/6] exec: simplify the compat syscall handling

2020-06-18 Thread Christoph Hellwig
The only differenence betweeen the compat exec* syscalls and their native versions is that compat_ptr sign extension, and the fact that the pointer arithmetics for the two dimensional arrays needs to use the compat pointer size. Instead of the compat wrappers and the struct user_arg_ptr machinery

[PATCH 1/6] exec: cleanup the execve wrappers

2020-06-18 Thread Christoph Hellwig
Remove a whole bunch of wrappers that eventually all call __do_execve_file, and consolidate the execvce helpers to: (1) __do_execveat, which is the lowest level helper implementing the actual functionality (2) do_execvat, which is used by all callers that want native pointers

properly support exec and wait with kernel pointers v2

2020-06-18 Thread Christoph Hellwig
Hi all, this series first cleans up the exec code and then adds proper kernel_execveat and kernel_wait callers instead of relying on the fact that the early init code and kernel threads implicitly run with the address limit set to KERNEL_DS. Note that the cleanup removes the compat execve(at)

[PATCH] mm/debug_vm_pgtable: Fix build failure with powerpc 8xx

2020-06-18 Thread Christophe Leroy
Since commit 9e343b467c70 ("READ_ONCE: Enforce atomicity for {READ,WRITE}_ONCE() memory accesses"), READ_ONCE() cannot be used anymore to read complex page table entries. This leads to: CC mm/debug_vm_pgtable.o In file included from ./include/asm-generic/bug.h:5, from

Re: [PATCH 3/3] powerpc/8xx: Provide ptep_get() with 16k pages

2020-06-18 Thread Christophe Leroy
Le 18/06/2020 à 02:58, Michael Ellerman a écrit : Peter Zijlstra writes: On Thu, Jun 18, 2020 at 12:21:22AM +1000, Michael Ellerman wrote: Peter Zijlstra writes: On Mon, Jun 15, 2020 at 12:57:59PM +, Christophe Leroy wrote: +#if defined(CONFIG_PPC_8xx) &&

Re: [PATCH 3/3] powerpc/8xx: Provide ptep_get() with 16k pages

2020-06-18 Thread Christophe Leroy
Le 18/06/2020 à 03:00, Michael Ellerman a écrit : Christophe Leroy writes: Le 17/06/2020 à 16:38, Peter Zijlstra a écrit : On Thu, Jun 18, 2020 at 12:21:22AM +1000, Michael Ellerman wrote: Peter Zijlstra writes: On Mon, Jun 15, 2020 at 12:57:59PM +, Christophe Leroy wrote: +#if

Re: [PATCH v2 0/2] powerpc/pci: unmap interrupts when a PHB is removed

2020-06-18 Thread Cédric Le Goater
On 6/17/20 6:29 PM, Cédric Le Goater wrote: > Hello, > > When a passthrough IO adapter is removed from a pseries machine using > hash MMU and the XIVE interrupt mode, the POWER hypervisor expects the > guest OS to clear all page table entries related to the adapter. If > some are still present,

Re: [PATCH v2 2/4] KVM: PPC: Book3S HV: track the state GFNs associated with secure VMs

2020-06-18 Thread Laurent Dufour
Le 18/06/2020 à 11:19, Ram Pai a écrit : During the life of SVM, its GFNs transition through normal, secure and shared states. Since the kernel does not track GFNs that are shared, it is not possible to disambiguate a shared GFN from a GFN whose PFN has not yet been migrated to a secure-PFN.

Re: [PATCH] powerpc/8xx: use pmd_off() to access a PMD entry in pte_update()

2020-06-18 Thread Michael Ellerman
On Mon, 15 Jun 2020 12:22:29 +0300, Mike Rapoport wrote: > The pte_update() implementation for PPC_8xx unfolds page table from the PGD > level to access a PMD entry. Since 8xx has only 2-level page table this can > be simplified with pmd_off() shortcut. > > Replace explicit unfolding with

Re: [PATCH] powerpc/64s: Fix KVM interrupt using wrong save area

2020-06-18 Thread Michael Ellerman
On Mon, 15 Jun 2020 16:12:47 +1000, Nicholas Piggin wrote: > The CTR register reload in the KVM interrupt path used the wrong save > area for SLB (and NMI) interrupts. Applied to powerpc/fixes. [1/1] powerpc/64s: Fix KVM interrupt using wrong save area

Re: [PATCH 1/2] powerpc/syscalls: Use the number when building SPU syscall table

2020-06-18 Thread Michael Ellerman
On Tue, 16 Jun 2020 23:56:16 +1000, Michael Ellerman wrote: > Currently the macro that inserts entries into the SPU syscall table > doesn't actually use the "nr" (syscall number) parameter. > > This does work, but it relies on the exact right number of syscall > entries being emitted in order for

Re: [PATCH 0/3] Fix build failure with v5.8-rc1

2020-06-18 Thread Michael Ellerman
On Mon, 15 Jun 2020 12:57:55 + (UTC), Christophe Leroy wrote: > Commit 2ab3a0a02905 ("READ_ONCE: Enforce atomicity for > {READ,WRITE}_ONCE() memory accesses") leads to following build > failure on powerpc 8xx. > > To fix it, this small series introduces a new helper named ptep_get() > to

Re: [PATCH v2 1/4] powerpc/instruction_dump: Fix kernel crash with show_instructions

2020-06-18 Thread Michael Ellerman
On Sun, 24 May 2020 15:08:19 +0530, Aneesh Kumar K.V wrote: > With Hard Lockup watchdog, we can hit a BUG() if we take a watchdog > interrupt when in OPAL mode. This happens in show_instructions() > where the kernel takes the watchdog NMI IPI with MSR_IR == 0. > With that show_instructions()

[PATCH 2/2] powerpc/hv-24x7: Add sysfs files inside hv-24x7 device to show cpumask

2020-06-18 Thread Kajol Jain
Patch here adds a cpumask attr to hv_24x7 pmu along with ABI documentation. command:# cat /sys/devices/hv_24x7/cpumask 0 Signed-off-by: Kajol Jain --- .../sysfs-bus-event_source-devices-hv_24x7| 6 arch/powerpc/perf/hv-24x7.c | 31 ++- 2 files

[PATCH 1/2] powerpc/perf/hv-24x7: Add cpu hotplug support

2020-06-18 Thread Kajol Jain
Patch here adds cpu hotplug functions to hv_24x7 pmu. A new cpuhp_state "CPUHP_AP_PERF_POWERPC_HV_24x7_ONLINE" enum is added. The online function update the cpumask only if its NULL. As the primary intention for adding hotplug support is to desiginate a CPU to make HCALL to collect the count

[PATCH 0/2] Add cpu hotplug support for powerpc/perf/hv-24x7

2020-06-18 Thread Kajol Jain
This patchset add cpu hotplug support for hv_24x7 driver by adding online/offline cpu hotplug function. It also add sysfs file "cpumask" to expose current online cpu that can be used for hv_24x7 event count. Kajol Jain (2): powerpc/perf/hv-24x7: Add cpu hotplug support powerpc/hv-24x7: Add

[PATCH] powerpc/8xx: Modify ptep_get()

2020-06-18 Thread Christophe Leroy
Move ptep_get() close to pte_update(), in an ifdef section already dedicated to powerpc 8xx. This section contains explanation about the layout of page table entries. Also modify it to return 4 times the pte value instead of padding with zeroes. Signed-off-by: Christophe Leroy ---

[PATCH] ASoC: fsl_spdif: Add pm runtime function

2020-06-18 Thread Shengjiu Wang
Add pm runtime support and move clock handling there. Close the clocks at suspend to reduce the power consumption. fsl_spdif_suspend is replaced by pm_runtime_force_suspend. fsl_spdif_resume is replaced by pm_runtime_force_resume. Signed-off-by: Shengjiu Wang --- sound/soc/fsl/fsl_spdif.c |

[PATCH v2 4/4] KVM: PPC: Book3S HV: migrate hot plugged memory

2020-06-18 Thread Ram Pai
From: Laurent Dufour When a memory slot is hot plugged to a SVM, PFNs associated with the GFNs in that slot must be migrated to the secure-PFNs, aka device-PFNs. kvmppc_uv_migrate_mem_slot() is called to accomplish this. UV_PAGE_IN ucall is skipped, since the ultravisor does not trust the

[PATCH v2 3/4] KVM: PPC: Book3S HV: migrate remaining normal-GFNs to secure-GFNs in H_SVM_INIT_DONE

2020-06-18 Thread Ram Pai
H_SVM_INIT_DONE incorrectly assumes that the Ultravisor has explicitly called H_SVM_PAGE_IN for all secure pages. These GFNs continue to be normal GFNs associated with normal PFNs; when infact, these GFNs should have been secure GFNs, associated with device PFNs. Move all the PFN associated with

[PATCH v2 2/4] KVM: PPC: Book3S HV: track the state GFNs associated with secure VMs

2020-06-18 Thread Ram Pai
During the life of SVM, its GFNs transition through normal, secure and shared states. Since the kernel does not track GFNs that are shared, it is not possible to disambiguate a shared GFN from a GFN whose PFN has not yet been migrated to a secure-PFN. Also it is not possible to disambiguate a

[PATCH v2 1/4] KVM: PPC: Book3S HV: Fix function definition in book3s_hv_uvmem.c

2020-06-18 Thread Ram Pai
Without this fix, git is confused. It generates wrong function context for code changes in subsequent patches. Weird, but true. Cc: Paul Mackerras Cc: Benjamin Herrenschmidt Cc: Michael Ellerman Cc: Bharata B Rao Cc: Aneesh Kumar K.V Cc: Sukadev Bhattiprolu Cc: Laurent Dufour Cc: Thiago

[PATCH v2 0/4] Migrate non-migrated pages of a SVM.

2020-06-18 Thread Ram Pai
This patch series migrates the non-migrated pages of a SVM. This is required when the UV calls H_SVM_INIT_DONE, and when a memory-slot is hotplugged to a Secure VM. Testing: Passed rigorous SVM reboot test using different sized SVMs. Changelog: . fixed a bug observed by Bharata.

Re: [PATCH] mm: Move p?d_alloc_track to separate header file

2020-06-18 Thread Mike Rapoport
On Wed, Jun 17, 2020 at 06:12:26PM -0700, Andrew Morton wrote: > On Tue, 9 Jun 2020 14:05:33 +0200 Joerg Roedel wrote: > > > From: Joerg Roedel > > > > The functions are only used in two source files, so there is no need > > for them to be in the global header. Move them to the new > >

Re: [PATCH V3 (RESEND) 0/3] arm64: Enable vmemmap mapping from device memory

2020-06-18 Thread Mike Rapoport
On Thu, Jun 18, 2020 at 06:45:27AM +0530, Anshuman Khandual wrote: > This series enables vmemmap backing memory allocation from device memory > ranges on arm64. But before that, it enables vmemmap_populate_basepages() > and vmemmap_alloc_block_buf() to accommodate struct vmem_altmap based >

Re: [PATCH v2 02/12] ocxl: Change type of pasid to unsigned int

2020-06-18 Thread Frederic Barrat
Le 13/06/2020 à 02:41, Fenghua Yu a écrit : PASID is defined as "int" although it's a 20-bit value and shouldn't be negative int. To be consistent with type defined in iommu, define PASID as "unsigned int". It looks like this patch was considered because of the use of 'pasid' in variable

[V2 PATCH 3/3] Add support for arm64 to carry over IMA measurement logs

2020-06-18 Thread Prakhar Srivastava
Add support for arm64 to carry over IMA measurement logs. Update arm64 code to call into functions made available in patch 1/3. --- arch/arm64/Kconfig | 1 + arch/arm64/include/asm/ima.h | 17 ++ arch/arm64/include/asm/kexec.h | 3 ++

[V2 PATCH 2/3] dt-bindings: chosen: Document ima-kexec-buffer

2020-06-18 Thread Prakhar Srivastava
Integrity measurement architecture(IMA) validates if files have been accidentally or maliciously altered, both remotely and locally, appraise a file's measurement against a "good" value stored as an extended attribute, and enforce local file integrity. IMA also measures singatures of kernel and

[V2 PATCH 0/3] Adding support for carrying IMA measurement logs

2020-06-18 Thread Prakhar Srivastava
Integrgity Measurement Architecture(IMA) during kexec(kexec file load) verifies the kernel signature and measures the signature of the kernel. The signature in the measuremnt logs is used to verfiy the authenticity of the kernel in the subsequent kexec'd session, however in the current

[V2 PATCH 1/3] Refactoring powerpc code for carrying over IMA measurement logs, to move non architecture specific code to security/ima.

2020-06-18 Thread Prakhar Srivastava
Powerpc has support to carry over the IMA measurement logs. Refatoring the non-architecture specific code out of arch/powerpc and into security/ima. The code adds support for reserving and freeing up of memory for IMA measurement logs. --- arch/powerpc/include/asm/ima.h | 10 ---