On Fri, Aug 27, 2021, Mathieu Desnoyers wrote:
> > So there are effectively three reasons we want a delay:
> >
> > 1. To allow sched_setaffinity() to coincide with ioctl(KVM_RUN) before KVM
> > can
> > enter the guest so that the guest doesn't need an arch-specific VM-Exit
> > source.
> >
Hi Christophe,
On 8/27/21 12:56 PM, Christophe JAILLET wrote:
> It has *not* been compile tested because I don't have the needed
> configuration or cross-compiler.
The powerpc ppc64_defconfig has CONFIG_SPIDER_NET set. My
tdd-builder Docker image has the needed gcc-powerpc-linux-gnu
cross
- On Aug 27, 2021, at 7:23 PM, Sean Christopherson sea...@google.com wrote:
> On Fri, Aug 27, 2021, Mathieu Desnoyers wrote:
[...]
>> Does it reproduce if we randomize the delay to have it picked randomly from
>> 0us
>> to 100us (with 1us step) ? It would remove a lot of the needs for
>>
In [1], Christoph Hellwig has proposed to remove the wrappers in
include/linux/pci-dma-compat.h.
Some reasons why this API should be removed have been given by Julia
Lawall in [2].
A coccinelle script has been used to perform the needed transformation
Only relevant parts are given below.
@@ @@
On Fri, Aug 27, 2021 at 12:13:42PM +0200, Vincent Guittot wrote:
> On Tue, 10 Aug 2021 at 16:41, Ricardo Neri
> wrote:
> > @@ -9540,6 +9629,12 @@ static struct rq *find_busiest_queue(struct lb_env
> > *env,
> > nr_running == 1)
> > continue;
> >
> > +
On Fri, Aug 27, 2021 at 05:17:22PM +0200, Vincent Guittot wrote:
> On Fri, 27 Aug 2021 at 16:50, Peter Zijlstra wrote:
> >
> > On Fri, Aug 27, 2021 at 12:13:42PM +0200, Vincent Guittot wrote:
> > > > +/**
> > > > + * asym_smt_can_pull_tasks - Check whether the load balancing CPU can
> > > > pull
- On Aug 26, 2021, at 7:54 PM, Sean Christopherson sea...@google.com wrote:
> On Thu, Aug 26, 2021, Mathieu Desnoyers wrote:
>> - On Aug 25, 2021, at 8:51 PM, Sean Christopherson sea...@google.com
>> wrote:
>> >> >> + r = sched_setaffinity(0, sizeof(allowed_mask),
>> >>
> On 26. Aug 2021, at 05:43, Srikar Dronamraju
> wrote:
>
> * Christian Zigotzky [2021-08-16 14:29:21]:
>
>
> Hi Christian,
>
>> I tested the RC6 of kernel 5.14 today and unfortunately the issue still
>> exists. We have figured out that only P5040 SoCs are affected. [1]
>> P5020 SoCs
Hello Fred,
On Fri, 2021-08-27 at 19:06 +0200, Frederic Barrat wrote:
>
> I think it looks ok now as it was mostly me who was misunderstanding
> one
> part of the previous iteration.
> Reviewed-by: Frederic Barrat
>
Thank you for reviewing this series!
> Sorry for the late review, I was
On 17/08/2021 08:39, Leonardo Bras wrote:
So far it's assumed possible to map the guest RAM 1:1 to the bus, which
works with a small number of devices. SRIOV changes it as the user can
configure hundreds VFs and since phyp preallocates TCEs and does not
allow IOMMU pages bigger than 64K, it
On 17/08/2021 08:39, Leonardo Bras wrote:
Update remove_dma_window() so it can be used to remove DDW with a given
property name.
This enables the creation of new property names for DDW, so we can
have different usage for it, like indirect mapping.
Also, add return values to it so we can
On 17/08/2021 08:39, Leonardo Bras wrote:
Code used to create a ddw property that was previously scattered in
enable_ddw() is now gathered in ddw_property_create(), which deals with
allocation and filling the property, letting it ready for
of_property_add(), which now occurs in sequence.
On 17/08/2021 08:39, Leonardo Bras wrote:
Having a function to check if the iommu table has any allocation helps
deciding if a tbl can be reset for using a new DMA window.
It should be enough to replace all instances of !bitmap_empty(tbl...).
iommu_table_in_use() skips reserved memory, so
Microwatt is radix-only, so stop selecting the hash MMU code.
This saves 20kB compressed dtbImage and 56kB vmlinux size.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/configs/microwatt_defconfig | 1 -
arch/powerpc/platforms/Kconfig.cputype | 1 +
arch/powerpc/platforms/microwatt/Kconfig |
Microwatt implements a subset of ISA v3.0 which is equivalent to
the POWER9_CPU selection.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/configs/microwatt_defconfig | 1 +
arch/powerpc/platforms/microwatt/Kconfig | 1 +
2 files changed, 2 insertions(+)
diff --git
Introduce a new option CONFIG_PPC_64S_HASH_MMU which allows the 64s hash
MMU code to be compiled out if radix is selected and the minimum
supported CPU type is POWER9 or higher, and KVM is not selected.
This saves 128kB kernel image size (90kB text) on powernv_defconfig
minus KVM, 350kB on
The pseries platform does not use the native hash code but the PAPR
virtualised hash interfaces. Remove PPC_HASH_MMU_NATIVE. This
requires moving some tlbiel code from hash_native.c to hash_utils.c.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/book3s/64/tlbflush.h | 4 -
PPC_NATIVE now only controls the native HPT code, so rename it to be
more descriptive. Restrict it to Book3S only.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/mm/book3s64/Makefile | 2 +-
arch/powerpc/mm/book3s64/hash_utils.c | 2 +-
arch/powerpc/platforms/52xx/Kconfig
FW_FEATURE_NATIVE_ALWAYS and FW_FEATURE_NATIVE_POSSIBLE are always
zero and never do anything. Remove them.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/firmware.h | 8
1 file changed, 8 deletions(-)
diff --git a/arch/powerpc/include/asm/firmware.h
Now that there's a platform that can make good use of it, here's
a series that can prevent the hash MMU code being built for 64s
platforms that don't need it.
Thanks,
Nick
Nicholas Piggin (6):
powerpc: Remove unused FW_FEATURE_NATIVE references
powerpc: Rename PPC_NATIVE to
On Fri, Aug 27, 2021 at 04:18:47PM +0200, Peter Zijlstra wrote:
> On Fri, Aug 27, 2021 at 09:45:37AM +, Christophe Leroy wrote:
> > This RFC is to validate the concept of static_call on powerpc.
> >
> > Highly copied from x86.
> >
> > It replaces ppc_md.get_irq() which is called at every
On Fri, 27 Aug 2021 at 16:50, Peter Zijlstra wrote:
>
> On Fri, Aug 27, 2021 at 12:13:42PM +0200, Vincent Guittot wrote:
> > > +/**
> > > + * asym_smt_can_pull_tasks - Check whether the load balancing CPU can
> > > pull tasks
> > > + * @dst_cpu: Destination CPU of the load balancing
> > > + *
On Fri, Aug 27, 2021 at 12:13:42PM +0200, Vincent Guittot wrote:
> > +/**
> > + * asym_smt_can_pull_tasks - Check whether the load balancing CPU can pull
> > tasks
> > + * @dst_cpu: Destination CPU of the load balancing
> > + * @sds: Load-balancing data with statistics of the local group
Hi!
On Sat, Aug 14, 2021 at 12:34:15PM -0700, Fāng-ruì Sòng wrote:
> On Sat, Aug 14, 2021 at 5:59 AM Segher Boessenkool
> wrote:
> >
> > On Fri, Aug 13, 2021 at 01:05:08PM -0700, Fangrui Song wrote:
> > > Text relocations are considered very awful by linker developers.
> >
> > By very few linker
On Fri, Aug 27, 2021 at 09:45:37AM +, Christophe Leroy wrote:
> This RFC is to validate the concept of static_call on powerpc.
>
> Highly copied from x86.
>
> It replaces ppc_md.get_irq() which is called at every IRQ, by
> a static call.
The code looks saner, but does it actually improve
On Thu, 19 Aug 2021 13:39:52 +0200, Lukas Bulwahn wrote:
> The script ./scripts/checkkconfigsymbols.py warns on invalid references to
> Kconfig symbols (often, minor typos, name confusions or outdated references).
>
> This patch series addresses all issues reported by
>
On Fri, 20 Aug 2021 20:34:31 +1000, Nicholas Piggin wrote:
> The implict soft-mask table addresses get relocated if they use a
> relative symbol like a label. This is right for code that runs relocated
> but not for unrelocated. The scv interrupt vectors run unrelocated, so
> absolute addresses
On Mon, 16 Aug 2021 11:57:11 -0700, Nathan Chancellor wrote:
> Compiling ppc64le_defconfig with clang-14 shows a modpost warning:
>
> WARNING: modpost: vmlinux.o(.text+0xa74e0): Section mismatch in
> reference from the function xive_setup_cpu_ipi() to the function
> .init.text:xive_request_ipi()
On Wed, 18 Aug 2021 22:05:18 +1000, Michael Ellerman wrote:
> Laurent reported that STRICT_MODULE_RWX was causing intermittent crashes
> on one of his systems:
>
> kernel tried to execute exec-protected page (c00804073278) - exploit
> attempt? (uid: 0)
> BUG: Unable to handle kernel
On Wed, 18 Aug 2021 06:49:29 + (UTC), Christophe Leroy wrote:
> Commit b5efec00b671 ("powerpc/32s: Move KUEP locking/unlocking in C")
> removed the 'isync' instruction after adding/removing NX bit in user
> segments. The reasoning behind this change was that when setting the
> NX bit we don't
Le 27/08/2021 à 15:15, Michael Ellerman a écrit :
On Mon, 16 Aug 2021 14:10:32 +1000, Michael Ellerman wrote:
As reported by lkp, if NUMA=n we see a build error:
arch/powerpc/platforms/pseries/hotplug-cpu.c: In function
'pseries_cpu_hotplug_init':
On Fri, 26 Mar 2021 14:48:08 +0800, Zheng Yongjun wrote:
> Remove duplicated include.
>
>
>
>
Applied to powerpc/next.
[1/1] selftests/powerpc: Remove duplicated include from tm-poison.c
https://git.kernel.org/powerpc/c/6af0b5570b59ce8dd1608a8e48f59eff3f4bdd04
cheers
On Tue, 23 Mar 2021 14:29:05 +0800, Wan Jiabing wrote:
> mmu-hash.h: asm/bug.h has been included at line 12, so remove
> the duplicate one at line 21.
> interrupt.c: asm/interrupt.h has been included at line 12, so
> remove the duplicate one at line 10.
> time.c: linux/sched/clock.h has been
On Sat, 7 Aug 2021 09:02:35 +0800, sxwj...@me.com wrote:
> From: Xiongwei Song
>
> When CONFIG_4xx=y or CONFIG_BOOKE=y, currently in code we reference dsisr
> to get interrupt reasons and reference dar to get excepiton address.
> However, in reference manuals, esr is used for interrupt reasons
On Sun, 15 Aug 2021 15:23:34 -0700, Randy Dunlap wrote:
> Prefer stderr instead of stdout for error messages.
> This is a good practice and can help CI error detecting and
> reporting (0day in this case).
>
>
>
>
> [...]
Applied to powerpc/next.
[1/1] powerpc/head_check: use stdout for error
On Thu, 12 Aug 2021 02:00:34 +1000, Nicholas Piggin wrote:
> This reduces radix guest full entry/exit latency on POWER9 and POWER10
> by 2x.
>
> Nested HV guests should see smaller improvements in their L1 entry/exit,
> but this is also combined with most L0 speedups also applying to nested
>
On Mon, 16 Aug 2021 14:10:32 +1000, Michael Ellerman wrote:
> As reported by lkp, if NUMA=n we see a build error:
>
>arch/powerpc/platforms/pseries/hotplug-cpu.c: In function
> 'pseries_cpu_hotplug_init':
>arch/powerpc/platforms/pseries/hotplug-cpu.c:1022:8: error:
>
On Fri, 13 Aug 2021 13:05:11 -0700, Bill Wendling wrote:
> Object files used to link .tmp_vmlinux.kallsyms1 have many R_PPC64_ADDR64
> relocations in non-SHF_WRITE sections. There are many text relocations (e.g.
> in
> .rela___ksymtab_gpl+* and .rela__mcount_loc sections) in a -pie link and are
>
On Thu, 19 Aug 2021 13:39:52 +0200, Lukas Bulwahn wrote:
> The script ./scripts/checkkconfigsymbols.py warns on invalid references to
> Kconfig symbols (often, minor typos, name confusions or outdated references).
>
> This patch series addresses all issues reported by
>
On Wed, 18 Aug 2021 22:45:54 +0530, Kajol Jain wrote:
> Minor optimization in the 'perf_instruction_pointer' function code by
> making use of stack siar instead of mfspr.
>
>
>
>
Applied to powerpc/next.
[1/3] powerpc/perf: Use stack siar instead of mfspr
On Fri, 13 Aug 2021 13:51:58 +0530, Kajol Jain wrote:
> H_GetPerformanceCounterInfo (0xF080) hcall returns the counter data in the
> result buffer. Result buffer has specific format defined in the PAPR
> specification. One of the field is counter offset and width of the counter
> data returned.
>
On Tue, 17 Aug 2021 14:24:04 +0930, Joel Stanley wrote:
> v2: fix typos, split out mtd fix from savedefconfig patch
>
> The first patch fixes a build warning I noticed when testing something
> unrelated.
>
> The second fixes a regression where the MTD partition support dropped out
> of the
On Thu, 29 Jul 2021 14:13:16 +1000, Jordan Niethe wrote:
> ISA v3.1 removes TM but includes a synthetic implementation for
> backwards compatibility. With this implementation, the tests
> ptrace-tm-spd-gpr and ptrace-tm-gpr should never be able to make any
> forward progress and eventually
On Thu, 19 Aug 2021 10:46:54 +1000, Finn Thain wrote:
> This patch prevents the following sparse warning.
>
> arch/powerpc/kernel/tau_6xx.c:199:1: sparse: sparse: symbol 'tau_work'
> was not declared. Should it be static?
>
>
>
> [...]
Applied to powerpc/next.
[1/1] powerpc/tau: Add 'static'
On Thu, 5 Aug 2021 18:26:13 -0300, Fabiano Rosas wrote:
> This series contains the fix for __kvmhv_copy_tofrom_guest_radix plus
> a couple of changes.
>
> - Patch 1: The fix itself. I thought a smaller fix upfront would be
>better to facilitate any backports.
>
> - Patch 2: Adds a
On Mon, 23 Aug 2021 11:00:37 +0200, Cédric Le Goater wrote:
> These are the remaining patches needed to compile the ppc kernel with
> W=1. Audit issues are now being addressed by Christophe in patch :
>
> [v2] powerpc/audit: Convert powerpc to AUDIT_ARCH_COMPAT_GENERIC
>
On Thu, 19 Aug 2021 14:56:50 +0200, Cédric Le Goater wrote:
> With this small series, I could compile the ppc kernel with W=1. There
> are certainly other configs which will need more fixes but it's a good
> start.
>
> The last 2 patches look hacky. Christophe, could you help with these
> to find
On Thu, 8 Jul 2021 16:49:40 + (UTC), Christophe Leroy wrote:
> Use DEFINE_SHOW_ATTRIBUTE() instead of open coding
> open() and fops.
>
>
>
>
Applied to powerpc/next.
[1/4] powerpc/ptdump: Use DEFINE_SHOW_ATTRIBUTE()
On Tue, 24 Aug 2021 07:56:26 + (UTC), Christophe Leroy wrote:
> Use bcl 20,31,+4 instead of bl in order to preserve link stack.
>
> See commit c974809a26a1 ("powerpc/vdso: Avoid link stack corruption
> in __get_datapage()") for details.
>
>
>
> [...]
Applied to powerpc/next.
[1/1]
On Mon, 23 Aug 2021 08:24:20 + (UTC), Christophe Leroy wrote:
> In those hot functions that are called at every interrupt, any saved
> cycle is worth it.
>
> interrupt_exit_user_prepare() and interrupt_exit_kernel_prepare() are
> called from three places:
> - From entry_32.S
> - From
On Tue, 24 Aug 2021 07:56:35 + (UTC), Christophe Leroy wrote:
> bl;mflr is used at several places to get code position.
>
> Use bcl 20,31,+4 instead of bl in order to preserve link stack.
>
> See commit c974809a26a1 ("powerpc/vdso: Avoid link stack corruption
> in __get_datapage()") for
On Tue, 2 Mar 2021 08:48:11 + (UTC), Christophe Leroy wrote:
> Force the eh flag at 0 on PPC32.
>
Patch 1 applied to powerpc/next.
[1/2] powerpc: Use lwarx/ldarx directly instead of PPC_LWARX/LDARX macros
https://git.kernel.org/powerpc/c/9401f4e46cf6965e23738f70e149172344a01eef
On Fri, 25 Jun 2021 10:58:33 + (UTC), Christophe Leroy wrote:
> When shift is nul, operations remain valid so no test needed.
>
> And 'ret' is unnecessary.
>
> And use IS_ALIGNED() to check alignment, that's more clear.
>
>
> [...]
Applied to powerpc/next.
[1/1] powerpc/syscalls:
On Mon, 23 Aug 2021 06:45:20 + (UTC), Christophe Leroy wrote:
> __NR_exit is nowhere used. On most architectures it was removed by
> commit 135ab6ec8fda ("[PATCH] remove remaining errno and
> __KERNEL_SYSCALLS__ references") but not on powerpc.
>
> powerpc removed __KERNEL_SYSCALLS__ in
On Tue, 17 Aug 2021 16:00:14 + (UTC), Christophe Leroy wrote:
> Today we have:
>
> #ifdef __powerpc64__
> #define user_mode(regs) regs)->msr) >> MSR_PR_LG) & 0x1)
> #else
> #define user_mode(regs) (((regs)->msr & MSR_PR) != 0)
> #endif
>
> [...]
Applied to
On Fri, 20 Aug 2021 05:16:05 + (UTC), Christophe Leroy wrote:
> Copied from commit 89bbe4c798bc ("powerpc/64: indirect function call
> use bctrl rather than blrl in ret_from_kernel_thread")
>
> blrl is not recommended to use as an indirect function call, as it may
> corrupt the link stack
On Fri, 20 Aug 2021 09:39:14 + (UTC), Christophe Leroy wrote:
> Make use of is_32bit_task() and CONFIG_CPU_LITTLE_ENDIAN
> to simplify syscall_get_arch().
>
>
>
>
Applied to powerpc/next.
[1/1] powerpc/audit: Simplify syscall_get_arch()
On Fri, 20 Aug 2021 09:28:19 + (UTC), Christophe Leroy wrote:
> Use is_32bit_task() which already handles CONFIG_COMPAT.
>
>
>
>
Applied to powerpc/next.
[1/1] powerpc/audit: Avoid unneccessary #ifdef in syscall_get_arguments()
On Wed, 18 Aug 2021 08:47:28 + (UTC), Christophe Leroy wrote:
> No need to re-read SPRN_THREAD, we can calculate thread address
> from current (r2).
>
> And remove a reload of value 1 into r4 as r4 is already 1.
>
>
>
> [...]
Applied to powerpc/next.
[1/1] powerpc/32: Remove unneccessary
On Wed, 25 Aug 2021 09:54:47 +0530, Aneesh Kumar K.V wrote:
> Fix make htmldocs related errors with the newly added associativity.rst
> doc file.
>
>
>
>
Applied to powerpc/next.
[1/1] powerpc/doc: Fix htmldocs errors
On Tue, 10 Aug 2021 at 16:41, Ricardo Neri
wrote:
>
> When deciding to pull tasks in ASYM_PACKING, it is necessary not only to
> check for the idle state of the destination CPU, dst_cpu, but also of
> its SMT siblings.
>
> If dst_cpu is idle but its SMT siblings are busy, performance suffers
> if
This RFC is to validate the concept of static_call on powerpc.
Highly copied from x86.
It replaces ppc_md.get_irq() which is called at every IRQ, by
a static call.
When updating the call, we just replace the instruction at the
trampoline address by a relative jump to the function.
For the time
Nathan Chancellor writes:
> On Thu, Aug 26, 2021 at 11:54:17AM -0700, Nathan Chancellor wrote:
>> On Thu, Aug 26, 2021 at 01:21:39PM +1000, Michael Ellerman wrote:
>> > Nathan Chancellor writes:
>> > > On Tue, Apr 13, 2021 at 04:38:10PM +, Christophe Leroy wrote:
>> > >> Using asm goto in
Hi,
> Similarly to the system call change in the previous patch, the mtmsrd to
I don't actually know what patch this was - I assume it's from a series
that has since been applied?
> enable RI can be combined with the mtmsrd to enable EE for interrupts
> which enable the latter, which tends to
On Thu, Jun 24, 2021 at 6:59 PM Claire Chang wrote:
>
> Add the initialization function to create restricted DMA pools from
> matching reserved-memory nodes.
>
> Regardless of swiotlb setting, the restricted DMA pool is preferred if
> available.
>
> The restricted DMA pools provide a basic level
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