Many of the embedded powerpc boards use an array of device names
to register the devices from the device tree. Instead, we can use
of_platform_default_populate(), which will iterate through all the root nodes
and register them.
Signed-off-by: Andy Fleming <aflem...@gmail.
Cyrus uses GPIOs to complete board shutdown/reset.
Add nodes to indicate that support to the device tree.
Signed-off-by: Andy Fleming <aflem...@gmail.com>
---
v2: No changes
arch/powerpc/boot/dts/fsl/cyrus_p5020.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/p
These config changes build:
drivers/power/reset/gpio-poweroff.c
drivers/power/reset/gpio-restart.c
Signed-off-by: Andy Fleming <aflem...@gmail.com>
---
arch/powerpc/configs/fsl-emb-nonhw.config | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/powerpc/configs/fsl-emb-nonhw.con
> On Sep 12, 2016, at 18:54, Scott Wood <scott.w...@nxp.com> wrote:
>
>> On 09/10/2016 05:12 PM, Andy Fleming wrote:
>>
>>
>> On Tuesday, September 6, 2016, Scott Wood <scott.w...@nxp.com
>> <mailto:scott.w...@nxp.com>> wrote:
> On Sep 12, 2016, at 23:47, Scott Wood <scott.w...@nxp.com> wrote:
>
>> On 09/10/2016 05:05 PM, Andy Fleming wrote:
>>
>>
>> On Tuesday, September 6, 2016, Scott Wood <scott.w...@nxp.com
>> <mailto:scott.w...@nxp.com>> wrote:
>>
&
On Tuesday, September 6, 2016, Scott Wood <scott.w...@nxp.com> wrote:
> On 09/06/2016 02:12 PM, Andy Fleming wrote:
> > This sets up the proper config elements for Power and Reset to work
> > properly (using the gpio pins).
> >
> > Signed-off-by: Andy Flemin
On Tuesday, September 6, 2016, Scott Wood <scott.w...@nxp.com> wrote:
> On 09/06/2016 02:12 PM, Andy Fleming wrote:
> > Boards can implement power and reset functionality over gpio using
> > these drivers:
> > drivers/power/reset/gpio-poweroff.c
> > d
This sets up the proper config elements for Power and Reset to work
properly (using the gpio pins).
Signed-off-by: Andy Fleming <aflem...@gmail.com>
---
arch/powerpc/Makefile | 5 +
arch/powerpc/configs/cyrus_basic_defconfig | 9 +
2 files changed, 14 inse
power and reset support, it is reasonable to assume that
halting should also power down the system, unless it has chosen to
pass those calls on to hypervisor.
Signed-off-by: Andy Fleming <aflem...@gmail.com>
---
arch/powerpc/platforms/85xx/corenet_generic.c | 18 ++
1 file c
Cyrus uses GPIOs to complete board shutdown/reset.
Add nodes to indicate that support to the device tree.
Signed-off-by: Andy Fleming <aflem...@gmail.com>
---
arch/powerpc/boot/dts/fsl/cyrus_p5020.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/powerpc/boot/d
Cyrus has gpio pins for power and reset, so we should support them
Andy Fleming (3):
cyrus: Add poweroff/reset support
corenet: Support gpio power/reset for corenet
Cyrus: create a defconfig
arch/powerpc/Makefile | 5 +
arch/powerpc/boot/dts/fsl/cyrus_p5020
The Freescale PAMU can be enabled on both 32 and 64-bit Power
chips. Commit 477ab7a19cec8409e4e2dd10e7348e4cac3c06e5
(iommu: Make more drivers depend on COMPILE_TEST)
restricted PAMU to PPC32. PPC covers both.
Signed-off-by: Andy Fleming <aflem...@gmail.com>
---
v2: Implemented M
The Freescale PAMU can also be enabled on 64-bit power
chips. Commit 477ab7a19cec8409e4e2dd10e7348e4cac3c06e5
(iommu: Make more drivers depend on COMPILE_TEST)
added this false dependency. Fixed it by allowing PPC64, too.
Signed-off-by: Andy Fleming <aflem...@gmail.com>
---
drivers/iommu/K
On Thu, Dec 3, 2015 at 1:19 AM, wrote:
> From: Igal Liberman
>
> This patch adds the Ethernet MAC driver supporting the three
> different types of MACs: dTSEC, tGEC and mEMAC.
>
> Signed-off-by: Igal Liberman
ping? I'd love if this could go in for 4.3
On Wed, Sep 2, 2015 at 1:07 PM, Andy Fleming <aflem...@gmail.com> wrote:
> This board uses a P5020 chip, and boots just fine using
> the corenet_generic code. The device tree is very similar to the
> P5020DS, except that there is
On Thu, Sep 10, 2015 at 8:53 PM, Scott Wood <scottw...@freescale.com> wrote:
> On Thu, 2015-09-10 at 20:51 -0500, Andy Fleming wrote:
>> ping? I'd love if this could go in for 4.3
>
> It's way too late for 4.3.
>
> -Scott
Argh. I was hoping that, as it's a one-l
On Thu, Sep 10, 2015 at 9:13 PM, Scott Wood <scottw...@freescale.com> wrote:
> On Thu, 2015-09-10 at 21:06 -0500, Andy Fleming wrote:
>> On Thu, Sep 10, 2015 at 8:53 PM, Scott Wood <scottw...@freescale.com> wrote:
>> > On Thu, 2015-09-10 at 20:51 -0500, Andy Flemin
This board uses a P5020 or P5040 chip, and boots just fine using
the corenet_generic code. The device tree is very similar to the
P5020DS, except that there is no Flash memory. The environment is,
instead, stored on an MMC card on the motherboard.
Signed-off-by: Andy Fleming <aflem...@gmail.
On Wed, Sep 2, 2015 at 11:53 AM, Scott Wood <scottw...@freescale.com> wrote:
>
> On Wed, 2015-09-02 at 01:36 -0500, Andy Fleming wrote:
> > This board uses a P5020 or P5040 chip, and boots just fine using
> > the corenet_generic code. The device tree is very similar to
This board uses a P5020 chip, and boots just fine using
the corenet_generic code. The device tree is very similar to the
P5020DS, except that there is no Flash memory. The environment is,
instead, stored on an MMC card on the motherboard.
Signed-off-by: Andy Fleming <aflem...@gmail.com>
Cell and PSeries both implemented their own versions of a
cpu_bootable smp_op which do the same thing (well, the PSeries
one has support for more than 2 threads). Copy the PSeries one
to generic code, and rename it smp_generic_cpu_bootable.
Signed-off-by: Andy Fleming aflem...@freescale.com
T4, Cell, powernv, and pseries had the same implementation, so switch
them to use a generic version. A2 apparently had a version, but
removed it at some point, so we remove the declaration, too.
Signed-off-by: Andy Fleming aflem...@freescale.com
---
v3: No change
v2: Removed Change-Id
arch
Cell and PSeries both implemented their own versions of a
cpu_bootable smp_op which do the same thing (well, the PSeries
one has support for more than 2 threads). Copy the PSeries one
to generic code, and rename it smp_generic_cpu_bootable.
Signed-off-by: Andy Fleming aflem...@freescale.com
T4, Cell, powernv, and pseries had the same implementation, so switch
them to use a generic version. A2 apparently had a version, but
removed it at some point, so we remove the declaration, too.
Signed-off-by: Andy Fleming aflem...@freescale.com
---
v2: Removed conflict and Change-Id foo
arch
Cell and PSeries both implemented their own versions of a
cpu_bootable smp_op which do the same thing (well, the PSeries
one has support for more than 2 threads). Copy the PSeries one
to generic code, and rename it smp_generic_cpu_bootable.
Signed-off-by: Andy Fleming aflem...@freescale.com
T4, Cell, powernv, and pseries had the same implementation, so switch
them to use a generic version. A2 apparently had a version, but
removed it at some point, so we remove the declaration, too.
Signed-off-by: Andy Fleming aflem...@freescale.com
Conflicts:
arch/powerpc/platforms/cell
On Feb 27, 2012, at 6:25 AM, Paul Gortmaker wrote:
The mpc836x_mds platform has been broken since the commit
6fe3264945ee63292cdfb27b6e95bc52c603bb09
[...]
---
[Andy: There may be other boards that could be having this problem
git grep -l enet.*ucc arch/powerpc/boot/dts/|xargs grep
On Fri, Feb 17, 2012 at 1:20 PM, Tabi Timur-B04825 b04...@freescale.com wrote:
On Tue, Feb 14, 2012 at 2:37 AM, Prabhakar Kushwaha
prabha...@freescale.com wrote:
Applied on git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
branch next
This is actually a false statement.
On Dec 15, 2011, at 11:51 AM, Timur Tabi wrote:
Augment mdiobus_alloc() to take a parameter indicating the number of extra
bytes to allocate for private data. Almost all callers of mdiobus_alloc()
separately allocate a private data structure. By allowing mdiobus_alloc()
to allocate extra
the scanning code,
but it turns out some of the newer SoCs have started to omit
the tbi-phy node when SGMII is not being used. As such, these
devices will now fail unless we add a tbi-phy node to the first
mdio controller.
Signed-off-by: Andy Fleming aflem...@freescale.com
---
This requires fsl_pq_mdio
arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi | 5 +
arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi | 5 +
2 files changed, 10 insertions(+), 0 deletions(-)
This doesn't seem correct, meaning this should really be in the board .dts
not in the IP.
I think the driver should check and
dts file.
This fixes an issue where p1/p2 boards would fail to bring up
Ethernet, due to not finding a tbi node.
Signed-off-by: Andy Fleming aflem...@freescale.com
---
arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi |5 +
arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi |5 +
2 files changed
. A separate patch has been submitted to add such
a node to the device trees for boards which were missing that node.
Signed-off-by: Andy Fleming aflem...@freescale.com
---
drivers/net/ethernet/freescale/fsl_pq_mdio.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git
On Nov 17, 2011, at 11:30 AM, Maynard Johnson wrote:
Notice the first
if (!cur_cpu_spec-oprofile_cpu_type)
return -ENODEV;
if (firmware_has_feature(FW_FEATURE_ISERIES))
return -ENODEV;
For my e300c2
On Nov 14, 2011, at 11:17 PM, Baruch Siach wrote:
Hi Andy,
On Mon, Nov 14, 2011 at 09:04:47PM +, Fleming Andy-AFLEMING wrote:
Well, this got applied quickly, so I guess I can't NAK, but this requires
discussion.
On Nov 14, 2011, at 0:22, Baruch Siach bar...@tkos.co.il wrote:
Fix this by moving the of_mdiobus_register() call earlier.
Cc: Andy Fleming aflem...@freescale.com
Signed-off-by: Baruch Siach bar...@tkos.co.il
---
drivers/net/ethernet/freescale/fsl_pq_mdio.c | 14 +++---
1 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers
Sounds good to me.
Acked-by: Andy Fleming aflem...@freescale.com
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev
I believe support was disabled due to issues with earlier versions of
the board/processor. At worst, adding the ports back into the device
tree should result in enabling ports that don't work on older systems,
so the default should be to enable them.
Signed-off-by: Andy Fleming aflem
On Oct 13, 2009, at 1:57 AM, David Miller wrote:
From: Anton Vorontsov avoront...@ru.mvista.com
Date: Mon, 12 Oct 2009 20:00:00 +0400
Here are few patches that add support for hibernation for gianfar
driver.
Technically, we could just do gfar_close() and then gfar_enet_open()
sequence to
On Mon, Aug 24, 2009 at 11:10 AM, Torsten Fleischer
to-fleisc...@t-online.de wrote:
Hello everyone,
I have the Freescale's MPC8313erdb eval board and run the latest stable
linux
kernel version (linux-2.6.30.5).
After creating a VLAN device (e.g. eth0.2) a VLAN tag is also inserted into
On Jun 24, 2009, at 1:27 PM, Anton Vorontsov wrote:
It appears that gianfar driver has the same problem[1] that I
just fixed for ucc_geth.
NFS boot using 10/half link takes about 10 minutes to complete:
The symptoms were observed on MPC8379E-RDB boards (eTSEC). Although
I didn't find
*Technically*, full
duplex is required for GMII, as GMII is used only for gigabit.
However,
we've been treating the GMII interface type as an indicator that
the PHY
*has* a GMII connection to the NIC. When gianfar detects the speed
is
10/100 it switches to the compatible MII interface
On Mar 31, 2009, at 3:27 AM, Grant Likely wrote:
From: Grant Likely grant.lik...@secretlab.ca
Add phy_connect_direct() and phy_attach_direct() functions so that
drivers can use a pointer to the phy_device instead of trying to
determine
the phy's bus_id string.
This patch is useful for OF
On Mar 31, 2009, at 3:27 AM, Grant Likely wrote:
From: Grant Likely grant.lik...@secretlab.ca
This patch simplifies the driver by making use of more common code.
Signed-off-by: Grant Likely grant.lik...@secretlab.ca
---
drivers/net/gianfar.c | 103 +
Other than the previous comments, all appropriate patches can be marked:
Acked-by: Andy Fleming aflem...@freescale.com
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
, and thus _probe() fails with
-ENODEV status.
Fix this by adding fsl,gianfar-tbi to the list of known Gianfar
MDIO buses.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
Acked-by: Andy Fleming aflem...@freescale.com
___
Linuxppc-dev mailing list
comment)
- full email address in signed off line
Signed-off-by: Rini van Zetten r...@arvoo.nl
Good catch. Does this solve the bug you reported earlier?
Acked-by: Andy Fleming aflem...@freescale.com
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
On Tue, Feb 24, 2009 at 6:09 AM, Octavian Purdila opurd...@ixiacom.com wrote:
Signed-off-by: Octavian Purdila opurd...@ixiacom.com
---
arch/powerpc/kernel/cputable.c | 6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kernel/cputable.c
rx_register() callback:
1. In register_vlan_dev() only on a newly created group;
2. In unregister_vlan_dev() only if the group becomes empty.
Thus the check in the gianfar driver isn't needed.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
Acked-by: Andy Fleming aflem...@freescale.com
that broke the TBI support
was in the net-next-2.6 tree.
That explains why nobody noticed the issue.
Yeah, I dropped the ball. I saw the patch go in, thought that might
break something, but I didn't find time to look into it. Thanks for
finding and reverting this bug.
Acked-by: Andy Fleming
manuals
didn't
require the explicitly clearing but has since been found it that it is
needed.
Signed-off-by: Li Yang le...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
Acked-by: Andy Fleming aflem...@freescale.com
___
Linuxppc-dev
On Oct 13, 2008, at 12:19, Adrian Bunk wrote:
This patch fixes the following build error caused by
commit ed94493fb38a665cebcf750dfabe8a6dd13e136f
(mv643xx_eth: convert to phylib):
-- snip --
...
Building modules, stage 2.
MODPOST 1280 modules
ERROR: genphy_restart_aneg
was once a spinlock but got changed into a mutex via
commit 35b5f6b1a aka [PHYLIB: Locking fixes for PHY I/O potentially
sleeping]
Signed-off-by: Sebastian Siewior [EMAIL PROTECTED]
---
Looks good to me. Thanks for taking care of this.
Acked-by: Andy Fleming [EMAIL PROTECTED
On Jul 3, 2008, at 10:23, Nate Case wrote:
On Wed, 2008-07-02 at 17:53 -0500, Nate Case wrote:
I'm looking at gfar_configure_serdes() and I'm at a loss as to why
this
is always called when the MAC is in SGMII mode. It looks like it
assumes the use of TBI for some reason. On my board it's
On Jun 3, 2008, at 10:31, Kumar Gala wrote:
On Jun 3, 2008, at 10:18 AM, Scott Wood wrote:
If you just #ifdef PHYLIB, then things will break if the user does
this:
make config, GIANFAR=PHYLIB=n
make zImage
make config, GIANFAR=PHYLIB=m
make modules
And the cause of the failure will not
On Jun 3, 2008, at 12:00, Adrian Bunk wrote:
On Tue, Jun 03, 2008 at 09:47:19AM -0500, Kumar Gala wrote:
How is this as a fix.
- k
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/
platforms/85xx/Kconfig
index 7ff29d5..9e5c884 100644
---
On Jun 2, 2008, at 14:30, Kumar Gala wrote:
On Jun 2, 2008, at 11:39 AM, Jeff Garzik wrote:
If you really think the core of the phylib should be able to be
built as a module than we could possibly add function pointers to
phy_dev to do the real phy_read()/phy_write() and change phy_read/
Mostly having to do with not marking things __iomem. And some failure
to use appropriate accessors to read MMIO regs.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
arch/powerpc/sysdev/qe_lib/qe.c |6 +++---
arch/powerpc/sysdev/qe_lib/ucc.c |6 +++---
arch/powerpc/sysdev
I've tried to tune gianfar driver in various ways... and it gave
some positive results with this patch:
diff --git a/drivers/net/gianfar.h b/drivers/net/gianfar.h
index fd487be..b5943f9 100644
--- a/drivers/net/gianfar.h
+++ b/drivers/net/gianfar.h
@@ -123,8 +123,8 @@ extern const char
Now back to the first an bigger problem :
currently, I have an old U-boot and I have written myself a dts
file.
Problem is : ethernet does not work, but that's not a mac-address
problem,
but something else that I do not understand yet. The symptom is I get
ip route add default
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
arch/powerpc/platforms/85xx/mpc85xx_mds.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 25f8bc7..12f68ab 100644
--- a/arch
Mostly having to do with not marking things __iomem. And some failure
to use appropriate accessors to read MMIO regs.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
arch/powerpc/sysdev/qe_lib/qe.c |6 ++--
arch/powerpc/sysdev/qe_lib/ucc.c |6 ++--
arch/powerpc/sysdev
-by: Andy Fleming [EMAIL PROTECTED]
---
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 119 +
1 files changed, 119 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 12f68ab..9ae29c5 100644
-by: Andy Fleming [EMAIL PROTECTED]
---
arch/powerpc/sysdev/fsl_soc.c | 84 ++--
1 files changed, 38 insertions(+), 46 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 3a7054e..52f52b2 100644
--- a/arch/powerpc/sysdev
On May 2, 2008, at 18:49, Olof Johansson wrote:
Hi,
On Fri, May 02, 2008 at 01:03:42PM -0500, Andy Fleming wrote:
+static int __init board_fixups(void)
+{
+ char phy_id[BUS_ID_SIZE];
+ char *compstrs[2] = {fsl,gianfar-mdio, fsl,ucc-mdio};
+ struct device_node *mdio
-by: Andy Fleming [EMAIL PROTECTED]
---
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 119 +
1 files changed, 119 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 12f68ab..43a459f 100644
On May 2, 2008, at 13:37, Timur Tabi wrote:
Andy Fleming wrote:
int ucc_fast_init(struct ucc_fast_info * uf_info, struct
ucc_fast_private ** uccf_ret)
{
struct ucc_fast_private *uccf;
- struct ucc_fast *uf_regs;
+ struct ucc_fast __iomem *uf_regs;
u32 gumr
-by: Andy Fleming [EMAIL PROTECTED]
---
Jeff, copying you so you can see what code uses the board fixup patch. Also,
Kumar, note that this patch is utterly useless without the patch sent to netdev:
Add support for board-level PHY fixups.
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 114
The old code assumed there was only one, but the 8572 actually has 3.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
arch/powerpc/sysdev/fsl_soc.c | 86 ++--
1 files changed, 39 insertions(+), 47 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_soc.c b
On Apr 11, 2008, at 10:31, Scott Wood wrote:
On Thu, Apr 10, 2008 at 06:34:31PM -0500, Andy Fleming wrote:
+ /*
+* This is mildly evil, but so is our hardware for doing this.
+* Also, we have to cast back to struct gfar_mii because of
+* definition weirdness
On Apr 10, 2008, at 12:51, Paul Gortmaker wrote:
This patch series consists of some minor cleanups that eventually
allow us to implement a dynamic assignment of the gianfar TBIPA.
This was the implementation that Andy and Scott indicated was
the most desireable solution at the bottom of this
PHY
configuration code then trusts that the value in TBIPA is either safe, or
doesn't matter (ie - it's not an active bus with other PHYs).
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
I think this should go in, but I'd like to see some testing first. I don't
have hardware which is affected
and the users to make that
determination.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
This needs to go in for 2.6.25 if possible. It breaks the build
for some boards, and would cause them to crash or perform
indefinite operations.
arch/powerpc/platforms/Kconfig |1 -
arch
and the users to make that
determination.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
Ugh. The previous version was a little hasty. Needed to base off
PPC_83xx rather than 83xx
arch/powerpc/platforms/Kconfig |1 -
arch/powerpc/platforms/Kconfig.cputype |7 ++-
2 files
On Feb 22, 2008, at 03:50, Philippe De Muyter wrote:
Dear list,
I have just compiled linux-2.6.24 for a MPC8540 target using a MPC8540
specific gcc.
I then got tan infinity of SPE used in kernel messages. Looking
at the
sources I ifdeffed out the printk call in KernelSPE, and I now
On Feb 4, 2008, at 17:14, Andy Fleming wrote:
The e300 c3 and c4 variants support hardware performance monitor
counters which
are identical to those found in the e500.
Please ignore. I will send a new version that includes all the
changes I apparently missed a change I had already
-by: Andy Fleming [EMAIL PROTECTED]
---
arch/powerpc/kernel/cputable.c |4 +-
arch/powerpc/kernel/pmc.c |2 +-
arch/powerpc/oprofile/Makefile |2 +-
arch/powerpc/oprofile/common.c |6
On Jan 9, 2008, at 13:35, Siva Prasad wrote:
Hi,
After booting, my MPC8641 based board keeps printing “Trying 10/
HALF” for ever. I am unable to use the Ethernet, even though there
are interrupts occuring. Based on /proc/interrupts, both tx and rx
interrupt count is increasing, and
key:too big
Power Management:off
Signed-off-by: David Woodhouse [EMAIL PROTECTED]
d'oh!
Acked-by: Andy Fleming [EMAIL PROTECTED]
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 9bc1177..7c9e6e3 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
device's release function, thus
we're getting rid of this badness.
Also small hidden bug fixed, hope none other introduced. ;-)
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
Acked-by: Andy Fleming [EMAIL PROTECTED]
Andy
___
Linuxppc-dev mailing
On Jul 18, 2007, at 02:00, pradeep singh wrote:
On 7/18/07, Andy Fleming [EMAIL PROTECTED] wrote:
- if (err)
+ if (err 0)
return err;
but would that mean, if phy_read returns 0 it is a success?
Yes. phy_read() returns a 32-bit value
://opensource.freescale.com/pub/scm/linux-2.6-85xx.git netdev
Andy Fleming (4):
Fix Vitesse 824x PHY interrupt acking
Add phy-connection-type to gianfar nodes
Fix Vitesse RGMII-ID support
Fix RGMII-ID handling in gianfar
Documentation/powerpc/booting-without-of.txt |6 +++
arch
condition. So rather than change the PHY Lib, we change
the Vitesse driver so it always clears interrupts before disabling them.
Further, the ack function only clears the interrupt if interrupts are
enabled.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
Signed-off-by: York Sun [EMAIL PROTECTED]
Acked
The TSEC/eTSEC automatically detect their PHY interface type, unless
the type is RGMII-ID (RGMII with internal delay). In that situation,
it just detects RGMII. In order to fix this, we need to pass in rgmii-id
if that is the connection type.
Signed-off-by: Andy Fleming [EMAIL PROTECTED
The Vitesse PHY on the 8641D needs to be set up with internal delay to
work in RGMII mode. So we add skew when it is set to RGMII_ID mode.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
Signed-off-by: Haruki Dai [EMAIL PROTECTED]
Signed-off-by: Haiying Wang [EMAIL PROTECTED]
---
drivers/net/phy
85 matches
Mail list logo