Nicholas Piggin writes:
> Radix guest support will be removed from the P7/8 path, so disallow
> dependent threads mode on P9.
>
> Signed-off-by: Nicholas Piggin
> ---
> arch/powerpc/include/asm/kvm_host.h | 1 -
> arch/powerpc/kvm/book3s_hv.c| 27 +--
> 2 files
On 3/15/21 5:36 PM, Christophe Leroy wrote:
Le 25/11/2020 à 06:16, Aneesh Kumar K.V a écrit :
Reviewed-by: Sandipan Das
Signed-off-by: Aneesh Kumar K.V
PPC_HAVE_KUAP is only selected on book3s/64 when PPC_RADIX_MMU is
selected. Is that normal ?
I guess we missed fixing
the page table update to use mmu gather
interface instead of direct tlb flush. mmu gather allows the architecture
to manage page walk cache invalidate separately.
Changes from V1:
* Rebase to recent upstream
* Fix build issues with tlb_gather_mmu changes
Aneesh Kumar K.V (6):
selftest/mremap_test
, Destination PUD-aligned
mremap time:26851ns
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/platforms/Kconfig.cputype | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/platforms/Kconfig.cputype
b/arch/powerpc/platforms/Kconfig.cputype
index 3ce907523b1e..2e666e569fdf
With a large mmap map size, we can overlap with the text area and using
MAP_FIXED results in unmapping that area. Switch to MAP_FIXED_NOREPLACE
and handle the EEXIST error.
Signed-off-by: Aneesh Kumar K.V
---
tools/testing/selftests/vm/mremap_test.c | 5 +++--
1 file changed, 3 insertions(+), 2
gather to flush
TLB and mark tlb.freed_tables = 1. No page table pages need to be freed here.
With this the tlb flush is done outside page table lock (ptl).
Signed-off-by: Aneesh Kumar K.V
---
mm/mremap.c | 33 +
1 file changed, 29 insertions(+), 4 deletions(-)
diff
Architectures like ppc64 can only support faster mremap only with radix
translation. Hence allow a runtime check w.r.t support for fast mremap.
Signed-off-by: Aneesh Kumar K.V
---
arch/arc/include/asm/tlb.h | 5 +
arch/arm64/include/asm/tlb.h | 6 ++
arch/powerpc/include/asm
-by: Aneesh Kumar K.V
---
mm/mremap.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/mm/mremap.c b/mm/mremap.c
index ec8f840399ed..574287f9bb39 100644
--- a/mm/mremap.c
+++ b/mm/mremap.c
@@ -26,6 +26,7 @@
#include
#include
+#include
#include "internal.h"
Instead of hardcoding 4K page size fetch it using sysconf(). For the performance
measurements test still assume 2M and 1G are hugepage sizes.
Signed-off-by: Aneesh Kumar K.V
---
tools/testing/selftests/vm/mremap_test.c | 113 ---
1 file changed, 61 insertions(+), 52
] io_worker_handle_work+0x248/0x4a0
[c0001c4efd30] [c06746e8] io_wqe_worker+0x228/0x2a0
[c0001c4efda0] [c019d994] kthread+0x1b4/0x1c0
Cc: Zorro Lang
Cc: Jens Axboe
Cc: Christophe Leroy
Cc: Nicholas Piggin
Signed-off-by: Aneesh Kumar K.V
---
Changes from v2:
* Fix build
] [c0674268] io_worker_handle_work+0x248/0x4a0
[c0001c4efd30] [c06746e8] io_wqe_worker+0x228/0x2a0
[c0001c4efda0] [c019d994] kthread+0x1b4/0x1c0
Cc: Zorro Lang
Cc: Jens Axboe
Cc: Christophe Leroy
Cc: Nicholas Piggin
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm
s
> port_srp xts vmx_crypto
> [ 530.708049] CPU: 13 PID: 5587 Comm: io_wqe_worker-0 Not tainted 5.11.0-r
ok so we call current_thread_amr() with kthread.
commit ae33fb7b069ebb41e32f55ae397c887031e47472
Author: Aneesh Kumar K.V
Date: Fri Feb 5 19:11:49 2021 +0530
The other stack that mat
space. But, the AMR value is
thread-specific and we inherit the address space and not thread
access restrictions. Because of this ignore AMR value when accessing
userspace via kernel thread.
Cc: Zorro Lang
Cc: Jens Axboe
Cc: Christophe Leroy
Cc: Nicholas Piggin
Signed-off-by: Aneesh Kumar K.V
THP
via sysfs file (/sys/kernel/mm/transparent_hugepage/enabled). Hence
differentiate between hardware/firmware lacking support vs user-controlled
disable of THP and prevent a huge fault if the hardware lacks hugepage
support.
Signed-off-by: Aneesh Kumar K.V
---
include/linux/huge_mm.h |
On 2/4/21 11:27 PM, Zorro Lang wrote:
On Thu, Feb 04, 2021 at 10:31:59PM +0530, Aneesh Kumar K.V wrote:
On 2/4/21 10:23 PM, Jens Axboe wrote:
On 2/1/21 11:30 PM, Aneesh Kumar K.V wrote:
On 2/2/21 11:50 AM, Christophe Leroy wrote:
Le 02/02/2021 à 07:16, Aneesh Kumar K.V a écrit :
On 2/2/21
On 2/4/21 10:23 PM, Jens Axboe wrote:
On 2/1/21 11:30 PM, Aneesh Kumar K.V wrote:
On 2/2/21 11:50 AM, Christophe Leroy wrote:
Le 02/02/2021 à 07:16, Aneesh Kumar K.V a écrit :
On 2/2/21 11:32 AM, Christophe Leroy wrote:
Le 02/02/2021 à 06:55, Aneesh Kumar K.V a écrit :
Aneesh Kumar K.V
/powernv/npu: Remove NPU DMA ops")
and commit 25b2995a35b6 ("mm: remove MEMORY_DEVICE_PUBLIC support")
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/mem.c | 22 -
arch/powerpc/platforms/powernv/memtrace.c | 29 +++
2 files changed,
This just add a better name for PG_arch_1. No functional change in this patch.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/cacheflush.h | 6 ++
arch/powerpc/include/asm/kvm_ppc.h| 4 ++--
arch/powerpc/mm/book3s64/hash_utils.c | 4 ++--
arch/powerpc/mm/mem.c
support
COHERENT_ICACHE.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/hugetlb.h | 2 --
arch/powerpc/mm/hugetlbpage.c | 18 --
arch/powerpc/mm/mem.c | 28 ++--
3 files changed, 22 insertions(+), 26 deletions(-)
diff --git
On 2/2/21 6:59 PM, Li Xinhai wrote:
what is the overall purpose of this patch set? maybe need a cover
letter?
The goal of the patch series was to enable MOVE_PMD/PUD on ppc64. But
the series itself achieves that by fixing the existing code rather than
adding changes to arch/ppc64. With
On 2/2/21 4:17 PM, Peter Zijlstra wrote:
On Tue, Feb 02, 2021 at 02:41:13PM +0530, Aneesh Kumar K.V wrote:
pmd/pud_populate is the right interface to be used to set the respective
page table entries. Some architectures do assume that set_pmd/pud_at
can only be used to set a hugepage PTE. Since
, Destination PUD-aligned
mremap time:26851ns
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/platforms/Kconfig.cputype | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/platforms/Kconfig.cputype
b/arch/powerpc/platforms/Kconfig.cputype
index 3ce907523b1e..2e666e569fdf
Architectures like ppc64 can only support faster mremap only with radix
translation. Hence allow a runtime check w.r.t support for fast mremap.
Signed-off-by: Aneesh Kumar K.V
---
arch/arm64/include/asm/tlb.h | 6 ++
arch/powerpc/include/asm/tlb.h | 6 ++
arch/x86/include/asm/tlb.h
With a large mmap map size, we can overlap with the text area and using
MAP_FIXED results in unmapping that area. Switch to MAP_FIXED_NOREPLACE
and handle the EEXIST error.
Signed-off-by: Aneesh Kumar K.V
---
tools/testing/selftests/vm/mremap_test.c | 5 +++--
1 file changed, 3 insertions(+), 2
gather to flush
TLB and mark tlb.freed_tables = 1. No page table pages need to be freed here.
With this the tlb flush is done outside page table lock (ptl).
Signed-off-by: Aneesh Kumar K.V
---
mm/mremap.c | 33 +
1 file changed, 29 insertions(+), 4 deletions(-)
diff
Instead of hardcoding 4K page size fetch it using sysconf(). For the performance
measurements test still assume 2M and 1G are hugepage sizes.
Signed-off-by: Aneesh Kumar K.V
---
tools/testing/selftests/vm/mremap_test.c | 113 ---
1 file changed, 61 insertions(+), 52
pmd/pud_populate is the right interface to be used to set the respective
page table entries. Some architectures do assume that set_pmd/pud_at
can only be used to set a hugepage PTE. Since we are not setting up a hugepage
PTE here, use the pmd/pud_populate interface.
Signed-off-by: Aneesh Kumar
On 2/2/21 11:50 AM, Christophe Leroy wrote:
Le 02/02/2021 à 07:16, Aneesh Kumar K.V a écrit :
On 2/2/21 11:32 AM, Christophe Leroy wrote:
Le 02/02/2021 à 06:55, Aneesh Kumar K.V a écrit :
Aneesh Kumar K.V writes:
Nicholas Piggin writes:
Excerpts from Michael Ellerman's message
On 2/2/21 11:32 AM, Christophe Leroy wrote:
Le 02/02/2021 à 06:55, Aneesh Kumar K.V a écrit :
Aneesh Kumar K.V writes:
Nicholas Piggin writes:
Excerpts from Michael Ellerman's message of January 30, 2021 9:22 pm:
Christophe Leroy writes:
+Aneesh
Le 29/01/2021 à 07:52, Zorro Lang
Aneesh Kumar K.V writes:
> Nicholas Piggin writes:
>
>> Excerpts from Michael Ellerman's message of January 30, 2021 9:22 pm:
>>> Christophe Leroy writes:
>>>> +Aneesh
>>>>
>>>> Le 29/01/2021 à 07:52, Zorro Lang a é
simply move the AMR into the mm, precisely because it's
>> per thread, not per mm.
>>
>> So TBH I don't know how we're going to fix this.
>>
>> I guess we could return AMR=unblocked for kernel threads, but that's
>> arguably a bug because it allows a proces
eviewed-by: Aneesh Kumar K.V
> Reported-by: Eirik Fuller
> Fixes: 1addb6444791 ("selftests/powerpc: Add test for execute-disabled pkeys")
> Fixes: c27f2fd1705a ("selftests/powerpc: Add test for pkey siginfo
> verification")
> Signed-off-by: Sandipan Das
> --
The kernel call these functions on cpu online and hence they should
not be marked __init.
Fixes: 3b47b7549ead ("powerpc/book3s64/kuap: Move KUAP related function outside
radix")
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/book3s64/pkeys.c | 4 ++--
1 file changed, 2 insert
Kernel call these functions on cpu online and hence they should
not be marked __init.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/book3s32/mmu.c | 4 ++--
arch/powerpc/mm/book3s64/pkeys.c | 4 ++--
arch/powerpc/mm/init-common.c| 2 +-
arch/powerpc/mm/nohash/8xx.c | 4 ++--
4
eturning true when [start;end[ is not fully
> contained inside [floor;ceiling[
>
Reviewed-by: Aneesh Kumar K.V
> Signed-off-by: Christophe Leroy
> ---
> arch/powerpc/mm/hugetlbpage.c | 56 ---
> 1 file changed, 19 insertions(+), 37 deletions(-
Cédric Le Goater writes:
> The 'chip_id' field of the XIVE CPU structure is used to choose a
> target for a source located on the same chip when possible. This field
> is assigned on the PowerNV platform using the "ibm,chip-id" property
> on pSeries under KVM when NUMA nodes are defined but it
Christophe Leroy writes:
> search_exception_tables() is an heavy operation, we have to avoid it.
> When KUAP is selected, we'll know the fault has been blocked by KUAP.
> Otherwise, it behaves just as if the address was already in the TLBs
> and no fault was generated.
>
> Signed-off-by:
Christophe Leroy writes:
> Le 08/12/2020 à 14:00, Aneesh Kumar K.V a écrit :
>> On 12/8/20 2:07 PM, Christophe Leroy wrote:
>>> search_exception_tables() is an heavy operation, we have to avoid it.
>>> When KUAP is selected, we'll know the fault has been blo
On 12/8/20 2:07 PM, Christophe Leroy wrote:
search_exception_tables() is an heavy operation, we have to avoid it.
When KUAP is selected, we'll know the fault has been blocked by KUAP.
Otherwise, it behaves just as if the address was already in the TLBs
and no fault was generated.
Signed-off-by:
erpc/mm: Detect
bad KUAP faults") to catch userspace access incorrectly blocked by AMR. Hence
retain the full stack dump there even with hash translation. Also, add a comment
explaining the difference between hash and radix.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book
Alexey Kardashevskiy writes:
> When interrupted in raw_copy_from_user()/... after user memory access
> is enabled, a nested handler may also access user memory (perf is
> one example) and when it does so, it calls prevent_read_from_user()
> which prevents the upper handler from accessing user
Don't enable KUEP/KUAP if we support less than or equal to 3 keys.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/kup.h | 3 +++
arch/powerpc/mm/book3s64/pkeys.c | 33
arch/powerpc/mm/init-common.c| 4 ++--
3 files changed, 26 insertions
On 12/1/20 6:17 PM, Pankaj Gupta wrote:
Tha patch implements SCM async-flush hcall and sets the
ND_REGION_ASYNC capability when the platform device tree
has "ibm,async-flush-required" set.
So, you are reusing the existing ND_REGION_ASYNC flag for the
hypercall based async flush with device
"Aneesh Kumar K.V" writes:
> This patch series implements KUAP and KUEP with hash translation mode using
> memory keys. The kernel now uses memory protection key 3 to control access
> to the kernel. Kernel page table entries are now configured with key 3.
> Access t
Nicholas Piggin writes:
.
+#endif
> +DECLARE_INTERRUPT_HANDLER(emulation_assist_interrupt);
> +DECLARE_INTERRUPT_HANDLER_RAW(do_slb_fault);
Can we add comments here explaining why some of these handlers need to remain
RAW()?
> +DECLARE_INTERRUPT_HANDLER(do_bad_slb_fault);
>
Nicholas Piggin writes:
> Similar to the previous patch this makes interrupt handler function
> types more regular so they can be wrapped with the next patch.
>
> bad_page_fault and do_break are not performance critical.
>
Reviewed-by: Aneesh Kumar K.V
> [32s DABR code fro
ppers. Explicit arguments could
> be added for performance but that would require more wrapper macro
> variants.
Reviewed-by: Aneesh Kumar K.V
>
> Signed-off-by: Nicholas Piggin
> ---
> arch/powerpc/include/asm/asm-prototypes.h | 4 ++--
> arch/powerpc/include/asm/
Nicholas Piggin writes:
> The page fault handling still has some complex logic particularly around
> hash table handling, in asm. Implement this in C instead.
>
Reviewed-by: Aneesh Kumar K.V
> Signed-off-by: Nicholas Piggin
> ---
> arch/powerpc/include/asm/book3s/6
Radix use AMR Key 0 and hash translation use AMR key 3.
Reviewed-by: Sandipan Das
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/kup.h | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/include/asm/book3s/64/kup.h
b/arch/powerpc
2489.30 cycles
With smap/smep enabled:
Without patch:
1017.26 ns2950.36 cycles
With patch:
1021.51 ns2962.44 cycles
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/kup.h | 63 +---
arch/powerpc/kernel/entry_64.S | 2
Make KUAP/KUEP key a variable and also check whether the platform
limit the max key such that we can't use the key for KUAP/KEUP.
Signed-off-by: Aneesh Kumar K.V
---
.../powerpc/include/asm/book3s/64/hash-pkey.h | 23 +--
arch/powerpc/include/asm/book3s/64/pkeys.h| 1 +
arch/powerpc/mm
Reviewed-by: Sandipan Das
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/book3s64/pkeys.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/mm/book3s64/pkeys.c b/arch/powerpc/mm/book3s64/pkeys.c
index 9f01c86d2beb..4a3aeddbe0c7 100644
--- a/arch/powerpc
Reviewed-by: Sandipan Das
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/book3s64/pkeys.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/mm/book3s64/pkeys.c b/arch/powerpc/mm/book3s64/pkeys.c
index 8d1bf2f18ca4..9f01c86d2beb 100644
--- a/arch/powerpc
Radix use IAMR Key 0 and hash translation use IAMR key 3.
Reviewed-by: Sandipan Das
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/kup.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/book3s/64/kup.h
b/arch/powerpc/include
With hash translation use DSISR_KEYFAULT to identify a wrong access.
With Radix we look at the AMR value and type of fault.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/32/kup.h | 4 +--
arch/powerpc/include/asm/book3s/64/kup.h | 27
arch
If an application has configured address protection such that read/write is
denied using pkey even the kernel should receive a FAULT on accessing the same.
This patch use user AMR value stored in pt_regs.amr to achieve the same.
Reviewed-by: Sandipan Das
Signed-off-by: Aneesh Kumar K.V
We will remove thread.amr/iamr/uamor in a later patch
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/kernel/ptrace/ptrace-view.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/ptrace/ptrace-view.c
b/arch/powerpc/kernel/ptrace/ptrace-view.c
Now that kernel correctly store/restore userspace AMR/IAMR values, avoid
manipulating AMR and IAMR from the kernel on behalf of userspace.
Reviewed-by: Sandipan Das
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/kup.h | 21 +
arch/powerpc/include/asm/processor.h
On fork, we inherit from the parent and on exec, we should switch to
default_amr values.
Also, avoid changing the AMR register value within the kernel. The kernel now
runs with
different AMR values.
Reviewed-by: Sandipan Das
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm
Child thread.kuap value is inherited from the parent in copy_thread_tls. We
still
need to make sure when the child returns from a fork in the kernel we start
with the kernel
default AMR value.
Reviewed-by: Sandipan Das
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/kernel/process.c | 10
-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/kup.h | 222 +++
arch/powerpc/include/asm/ptrace.h| 5 +-
arch/powerpc/kernel/asm-offsets.c| 2 +
arch/powerpc/kernel/entry_64.S | 6 +-
arch/powerpc/kernel/exceptions-64s.S | 4
In later patches during exec, we would like to access default regs.amr to
control access to the user mapping. Having thread.regs set early makes the
code changes simpler.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/thread_info.h | 2 --
arch/powerpc/kernel/process.c
.
Reviewed-by: Sandipan Das
Signed-off-by: Aneesh Kumar K.V
---
.../powerpc/include/asm/book3s/64/hash-pkey.h | 25 ++-
arch/powerpc/include/asm/book3s/64/hash.h | 2 +-
arch/powerpc/include/asm/book3s/64/mmu-hash.h | 1 +
arch/powerpc/include/asm/mmu_context.h| 2 +-
arch
to BOOK3S_64
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/kup.h | 18 +-
arch/powerpc/include/asm/mmu.h | 24 ++--
arch/powerpc/mm/book3s64/pkeys.c | 4 ++--
3 files changed, 25 insertions(+), 21 deletions(-)
diff --git
The next set of patches adds support for kuep with hash translation.
In preparation for that rename/move kuap related functions to
non radix names.
Also set MMU_FTR_KUEP and add the missing isync().
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/kup.h | 1 +
arch
The next set of patches adds support for kuap with hash translation.
In preparation for that rename/move kuap related functions to
non radix names.
Signed-off-by: Aneesh Kumar K.V
---
.../asm/book3s/64/{kup-radix.h => kup.h} | 6 ++---
arch/powerpc/include/asm/kup.h|
The config CONFIG_PPC_PKEY is used to select the base support that is
required for PPC_MEM_KEYS, KUAP, and KUEP. Adding this dependency
reduces the code complexity(in terms of #ifdefs) and enables us to
move some of the initialization code to pkeys.c
Signed-off-by: Aneesh Kumar K.V
CPUs supporting radix translation.
The old code was not updating UAMOR if we had smap disabled and smep enabled.
This change handles that case.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/book3s64/radix_pgtable.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
ignore access to them and for mfstpr return
0 indicating no AMR/IAMR update is no allowed.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/kvm/book3s_emulate.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/powerpc/kvm/book3s_emulate.c
b/arch/powerpc/kvm/book3s_emulate.c
index
* Added a patch to make kup key dynamic.
Changes from V1:
* Rebased on latest kernel
Aneesh Kumar K.V (22):
powerpc: Add new macro to handle NESTED_IFCLR
KVM: PPC: BOOK3S: PR: Ignore UAMOR SPR
powerpc/book3s64/kuap/kuep: Add PPC_PKEY config on book3s64
powerpc/book3s64/kuap/kuep: Move
This will be used by the following patches
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/feature-fixups.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/powerpc/include/asm/feature-fixups.h
b/arch/powerpc/include/asm/feature-fixups.h
index fbd406cd6916..5cdba929a8ae
owerpc/platforms/pseries/hotplug-cpu.c | 3 +++
> kernel/cpu.c | 6 -
> 7 files changed, 60 insertions(+), 9 deletions(-)
>
You can add for the series
Reviewed-by: Aneesh Kumar K.V
-aneesh
Christophe Leroy writes:
> Le 25/11/2020 à 06:16, Aneesh Kumar K.V a écrit :
>> With hash translation use DSISR_KEYFAULT to identify a wrong access.
>> With Radix we look at the AMR value and type of fault.
>>
>> Signed-off-by: Aneesh Kumar K.V
>> ---
>&g
Christophe Leroy writes:
> Le 25/11/2020 à 06:16, Aneesh Kumar K.V a écrit :
> +++ b/arch/powerpc/kernel/process.c
>> @@ -1530,10 +1530,32 @@ void flush_thread(void)
>> #ifdef CONFIG_PPC_BOOK3S_64
>> void arch_setup_new_exec(void)
>>
Christophe Leroy writes:
> Le 25/11/2020 à 06:16, Aneesh Kumar K.V a écrit :
> diff --git a/arch/powerpc/mm/book3s64/pkeys.c
> b/arch/powerpc/mm/book3s64/pkeys.c
>> index b1d091a97611..7dc71f85683d 100644
>> --- a/arch/powerpc/mm/book3s64/pkeys.c
>> +++ b/arch/
On 11/25/20 7:24 PM, Christophe Leroy wrote:
Le 25/11/2020 à 06:16, Aneesh Kumar K.V a écrit :
Child thread.kuap value is inherited from the parent in
copy_thread_tls. We still
need to make sure when the child returns from a fork in the kernel we
start with the kernel
default AMR value
On 11/25/20 7:22 PM, Christophe Leroy wrote:
Le 25/11/2020 à 06:16, Aneesh Kumar K.V a écrit :
This prepare kernel to operate with a different value than userspace
AMR/IAMR.
For this, AMR/IAMR need to be saved and restored on entry and return
from the
kernel.
With KUAP we modify kernel AMR
On 11/25/20 7:13 PM, Christophe Leroy wrote:
Le 25/11/2020 à 06:16, Aneesh Kumar K.V a écrit :
This is in preparate to adding support for kuap with hash translation.
In preparation for that rename/move kuap related functions to
non radix names. Also move the feature bit closer to MMU_FTR_KUEP
cycles
With smap/smep enabled:
Without patch:
1017.26 ns2950.36 cycles
With patch:
1021.51 ns2962.44 cycles
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/kup.h | 61 +---
arch/powerpc/kernel/entry_64.S | 2 +-
arch
Make KUAP/KUEP key a variable and also check whether the platform
limit the max key such that we can't use the key for KUAP/KEUP.
Signed-off-by: Aneesh Kumar K.V
---
.../powerpc/include/asm/book3s/64/hash-pkey.h | 22 +---
arch/powerpc/include/asm/book3s/64/pkeys.h| 1 +
arch/powerpc
Reviewed-by: Sandipan Das
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/book3s64/pkeys.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/mm/book3s64/pkeys.c b/arch/powerpc/mm/book3s64/pkeys.c
index 84f8664ffc47..f029e7bf5ca2 100644
--- a/arch/powerpc
Reviewed-by: Sandipan Das
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/book3s64/pkeys.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/mm/book3s64/pkeys.c b/arch/powerpc/mm/book3s64/pkeys.c
index f747d66cc87d..84f8664ffc47 100644
--- a/arch/powerpc
Radix use IAMR Key 0 and hash translation use IAMR key 3.
Reviewed-by: Sandipan Das
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/kup.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/book3s/64/kup.h
b/arch/powerpc/include
Radix use AMR Key 0 and hash translation use AMR key 3.
Reviewed-by: Sandipan Das
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/kup.h | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/include/asm/book3s/64/kup.h
b/arch/powerpc
With hash translation use DSISR_KEYFAULT to identify a wrong access.
With Radix we look at the AMR value and type of fault.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/32/kup.h | 4 +--
arch/powerpc/include/asm/book3s/64/kup.h | 27
arch
If an application has configured address protection such that read/write is
denied using pkey even the kernel should receive a FAULT on accessing the same.
This patch use user AMR value stored in pt_regs.amr to achieve the same.
Reviewed-by: Sandipan Das
Signed-off-by: Aneesh Kumar K.V
Now that kernel correctly store/restore userspace AMR/IAMR values, avoid
manipulating AMR and IAMR from the kernel on behalf of userspace.
Reviewed-by: Sandipan Das
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/kup.h | 21 +
arch/powerpc/include/asm/processor.h
We will remove thread.amr/iamr/uamor in a later patch
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/kernel/ptrace/ptrace-view.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/ptrace/ptrace-view.c
b/arch/powerpc/kernel/ptrace/ptrace-view.c
On fork, we inherit from the parent and on exec, we should switch to
default_amr values.
Also, avoid changing the AMR register value within the kernel. The kernel now
runs with
different AMR values.
Reviewed-by: Sandipan Das
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm
Child thread.kuap value is inherited from the parent in copy_thread_tls. We
still
need to make sure when the child returns from a fork in the kernel we start
with the kernel
default AMR value.
Reviewed-by: Sandipan Das
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/kernel/process.c | 11
. This is required so that if we get interrupted
within copy_to/from_user we continue with the right AMR value.
If we hae MMU_FTR_KUEP enabled we need to restore IAMR on return to userspace
beause kernel will be running with a different IAMR value.
Reviewed-by: Sandipan Das
Signed-off-by: Aneesh Kumar
In later patches during exec, we would like to access default regs.amr to
control access to the user mapping. Having thread.regs set early makes the
code changes simpler.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/thread_info.h | 2 --
arch/powerpc/kernel/process.c
.
Reviewed-by: Sandipan Das
Signed-off-by: Aneesh Kumar K.V
---
.../powerpc/include/asm/book3s/64/hash-pkey.h | 24 ++-
arch/powerpc/include/asm/book3s/64/hash.h | 2 +-
arch/powerpc/include/asm/book3s/64/mmu-hash.h | 1 +
arch/powerpc/include/asm/mmu_context.h| 2 +-
arch
This is in preparate to adding support for kuap with hash translation.
In preparation for that rename/move kuap related functions to
non radix names. Also move the feature bit closer to MMU_FTR_KUEP.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/kup.h | 18
The next set of patches adds support for kuep with hash translation.
In preparation for that rename/move kuap related functions to
non radix names.
Also set MMU_FTR_KUEP and add the missing isync().
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/kup.h | 1 +
arch
The next set of patches adds support for kuap with hash translation.
In preparation for that rename/move kuap related functions to
non radix names.
Signed-off-by: Aneesh Kumar K.V
---
.../asm/book3s/64/{kup-radix.h => kup.h} | 6 ++---
arch/powerpc/include/asm/kup.h|
CPUs supporting radix translation.
The old code was not updating UAMOR if we had smap disabled and smep enabled.
This change handles that case.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/book3s64/radix_pgtable.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git
of the initialization code to pkeys.c
Signed-off-by: Aneesh Kumar K.V
---
.../powerpc/include/asm/book3s/64/kup-radix.h | 4 ++--
arch/powerpc/include/asm/book3s/64/mmu.h | 2 +-
arch/powerpc/include/asm/ptrace.h | 7 +-
arch/powerpc/kernel/asm-offsets.c | 3 +++
arch
on latest kernel
Aneesh Kumar K.V (22):
powerpc: Add new macro to handle NESTED_IFCLR
KVM: PPC: BOOK3S: PR: Ignore UAMOR SPR
powerpc/book3s64/kuap/kuep: Make KUAP and KUEP a subfeature of
PPC_MEM_KEYS
powerpc/book3s64/kuap/kuep: Move uamor setup to pkey init
powerpc/book3s64/kuap
ignore access to them and for mfstpr return
0 indicating no AMR/IAMR update is no allowed.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/kvm/book3s_emulate.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/powerpc/kvm/book3s_emulate.c
b/arch/powerpc/kvm/book3s_emulate.c
index
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