[PATCH v3 1/3] powerpc ppc-opcode: add divde and divdeu opcodes

include instruction opcodes for divde and divdeu as macros. Reviewed-by: Sandipan Das Signed-off-by: Balamuruhan S --- arch/powerpc/include/asm/ppc-opcode.h | 8 1 file changed, 8 insertions(+) diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc

[PATCH v3 0/3] Add support for divde[.] and divdeu[.] instruction emulation

depth: 12544 bytes left Welcome to Buildroot buildroot login: Balamuruhan S (3): powerpc ppc-opcode: add divde and divdeu opcodes powerpc sstep: add support for divde[.] and divdeu[.] instructions powerpc test_emulate_step: add testcases for divde[.] and divdeu[.] instructions arch/po

Re: [PATCH 14/18] powerpc/kprobes: Support kprobes on prefixed instructions

On Tue, Nov 26, 2019 at 04:21:37PM +1100, Jordan Niethe wrote: > A prefixed instruction is composed of a word prefix followed by a word > suffix. It does not make sense to be able to have a kprobe on the suffix > of a prefixed instruction, so make this impossible. > > Kprobes work by replacing an

Re: [PATCH 15/18] powerpc/uprobes: Add support for prefixed instructions

On Tue, Nov 26, 2019 at 04:21:38PM +1100, Jordan Niethe wrote: > Uprobes can execute instructions out of line. Increase the size of the > buffer used for this so that this works for prefixed instructions. Take > into account the length of prefixed instructions when fixing up the nip. > > Signed-o

Re: [PATCH 05/18] powerpc sstep: Prepare to support prefixed instructions

On Tue, Nov 26, 2019 at 04:21:28PM +1100, Jordan Niethe wrote: > Currently all instructions are a single word long. A future ISA version > will include prefixed instructions which have a double word length. The > functions used for analysing and emulating instructions need to be > modified so that

[PATCH v2 3/3] powerpc test_emulate_step: add testcases for divde[.] and divdeu[.] instructions

dividend to cover -|divisor| < r <= 0 if the dividend is negative for divde[.] * normal case with proper dividend and divisor for both divde[.] and divdeu[.] Reviewed-by: Sandipan Das Signed-off-by: Balamuruhan S --- arch/powerpc/lib/test_emulate_step.c

[PATCH v2 2/3] powerpc sstep: add support for divde[.] and divdeu[.] instructions

This patch adds emulation support for divde, divdeu instructions, * Divide Doubleword Extended (divde[.]) * Divide Doubleword Extended Unsigned (divdeu[.]) Reviewed-by: Sandipan Das Signed-off-by: Balamuruhan S --- arch/powerpc/lib/sstep.c | 13 - 1 file changed, 12

[PATCH v2 1/3] powerpc ppc-opcode: add divde, divde_dot, divdeu and divdeu_dot opcodes

include instruction opcodes for divde, divde_dot, divideu and divideu_dot as macros. Reviewed-by: Sandipan Das Signed-off-by: Balamuruhan S --- arch/powerpc/include/asm/ppc-opcode.h | 10 ++ 1 file changed, 10 insertions(+) diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch

[PATCH v2 0/3] Add support for divde[.] and divdeu[.] instruction emulation

left [3.252465] mount (55) used greatest stack depth: 12544 bytes left Welcome to Buildroot buildroot login: Balamuruhan S (3): powerpc ppc-opcode: add divde, divde_dot, divdeu and divdeu_dot opcodes powerpc sstep: add support for divde[.] and divdeu[.] instructions powerpc test_emulate_step

Re: [PATCH 06/18] powerpc sstep: Add support for prefixed integer load/stores

On Tue, Nov 26, 2019 at 04:21:29PM +1100, Jordan Niethe wrote: > This adds emulation support for the following prefixed integer > load/stores: > * Prefixed Load Byte and Zero (plbz) > * Prefixed Load Halfword and Zero (plhz) > * Prefixed Load Halfword Algebraic (plha) > * Prefixed Load Word

Re: [PATCH 06/18] powerpc sstep: Add support for prefixed integer load/stores

On Tue, Nov 26, 2019 at 04:21:29PM +1100, Jordan Niethe wrote: > This adds emulation support for the following prefixed integer > load/stores: > * Prefixed Load Byte and Zero (plbz) > * Prefixed Load Halfword and Zero (plhz) > * Prefixed Load Halfword Algebraic (plha) > * Prefixed Load Word

Re: [PATCH 2/3] powerpc sstep: add support for divde[.] and divdeu[.] instructions

On Thu, Jan 09, 2020 at 09:23:14AM +1100, Paul Mackerras wrote: > On Tue, Dec 10, 2019 at 12:49:03PM +0530, Balamuruhan S wrote: > > This patch adds emulation support for divde, divdeu instructions, > > * Divide Doubleword Extended (divde[.]) > > * Divide Doublew

[PATCH 3/3] powerpc test_emulate_step: add testcases for divde[.] and divdeu[.] instructions

dividend to cover -|divisor| < r <= 0 if the dividend is negative for divde[.] * normal case with proper dividend and divisor for both divde[.] and divdeu[.] Signed-off-by: Balamuruhan S --- arch/powerpc/lib/test_emulate_step.c

[PATCH 2/3] powerpc sstep: add support for divde[.] and divdeu[.] instructions

This patch adds emulation support for divde, divdeu instructions, * Divide Doubleword Extended (divde[.]) * Divide Doubleword Extended Unsigned (divdeu[.]) Signed-off-by: Balamuruhan S --- arch/powerpc/lib/sstep.c | 27 ++- 1 file changed, 26 insertions

[PATCH 0/3] Add support for divde[.] and divdeu[.] instruction emulation

depth: 12224 bytes left Welcome to Buildroot buildroot login: Balamuruhan S (3): powerpc ppc-opcode: add divde, divde_dot, divdeu and divdeu_dot opcodes powerpc sstep: add support for divde[.] and divdeu[.] instructions powerpc test_emulate_step: add testcases for divde[.] and divdeu

[PATCH 1/3] powerpc ppc-opcode: add divde, divde_dot, divdeu and divdeu_dot opcodes

include instruction opcodes for divde, divde_dot, divideu and divideu_dot as macros. Signed-off-by: Balamuruhan S --- arch/powerpc/include/asm/ppc-opcode.h | 16 1 file changed, 16 insertions(+) diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc

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