[PATCH RFC v2 5/5] arm64: mm: take DMA zone offset into account

2024-04-09 Thread Baruch Siach
gested-by: Catalin Marinas Signed-off-by: Baruch Siach --- arch/arm64/mm/init.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c index 77e942ca578b..cd283ae0178d 100644 --- a/arch/arm64/mm/init.c +++ b/arch/arm64/mm/init.c @

[PATCH RFC v2 1/5] dma-mapping: replace zone_dma_bits by zone_dma_limit

2024-04-09 Thread Baruch Siach
From: Catalin Marinas Hardware DMA limit might not be power of 2. When RAM range starts above 0, say 4GB, DMA limit of 30 bits should end at 5GB. A single high bit can not encode this limit. Use direct phys_addr_t limit address for DMA zone limit. Following commits will add explicit base

[PATCH RFC v2 2/5] of: get dma area lower limit

2024-04-09 Thread Baruch Siach
. Rename to of_dma_get_cpu_limits(), and extend to retrieve also the lower limit for the same 'dma-ranges' property describing the high limit. Update callers of of_dma_get_max_cpu_address(). No functional change intended. Signed-off-by: Baruch Siach --- arch/arm64/mm/init.c | 2 +- drivers

[PATCH RFC v2 3/5] of: unittest: add test for of_dma_get_cpu_limits() 'min' param

2024-04-09 Thread Baruch Siach
Verify that of_dma_get_cpu_limits() sets this new parameter to the expected result. Signed-off-by: Baruch Siach --- drivers/of/unittest.c | 13 - 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/of/unittest.c b/drivers/of/unittest.c index 2d632d4ec5b1

[PATCH RFC v2 4/5] dma-direct: add base offset to zone_dma_bits

2024-04-09 Thread Baruch Siach
the dma_direct_supported() local 'min_mask' variable to better describe its use as limit. Suggested-by: Catalin Marinas Signed-off-by: Baruch Siach --- include/linux/dma-direct.h | 1 + kernel/dma/direct.c| 9 + kernel/dma/pool.c | 2 +- kernel/dma/swiotlb.c | 4 ++-- 4

[PATCH RFC v2 0/5] arm64: support DMA zone starting above 4GB

2024-04-09 Thread Baruch Siach
("arm64: Ignore any DMA offsets in the max_zone_phys() calculation") [1] https://lore.kernel.org/all/9af8a19c3398e7dc09cfc1fbafed98d795d9f83e.1699464622.git.bar...@tkos.co.il/ [2] https://lore.kernel.org/all/zz2hnhjv3gdzu...@arm.com/ Baruch Siach (4): of: get dma area l

Re: [PATCH v3] watchdog: add SPDX identifiers for watchdog subsystem

2018-02-21 Thread Baruch Siach
ver for Conexant Digicolor > * > * Copyright (C) 2015 Paradox Innovation Ltd. > * > - * This program is free software; you can redistribute it and/or modify it > - * under the terms of the GNU General Public License as published by the > - * Free Software Foundation; either v

Re: [PATCH 1/9] mm: Hardened usercopy

2016-07-07 Thread Baruch Siach
Hi Kees, On Thu, Jul 07, 2016 at 01:25:21PM -0400, Kees Cook wrote: > On Thu, Jul 7, 2016 at 1:37 AM, Baruch Siach <bar...@tkos.co.il> wrote: > > On Wed, Jul 06, 2016 at 03:25:20PM -0700, Kees Cook wrote: > >> +#ifdef CONFIG_HAVE_HARDENED_USERCOPY_

Re: [PATCH 1/9] mm: Hardened usercopy

2016-07-06 Thread Baruch Siach
Hi Kees, On Wed, Jul 06, 2016 at 03:25:20PM -0700, Kees Cook wrote: > +#ifdef CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR Should be CONFIG_HARDENED_USERCOPY to match the slab/slub implementation condition. > +const char *__check_heap_object(const void *ptr, unsigned long n, > +

Re: [PATCH] spi: add spi-lsb-first to devicetree

2014-04-01 Thread Baruch Siach
Hi Zhao Qiang, On Tue, Apr 01, 2014 at 03:55:31PM +0800, Zhao Qiang wrote: add optional property devicetree for SPI slave nodes into devicetree so that LSB mode can be enabled by devicetree. Signed-off-by: Zhao Qiang b45...@freescale.com ---

[BUG] irq_dispose_mapping after irq request failure

2013-02-10 Thread Baruch Siach
Hi lkml, The drivers/edac/mpc85xx_edac.c driver contains the following (abbreviated) code snippet it its .probe: res = devm_request_irq(op-dev, pdata-irq, mpc85xx_pci_isr, IRQF_DISABLED, [EDAC] PCI err,

Re: [BUG] irq_dispose_mapping after irq request failure

2013-02-10 Thread Baruch Siach
Hi Michael, On Mon, Feb 11, 2013 at 05:19:49PM +1100, Michael Ellerman wrote: On Mon, Feb 11, 2013 at 07:31:00AM +0200, Baruch Siach wrote: [...] mpc85xx_pci_err_probe: Unable to requiest irq 16 for MPC85xx PCI err While you're there, can you fix the typo :) The patch fixing it is already

[PATCH] powerpc: fix build when CONFIG_BOOKE_WDT is enabled

2012-04-19 Thread Baruch Siach
...@redhat.com Signed-off-by: Baruch Siach bar...@tkos.co.il --- arch/powerpc/include/asm/reg_booke.h |5 - arch/powerpc/kernel/setup_32.c |5 + 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h

[PATCH] of/mdio: fix fixed link bus name

2012-02-27 Thread Baruch Siach
Since 9e6c643b (phy/fixed: use an unique MDIO bus name) the name of the fixed PHY bus is fixed-0. Teach of_phy_connect_fixed_link() the new name. Tested on a P1020RDB PowerPC system. Signed-off-by: Baruch Siach bar...@tkos.co.il --- drivers/of/of_mdio.c |2 +- 1 files changed, 1 insertions

Re: [PATCH] net: fsl_pq_mdio: fix non tbi phy access

2011-11-15 Thread Baruch Siach
Hi Andy, On Tue, Nov 15, 2011 at 09:06:03AM -0600, Andy Fleming wrote: On Nov 14, 2011, at 11:17 PM, Baruch Siach wrote: On Mon, Nov 14, 2011 at 09:04:47PM +, Fleming Andy-AFLEMING wrote: [snip] And looking at the p1010si.dtsi, I see that it's automatically there for you. How

Re: [PATCH] net: fsl_pq_mdio: fix non tbi phy access

2011-11-14 Thread Baruch Siach
Hi Andy, On Mon, Nov 14, 2011 at 09:04:47PM +, Fleming Andy-AFLEMING wrote: Well, this got applied quickly, so I guess I can't NAK, but this requires discussion. On Nov 14, 2011, at 0:22, Baruch Siach bar...@tkos.co.il wrote: Since 952c5ca1 (fsl_pq_mdio: Clean up tbi address

[PATCH] net: fsl_pq_mdio: fix oops when using uninitialized mutex

2011-11-07 Thread Baruch Siach
/0x68 Instruction dump: 9421ffd0 7c0802a6 81230008 bf61001c 3bc30004 7c7f1b78 90010034 38010008 7c5c1378 90030008 93c10008 9121000c 3800 90410010 7d201828 Fix this by moving the of_mdiobus_register() call earlier. Cc: Andy Fleming aflem...@freescale.com Signed-off-by: Baruch Siach bar

[PATCH v4] powerpc: 85xx: separate e500 from e500mc

2011-11-07 Thread Baruch Siach
CONFIG_E500MC breaks e500/e500v2 systems. It defines L1_CACHE_SHIFT to 6, thus breaking clear_pages(), probably others too. This patch adds a new Processor Type entry for e500mc, and makes e500 systems depend on PPC_E500_V1_V2. Cc: Kumar Gala ga...@kernel.crashing.org Signed-off-by: Baruch Siach

Re: [PATCH v3] powerpc: 85xx: separate e500 from e500mc

2011-10-24 Thread Baruch Siach
Hi Kumar, On Wed, Aug 10, 2011 at 08:21:18AM +0300, Baruch Siach wrote: CONFIG_E500MC breaks e500/e500v2 systems. It defines L1_CACHE_SHIFT to 6, thus breaking clear_pages(), probably others too. This patch adds a new Processor Type entry for e500mc, and makes e500 systems depend

Re: [PATCH v2] powerpc: 85xx: separate e500 from e500mc

2011-08-09 Thread Baruch Siach
Hi Scott, On Mon, Aug 08, 2011 at 02:42:52PM -0500, Scott Wood wrote: On 08/08/2011 04:07 AM, Baruch Siach wrote: CONFIG_E500MC breaks e500/e500v2 systems. It defines L1_CACHE_SHIFT to 6, thus breaking clear_pages(), probably others too. This patch adds a new Processor Type entry

[PATCH v3] powerpc: 85xx: separate e500 from e500mc

2011-08-09 Thread Baruch Siach
CONFIG_E500MC breaks e500/e500v2 systems. It defines L1_CACHE_SHIFT to 6, thus breaking clear_pages(), probably others too. This patch adds a new Processor Type entry for e500mc, and makes e500 systems depend on PPC_E500_V1_V2. Cc: Kumar Gala ga...@kernel.crashing.org Signed-off-by: Baruch Siach

[PATCH v2] powerpc: 85xx: separate e500 from e500mc

2011-08-08 Thread Baruch Siach
CONFIG_E500MC breaks e500/e500v2 systems. It defines L1_CACHE_SHIFT to 6, thus breaking clear_pages(), probably others too. This patch adds a new Processor Type entry for e500mc, and makes e500 systems depend on PPC_E500. Cc: Kumar Gala ga...@kernel.crashing.org Signed-off-by: Baruch Siach bar

Re: [RFC PATCH] powerpc: 85xx: Make e500/e500v2 depend on !E500MC

2011-07-31 Thread Baruch Siach
Hi Scott, On Thu, Jul 28, 2011 at 03:20:33PM -0500, Scott Wood wrote: On Thu, 28 Jul 2011 19:56:53 + Tabi Timur-B04825 b04...@freescale.com wrote: On Sun, Jun 19, 2011 at 11:56 PM, Baruch Siach bar...@tkos.co.il wrote: CONFIG_E500MC breaks e500/e500v2 systems. It defines

Re: [RFC PATCH] powerpc: 85xx: Make e500/e500v2 depend on !E500MC

2011-07-31 Thread Baruch Siach
Hi Timur, On Thu, Jul 28, 2011 at 03:02:21PM -0500, Timur Tabi wrote: wrote: On Sun, Jun 19, 2011 at 11:56 PM, Baruch Siach bar...@tkos.co.il wrote: CONFIG_E500MC breaks e500/e500v2 systems. It defines L1_CACHE_SHIFT to 6, thus breaking clear_pages(), probably others too. Cc: Kumar

[PATCH] powerpc: 85xx: separate e500 from e500mc

2011-07-31 Thread Baruch Siach
CONFIG_E500MC breaks e500/e500v2 systems. It defines L1_CACHE_SHIFT to 6, thus breaking clear_pages(), probably others too. This patch adds a new Processor Type entry for e500mc, and makes e500 systems depend on PPC_E500. Cc: Kumar Gala ga...@kernel.crashing.org Signed-off-by: Baruch Siach bar

Re: [RFC PATCH] powerpc: 85xx: Make e500/e500v2 depend on !E500MC

2011-07-29 Thread Baruch Siach
Hi Tabi, On Thu, Jul 28, 2011 at 07:56:53PM +, Tabi Timur-B04825 wrote: On Sun, Jun 19, 2011 at 11:56 PM, Baruch Siach bar...@tkos.co.il wrote: CONFIG_E500MC breaks e500/e500v2 systems. It defines L1_CACHE_SHIFT to 6, thus breaking clear_pages(), probably others too. Cc: Kumar

Re: [RFC PATCH] powerpc: 85xx: Make e500/e500v2 depend on !E500MC

2011-07-11 Thread Baruch Siach
Hi Kumar, On Mon, Jun 20, 2011 at 07:56:10AM +0300, Baruch Siach wrote: CONFIG_E500MC breaks e500/e500v2 systems. It defines L1_CACHE_SHIFT to 6, thus breaking clear_pages(), probably others too. Ping? Ack/Nack? baruch Cc: Kumar Gala ga...@kernel.crashing.org Signed-off-by: Baruch Siach

[PATCH] MAINTAINERS: add arch/powerpc/platforms/85xx/ to the 85xx entry

2011-06-19 Thread Baruch Siach
Cc: Kumar Gala ga...@kernel.crashing.org Signed-off-by: Baruch Siach bar...@tkos.co.il --- MAINTAINERS |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index e50fc6e..8294613 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3904,6 +3904,7 @@ W

[RFC PATCH] powerpc: 85xx: Make e500/e500v2 depend on !E500MC

2011-06-19 Thread Baruch Siach
CONFIG_E500MC breaks e500/e500v2 systems. It defines L1_CACHE_SHIFT to 6, thus breaking clear_pages(), probably others too. Cc: Kumar Gala ga...@kernel.crashing.org Signed-off-by: Baruch Siach bar...@tkos.co.il --- Is this the right approach? arch/powerpc/platforms/85xx/Kconfig |4 1

Re: [spi-devel-general] Questions in spi_mpc83xx.c

2009-07-09 Thread Baruch Siach
Hi Mark, On Thu, Jul 09, 2009 at 02:16:48PM -0400, Mark Bishop wrote: I haven't seen this before - the '##' in the function name. This is ANCII C? Of course. See pp. 90-91 in The C Programming Language second edition. #define MPC83XX_SPI_TX_BUF(type) \ u32