an illegal-instruction type program interrupt.
>
> Reviewed-by: David Gibson
> Signed-off-by: Suraj Jitindar Singh
> Signed-off-by: Paul Mackerras
Do we still need this if we're moving to paravirt tlbie?
> ---
> arch/powerpc/include/asm/kvm_book3s.h | 2 +
> arch/powerpc/includ
On Tue, Oct 02, 2018 at 06:00:16PM +1000, Paul Mackerras wrote:
> On Tue, Oct 02, 2018 at 05:00:09PM +1000, David Gibson wrote:
> > On Fri, Sep 28, 2018 at 07:45:49PM +1000, Paul Mackerras wrote:
> > > This adds a new hypercall, H_ENTER_NESTED, which is used by a nested
> &g
via an OPAL call.
>
> Signed-off-by: Paul Mackerras
Reviewed-by: David Gibson
> ---
> arch/powerpc/kvm/book3s_hv.c | 7 +-
> arch/powerpc/kvm/book3s_hv_builtin.c | 44
> +---
> arch/powerpc/kvm/book3s_hv_rm_xics.c |
hed())
> cond_resched();
> @@ -3741,7 +3866,22 @@ static int kvmppc_run_single_vcpu(struct kvm_run
> *kvm_run,
> if (lazy_irq_pending() || need_resched() || !vcpu->kvm->arch.mmu_ready)
> goto out;
>
> - kvmppc_core_prepare_to_
w only need to save and restore TAR and pass
> 1 for the 3rd argument to __kvmppc_{save,restore}_tm.
>
> Signed-off-by: Paul Mackerras
Reviewed-by: David Gibson
> ---
> arch/powerpc/include/asm/asm-prototypes.h | 10 ++
> arch/powerpc/kvm/book3s_hv_
t creation time.
>
> Nested hypervisor functionality is only available for a radix guest,
> which therefore means a radix host on a POWER9 (or later) processor.
>
> Signed-off-by: Paul Mackerras
Reviewed-by: David Gibson
I've made a number of comments below, but they're all p
ing a single level,
> just like we do for the hardware table.
>
> Fixes: a68bd1267b72 ("powerpc/powernv/ioda: Allocate indirect TCE levels on
> demand")
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
> ---
> arch/powerpc/platforms/powernv
ved in order to wake the vcpu from cede. Currently
> we set the vcpu->arch.irq_pending flag instead for this purpose.
> Therefore there is no need to do anything with the pending_exceptions
> bitmap.
>
> Signed-off-by: Paul Mackerras
Reviewed-by: David Gibson
> ---
> arc
This makes the loop finite and prints a warning on every failure to make
> the code more bug prone.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
It does improve the current behaviour. I do suspect, however, that
leaving the failed regions in the list will probab
for (j = 0; j < i; ++j)
> - put_page(pfn_to_page(mem->hpas[j] >>
> - PAGE_SHIFT));
> - vfree(mem->hpas);
> -
are GPAs + TCE permission bits) to make the callers simpler.
>
> This should cause no behavioural change.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
> ---
> Changes:
> v2:
> * %s/kvmppc_gpa_to_ua/kvmppc_tce_to_ua/g
> ---
> arch/powerpc/inclu
While we at it, remove some EXPORT_SYMBOL_GPL() as that code is for
> the real mode only and modules cannot call it anyway.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
> ---
> Changes:
> v2:
> * only do delaying dirtying for the real mode
> *
&ua, NULL))
> return H_PARAMETER;
>
> entry = ioba >> stt->page_shift;
> @@ -520,9 +518,7 @@ long kvmppc_rm_h_put_tce_indirect(struct kvm_vcpu *vcpu,
> unsigned long tce = be64_to_cpu(((u64 *)tces)[i]);
>
>
st.
>
> Cc: Paul Mackerras
> Cc: David Gibson
> Cc: "Aneesh Kumar K.V"
> Cc: linuxppc-dev@lists.ozlabs.org
> Signed-off-by: Nicholas Piggin
Seems to fix the problem on my test case.
Tested-by: David Gibson
> ---
> arch/powerpc/kvm/book3s_64_mmu_radix.c | 8
On Mon, Sep 03, 2018 at 10:07:31PM +0530, Aneesh Kumar K.V wrote:
> We want to use this to support customized huge page migration.
>
> Signed-off-by: Aneesh Kumar K.V
Reviewed-by: David Gibson
> ---
> include/linux/hugetlb.h | 2 ++
> mm/hugetlb.c| 4 ++--
>
ing is properly aligned would suffice (i.e. that:
(ua >> PAGE_SHIFT) == (page's index within the compound page)
> }
> mem->pageshift = min(mem->pageshift, pageshift);
> mem->hpas[i] = page_to_pfn(page) << PAGE_SHIFT;
--
On Mon, Sep 03, 2018 at 03:15:29PM +1000, Paul Mackerras wrote:
> On Mon, Sep 03, 2018 at 01:28:44PM +1000, David Gibson wrote:
> > On Fri, Aug 31, 2018 at 04:08:50PM +1000, Alexey Kardashevskiy wrote:
> > > At the moment the real mode handler of H_PUT_TCE calls iommu_tce_xchg_r
m,
> EXPORT_SYMBOL_GPL(mm_iommu_lookup);
>
> struct mm_iommu_table_group_mem_t *mm_iommu_lookup_rm(struct mm_struct *mm,
> - unsigned long ua, unsigned long size)
> + unsigned long ua, unsigned long size, unsigned int *pshift)
> {
> struct mm_iommu_table_group_mem_t *mem, *ret = NULL;
>
> @@ -354,6 +354,8 @@ struct mm_iommu_table_group_mem_t
> *mm_iommu_lookup_rm(struct mm_struct *mm,
> (ua + size <= mem->ua +
>(mem->entries << PAGE_SHIFT))) {
> ret = mem;
> + if (pshift)
> + *pshift = mem->pageshift;
> break;
> }
> }
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
signature.asc
Description: PGP signature
>From now on the attempts on mapping IOMMU pages bigger than allowed will
> result in KVM exit.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
> ---
> arch/powerpc/include/asm/kvm_ppc.h | 2 --
> arch/powerpc/kvm/book3s_64_vio.c| 42
> ++
interface is used for that) and these handlers
> are for new TCEs.
>
> This returns an error to the guest if there is a request which cannot be
> processed. By now the only possible failure must be H_TOO_HARD.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibso
anges the handlers to return H_TOO_HARD on every error giving
> the userspace an opportunity to handle any request or at least log
> them all.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
> ---
> arch/powerpc/kvm/book3s_64_vio.c| 8
>
the TCE checker to fail on attempts to map bigger
> IOMMU page than the underlying pinned memory so let's valitate TCE
> beforehand.
>
> This should cause no behavioral change.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
With one misgiving..
>
> behavioral changes.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
> ---
> arch/powerpc/platforms/pseries/iommu.c | 8 +---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/arch/powerpc/platforms/pseries/iommu.c
> b/arch/powerpc/pla
8 of the core is empty, allowing use of
> the 1, 3, 5 and 7 thread slots.
>
> (Strides less than 8 are handled similarly.)
>
> This allows the VCORE ID or offset to be calculated quickly from the
> VCPU ID or XIVE server numbers, without access to the VCPU structure.
>
> Si
space - if the page is huge and this is not a zero, then
> it is a leaf pte and the page is mapped within the range.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
> ---
>
> v6 got a couple of rb's but since the patch has changed again, I am not
> putting
getlb: initialize the pagetable cache correctly for
hugetlb" removed that double meaning, but left the now useless constants.
Signed-off-by: David Gibson
---
arch/powerpc/mm/hugetlbpage.c | 17 -
1 file changed, 4 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/mm/huget
space - if the page is huge and this is not a zero, then
> it is a leaf pte and the page is mapped within the range.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
> ---
> Changes:
> v6:
> * replaced hugetlbfs with pageshift from find_linux_pte()
>
>
; }
> >
> > + /* We have an incomplete huge page, default to PAGE_SHIFT */
> > + if (head)
> > + mem->pageshift = PAGE_SHIFT;
> > +
>
> You never set head AFIACS? (other than in the initialiser)
That looks like a leftover from the previous
to check this against
> the IOMMU page size. This calculates maximum page size as a minimum of
> the natural region alignment and compound page size.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
It's certainly better than what we have, though a coupl
On Thu, Jul 05, 2018 at 03:19:04PM +1000, Alexey Kardashevskiy wrote:
> On Thu, 5 Jul 2018 12:42:20 +1000
> David Gibson wrote:
>
> > On Wed, Jul 04, 2018 at 03:00:52PM +1000, Alexey Kardashevskiy wrote:
> > > A VM which has:
> > > - a DMA capable device passe
check this against
> the IOMMU page size. This only allows huge pages use if the entire
> preregistered block is backed with huge pages which are completely
> contained the preregistered chunk; otherwise this defaults to PAGE_SIZE.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewe
On Mon, Jul 02, 2018 at 04:32:27PM +1000, Alexey Kardashevskiy wrote:
> On Mon, 2 Jul 2018 14:52:43 +1000
> David Gibson wrote:
>
> > On Mon, Jul 02, 2018 at 02:33:30PM +1000, Alexey Kardashevskiy wrote:
> > > On Mon, 2 Jul 2018 14:08:52 +1000
> > > David Gibso
On Mon, Jul 02, 2018 at 02:33:30PM +1000, Alexey Kardashevskiy wrote:
> On Mon, 2 Jul 2018 14:08:52 +1000
> David Gibson wrote:
>
> > On Fri, Jun 29, 2018 at 05:07:47PM +1000, Alexey Kardashevskiy wrote:
> > > On Fri, 29 Jun 2018 15:18:20 +1000
> >
On Fri, Jun 29, 2018 at 05:07:47PM +1000, Alexey Kardashevskiy wrote:
> On Fri, 29 Jun 2018 15:18:20 +1000
> Alexey Kardashevskiy wrote:
>
> > On Fri, 29 Jun 2018 14:57:02 +1000
> > David Gibson wrote:
> >
> > > On Fri, Jun 29, 2018 at 02:51:21PM +1000, Alex
On Fri, Jun 29, 2018 at 02:51:21PM +1000, Alexey Kardashevskiy wrote:
> On Fri, 29 Jun 2018 14:12:41 +1000
> David Gibson wrote:
>
> > On Tue, Jun 26, 2018 at 03:59:26PM +1000, Alexey Kardashevskiy wrote:
> > > We already have a check in drivers/vfio/vfio_iommu_spapr_t
mply repeat H_PUT_TCE again - this time it will take the fast path
> and allow the bad mapping.
In short, yes, it's an exploitable security hole in the host. An
unmodified Linux guest kernel just doesn't happen to exploit it, even
if the guest userspace
> + return -EFAULT;
> +
> pa = (void *) vmalloc_to_phys(va);
> if (!pa)
> return -EFAULT;
> diff --git a/drivers/vfio/vfio_iommu_spapr_tce.c
> b/drivers/vfio/vfio_iommu_spapr_tce.c
> index 2da5f05..7cd63b0 100644
> --- a/drivers/vfio/vfio
On Thu, 28 Jun 2018 10:49:56 +0530
Hari Bathini wrote:
> Memory reservation for crashkernel could fail if there are holes around
> kdump kernel offset (128M). Fail gracefully in such cases and print an
> error message.
>
> Signed-off-by: Hari Bathini
Tested-by: David Gibson
MEM;
> int i;
>
> @@ -304,7 +304,6 @@ long kvm_vm_ioctl_create_spapr_tce(struct kvm *kvm,
> (args->offset + args->size > (ULLONG_MAX >> args->page_shift)))
> return -EINVAL;
>
> - size = _ALIGN_UP(args->
ow (16GB of actual RAM) mapped at 0x2440
>
> the table to cover that all with 64K pages takes:
> (((0x2440 + 0x20) >> 16)*8)>>20 = 4556MB
>
> If we allocate only necessary TCE levels, we will only need:
> (((0x40000 + 0x40000) >> 16)*8)>>
gt;
> if (!ret)
> pnv_pci_p7ioc_tce_invalidate(tbl, index, 1, true);
> @@ -2175,7 +2175,7 @@ static int pnv_ioda2_tce_build(struct iommu_table *tbl,
> long index,
> static int pnv_ioda2_tce_xchg(struct iommu_table *tbl, long index,
> unsig
.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
> ---
> drivers/vfio/vfio_iommu_spapr_tce.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/vfio/vfio_iommu_spapr_tce.c
> b/drivers/vfio/vfio_iommu_spapr_t
On Thu, Jun 14, 2018 at 04:35:18PM +1000, Alexey Kardashevskiy wrote:
> On 12/6/18 2:17 pm, David Gibson wrote:
> > On Fri, Jun 08, 2018 at 03:46:33PM +1000, Alexey Kardashevskiy wrote:
> >> At the moment we allocate the entire TCE table, twice (hardware part and
> >>
(tbl, index, 1, true);
> @@ -2175,7 +2175,7 @@ static int pnv_ioda2_tce_build(struct iommu_table *tbl,
> long index,
> static int pnv_ioda2_tce_xchg(struct iommu_table *tbl, long index,
> unsigned long *hpa, enum dma_data_direction *direction)
> {
> - long ret = pnv_
es this already.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
> ---
> arch/powerpc/platforms/powernv/pci-ioda-tce.c | 30
> +--
> 1 file changed, 19 insertions(+), 11 deletions(-)
>
> diff --git a/arch/powerpc/platforms/p
eraddrptr hook which returns
> a pointer to the userspace copy of a TCE; future extension will return
> NULL if the level was not allocated.
>
> This should not change non-KVM handling of TCE tables and it_userspace
> will not be allocated for non-KVM tables.
>
> Signed-off-by: Alex
On Fri, Jun 08, 2018 at 03:46:30PM +1000, Alexey Kardashevskiy wrote:
> We are going to reuse multilevel TCE code for the userspace copy of
> the TCE table and since it is big endian, let's make the copy big endian
> too.
>
> Signed-off-by: Alexey Kardashevskiy
Revie
gned int' to bare use of 'unsigned'".
>
> As this is almost cut-n-paste, there should be no behavioral change.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
> ---
> arch/powerpc/platforms/powernv/Makefile | 2 +-
> arch/powerp
On Fri, Jun 08, 2018 at 03:46:28PM +1000, Alexey Kardashevskiy wrote:
> This gets rid of a useless wrapper around
> pnv_pci_ioda2_table_free_pages().
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
> ---
> arch/powerpc/platforms/powernv/pci-ioda.c | 7
ow but later we may start
> supporting host addresses for memory devices which are not backed
> with page structs.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
> ---
> drivers/vfio/vfio_iommu_spapr_tce.c | 11 ---
> 1 file changed, 4 insertion
han 1 MiB,
> therefore we need special code which handles running on Valgrind. */
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
signature.asc
Description: PGP signature
On Mon, Jun 04, 2018 at 07:48:54PM +1000, Benjamin Herrenschmidt wrote:
> On Mon, 2018-06-04 at 18:57 +1000, David Gibson wrote:
> >
> > > - First qemu doesn't know that the guest will switch to "secure mode"
> > > in advance. There is no difference bet
don't know about.
> - Second, when using VIRTIO_F_IOMMU_PLATFORM, we also make qemu (or
> vhost) go through the emulated MMIO for every access to the guest,
> which adds additional overhead.
>
--
David Gibson| I'll have my music baroque, and my cod
cause kvmppc_pack_vcpu_id() is only called on P9, there is no need to
> test "emul_smt_mode > 1", so remove it.
> * Re-ordered block_offsets[] to be more ascending.
> * Added more detailed description of the packing algorithm.
>
> == v1: ==
Excluding concerns abou
On Tue, May 01, 2018 at 02:52:21PM +1000, Sam Bobroff wrote:
> On Tue, Apr 24, 2018 at 01:48:25PM +1000, David Gibson wrote:
> > On Tue, Apr 24, 2018 at 01:19:15PM +1000, Sam Bobroff wrote:
> > > On Mon, Apr 23, 2018 at 11:06:35AM +0200, Cédric Le Goater wrote:
> > &g
imagine pages so huge so backing them with 4K will overflow 32bit
> anyway. It is very (very) unlikely but it is 64bit arch anyway and there is
> no much point in not-long types anyway.
I think Balbir was talking about the variable name, not the type.
i.e. "Why not call it 'i'
ioral change now but soon we will allow
> the iommu_table::it_page_shift being different from from the emulated
> table page size so this will play a role.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
> ---
> arch/powerpc/kvm/book3s_64_vio.c| 2 +-
>
can still
> emulate bigger guest pages (for example 16MB) with smaller host pages
> (4KB/64KB/2MB).
>
> This allows the physical IOMMU pages to use a page size smaller or equal
> than the guest visible IOMMU page size.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gi
t; +
> arch/powerpc/kvm/book3s_64_vio_hv.c | 54 +
> 2 files changed, 100 insertions(+), 22 deletions(-)
>
--
David Gibson| I'll have my music baroque, and my code
david AT gibs
On Tue, Apr 24, 2018 at 01:19:15PM +1000, Sam Bobroff wrote:
> On Mon, Apr 23, 2018 at 11:06:35AM +0200, Cédric Le Goater wrote:
> > On 04/16/2018 06:09 AM, David Gibson wrote:
> > > On Thu, Apr 12, 2018 at 05:02:06PM +1000, Sam Bobroff wrote:
> > >> It is not current
hen how does indexing into the same array
with both host and guest server numbers make sense?
> static u8 xive_lock_and_mask(struct kvmppc_xive *xive,
>struct kvmppc_xive_src_block *sb,
>struct kvmppc_xive_irq_state *state)
> @@
al guess.
> HPT resizing
> requests fail though, but next reboot crashes the guest.
As noted the shrink is expected, so we need to debug the crash
separately. Do you have 9478956794c11239b7c1c3ef9ce95c883bb839a3 in
your tree?
--
David Gibson| I'll have my music bar
| 1 +
> > 1 file changed, 1 insertion(+)
>
> Thanks. None of my ~250 defconfig test builds hit this, what config are
> you using?
I also hit this, but only when I backported the change to RH's 3.10
kernel. I assumed something since then had added an indirect includ
eculation barrier.
>
> KVM_CAP_PPC_SAFE_INDIRECT_BRANCH reports the vulnerability of the
> machine to attacks based on poisoning the indirect branch predictor.
> No workaround that requires software changes is provided; the current
> hardware fix is to prevent speculation pas
ose Ricardo Ziviani
> Signed-off-by: Michael Ellerman
Reviewed-by: David Gibson
Michael, If this can be merged to a non-rebasing tree sooner rather
than later, that would be quite helpful to me.
--
David Gibson| I'll have my music baroque, and my code
david AT gi
the first time fell through. So go back to using die() here.
> This was observed to fix the problem.
>
> Fixes: 4388c9b3a6ee7 ("powerpc: Do not send system reset request through the
> oops path")
> Signed-off-by: Nicholas Piggin
Reviewed-by: David Gibson
> ---
call ppc_md.panic in fadump
> panic notifier"")
> Signed-off-by: Nicholas Piggin
Reviewed-by: David Gibson
> ---
> arch/powerpc/include/asm/bug.h | 3 ++-
> arch/powerpc/kernel/traps.c| 24
> arch/powerpc/platforms/p
uct *)work);
> + else
> + queue_work(pseries_hp_wq, (struct work_struct *)work);
> } else {
> *rc = -ENOMEM;
> kfree(hp_errlog_copy);
--
David Gibson| I'll have my music baroque, and my code
e suspend but
with the checkpoint stored in the hypervisor rather than the hardware.
Are we sure the hardware issue can't still be triggered? I'm
wondering what happens if all the threads did a tsuspend at (as close
as possible to) the same moment. Could the CPU get into the jammed
ed-off-by: Paul Mackerras
Reviewed-by: David Gibson
> ---
> arch/powerpc/include/asm/cputable.h | 5 -
> arch/powerpc/kernel/cputable.c | 20
> 2 files changed, 24 insertions(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/include/asm/cputabl
On Mon, Dec 04, 2017 at 04:12:06PM +1000, Nicholas Piggin wrote:
> On Mon, 4 Dec 2017 16:49:14 +1100
> David Gibson wrote:
>
> > On Fri, Dec 01, 2017 at 09:40:38PM +1000, Nicholas Piggin wrote:
> > > On Fri, 01 Dec 2017 22:11:50 +1100
> > > Michael Ellerman wro
4 from this
series on top of the revised patches and post those separately (as a
cleanup with less urgency than the actual fix).
A couple of people have also suggested CCing k...@vger.kernel.org on
the next round in addition to the lists already included.
--
David Gibson
On Fri, Dec 01, 2017 at 10:11:50PM +1100, Michael Ellerman wrote:
> David Gibson writes:
>
> > On Wed, Nov 29, 2017 at 02:23:43PM +1000, Nicholas Piggin wrote:
> >> On Wed, 29 Nov 2017 15:06:52 +1100
> >> David Gibson wrote:
> >>
> >> > a3
On Fri, Dec 01, 2017 at 09:40:38PM +1000, Nicholas Piggin wrote:
> On Fri, 01 Dec 2017 22:11:50 +1100
> Michael Ellerman wrote:
>
> > David Gibson writes:
> >
> > > On Wed, Nov 29, 2017 at 02:23:43PM +1000, Nicholas Piggin wrote:
> > >> On Wed, 29 N
On Wed, Nov 29, 2017 at 02:23:43PM +1000, Nicholas Piggin wrote:
> On Wed, 29 Nov 2017 15:06:52 +1100
> David Gibson wrote:
>
> > a3b2cb30 "powerpc: Do not call ppc_md.panic in fadump panic notifier"
> > purports to fix a problem when the kernel panics with fa
, revert it for now until we figure out how to do it
properly.
Signed-off-by: David Gibson
---
arch/powerpc/include/asm/machdep.h | 1 +
arch/powerpc/include/asm/setup.h | 1 +
arch/powerpc/kernel/fadump.c | 22 --
arch/powerpc/kernel/setup-common.c | 27
On Wed, Nov 29, 2017 at 02:23:43PM +1000, Nicholas Piggin wrote:
> On Wed, 29 Nov 2017 15:06:52 +1100
> David Gibson wrote:
>
> > a3b2cb30 "powerpc: Do not call ppc_md.panic in fadump panic notifier"
> > purports to fix a problem when the kernel panics with fa
e9183ce0] [c0114250] worker_thread+0x1a0/0x520
> [ 635.280655] [c007e9183d80] [c012010c] kthread+0xec/0x100
> [ 635.280724] [c007e9183e30] [c000a4b8]
> ret_from_kernel_thread+0x5c/0xa4
> [ 635.280814] Instruction dump:
> [ 6
resize_hpt_allocate()
> returns -EBUSY that is treated specially.
>
> Change comparison against zero to make checkpatch.pl happy.
>
> Signed-off-by: Serhii Popovych
Reviewed-by: David Gibson
> ---
> arch/powerpc/kvm/book3s_64_mmu_hv.c | 42
> ++--
ce
> associated with resize structure we going to release.
>
> Also kill check for resize being NULL to make code
> simpler and we called with resize != NULL in all
> places except kvm_vm_ioctl_resize_hpt_commit().
>
> Signed-off-by: Serhii Popovych
Reviewed-by: Davi
r !hpt if allocated from CMA: neither
> pfn_to_kaddr() nor page_to_pfn() is 0 in case of page != NULL.
>
> Signed-off-by: Serhii Popovych
Reviewed-by: David Gibson
> ---
> arch/powerpc/kvm/book3s_64_mmu_hv.c | 54
> ++---
>
1 file changed, 82 insertions(+), 57 deletions(-)
Paul, these (at least 1-3) fix (another :() host crash bug which can
be triggered by guest and/or userspace actions. Please merge ASAP.
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.a
;m not entirely sure how to fix this. I _think_ what we want is to
call ppc_md.panic from a late panic notifier, the way this patch does
for fadump_panic_event() if fadump is registered.
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au
x radix to hash kexec due to
> IAMR/AMOR")
> Cc: sta...@vger.kernel.org # v4.10+
> Reported-by: Yilin Zhang
> Debugged-by: David Gibson
> Signed-off-by: Michael Ellerman
Reviewed-by: David Gibson
Tested-by: David Gibson
> ---
> arch/powerpc/kernel/misc_64.S
non-power-of-two RAM size,
> mostly. KVM guests are less likely to be affected as usually guests get
> less than half of hosts RAM.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
This _can_ be called with essentially arbitrary window_size via the
VFIO code. Ho
imagine that static analysis tools would catch NULL
> dereferences but it's actually really really hard. We used to have
> an __uninitialized_var() macro which was used to silence GCC false
> positives, but now we initialize the pointers to NULL instead. So
> most of the code that yo
annot access memory
>
> To avoid this, let's filter out non-valid SLB entries. While here, we
> also force a full SLB flush before installing new entries. Since SLB
> is for 64-bit only, we now build this path conditionally to avoid a
> build break on 32-bit, which doesn't define
On Mon, Oct 16, 2017 at 06:07:06PM +1100, Alexey Kardashevskiy wrote:
> On 16/10/17 17:46, David Gibson wrote:
> > On Mon, Oct 16, 2017 at 05:22:55PM +1100, Alexey Kardashevskiy wrote:
> >> On 16/10/17 17:11, David Gibson wrote:
> >>> On Mon, Oct 16, 2017 at 04:49:17
On Mon, Oct 16, 2017 at 05:22:55PM +1100, Alexey Kardashevskiy wrote:
> On 16/10/17 17:11, David Gibson wrote:
> > On Mon, Oct 16, 2017 at 04:49:17PM +1100, Alexey Kardashevskiy wrote:
> >> At the moment, on 256CPU + 256 PCI devices guest, it takes the guest
> >> abou
gt; + }
> +
> /* Get root of tree */
> root = call_prom("peer", 1, 1, (phandle)0);
> if (root == (phandle)0)
> @@ -2548,6 +2573,7 @@ static void __init flatten_device_tree(void)
> /* Copy the reserve map in */
> memcpy(rsvmap, mem_r
gt; - r = cpu_has_feature(CPU_FTR_TM_COMP) &&
> > > - is_kvmppc_hv_enabled(kvm);
> > > + r = cpu_has_feature(CPU_FTR_TM_COMP) && hv_enabled;
> > > break;
> > > default:
> > > r = 0;
> &
On Tue, Oct 03, 2017 at 08:24:07AM +0200, Cédric Le Goater wrote:
> On 10/03/2017 05:36 AM, David Gibson wrote:
> > On Mon, Oct 02, 2017 at 06:27:20PM +0200, Cédric Le Goater wrote:
> >> On 09/23/2017 10:26 AM, Cédric Le Goater wrote:
> >>> Hi,
> >>>
I think I've missed something here.
Is there a qemu bug involved in this? Has there been a patch sent
that I didn't spot?
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
annot access memory
>
> To avoid this, let's filter out non-valid SLB entries. While here, we
> also force a full SLB flush before installing new entries.
>
> Signed-off-by: Greg Kurz
Seems sensible to me.
Reviewed-by: David Gibson
> ---
> v2: - flush SLB bef
On Thu, Sep 28, 2017 at 10:07:13AM +0200, Benjamin Herrenschmidt wrote:
> On Thu, 2017-09-28 at 11:45 +1000, David Gibson wrote:
> > On Tue, Sep 26, 2017 at 04:47:04PM +1000, Sam Bobroff wrote:
> > > In KVM's XICS-on-XIVE emulation, kvmppc_xive_get_xive() returns t
On Thu, Sep 28, 2017 at 07:16:12PM +1000, Alexey Kardashevskiy wrote:
> Clearing very big IOMMU tables can trigger soft lockups. This adds
> cond_resched() to allow the scheduler to do context switching when
> it decides to.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-b
6ba63f8e8a61 100644
> --- a/arch/powerpc/kvm/book3s_xive.h
> +++ b/arch/powerpc/kvm/book3s_xive.h
> @@ -35,7 +35,6 @@ struct kvmppc_xive_irq_state {
> struct xive_irq_data *pt_data; /* XIVE Pass-through associated data */
>
> /* Targetting as set by guest */
>
u64 rs = sregs->u.s.ppc64.slb[i].slbv;
> + if (rb & SLB_ESID_V)
> + vcpu->arch.mmu.slbmte(vcpu, rs, rb);
> }
> } else {
> for (i = 0; i < 16; i++) {
>
--
David Gibson| I'll
+ beq 6f
> > +END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
> > + cmpwi r0, 0
> > bne .Lradix_hdsi/* on radix, just save DAR/DSISR/ASDR */
> > /* HPTE not found fault or protection fault? */
> > andis. r0, r6, (DSISR_NOHPTE | DSISR_PROTFAU
+ cmpdi r6, 0x7fff
> + beq 6f
> +END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
> + cmpwi r0, 0
> bne .Lradix_hdsi /* on radix, just save DAR/DSISR/ASDR */
> /* HPTE not found fault or protection fault? */
> andis. r0, r6, (DSI
301 - 400 of 2289 matches
Mail list logo
