ct pcie_port *pp)
> if (ret)
> goto err;
>
> - return;
> + return 0;
> err:
> qcom_ep_reset_assert(pcie);
> phy_power_off(pcie->phy);
> err_deinit:
> pcie->ops->deinit(pcie);
> +
> + return ret;
> }
>
>
Às 11:30 AM de 1/16/2017, Kishon Vijay Abraham I escreveu:
> Hi Joao,
>
> On Monday 16 January 2017 03:57 PM, Joao Pinto wrote:
>>
>> Hi,
>>
>> Às 5:21 AM de 1/16/2017, Kishon Vijay Abraham I escreveu:
>>> Hi Joao,
>>>
>>> On Friday 13
Hi,
Às 5:21 AM de 1/16/2017, Kishon Vijay Abraham I escreveu:
> Hi Joao,
>
> On Friday 13 January 2017 10:19 PM, Joao Pinto wrote:
>> Às 10:26 AM de 1/12/2017, Kishon Vijay Abraham I escreveu:
>>> Split pcie-designware.c into pcie-designware-host.c that contains
>
Hi,
Às 5:19 AM de 1/16/2017, Kishon Vijay Abraham I escreveu:
> Hi,
>
> On Friday 13 January 2017 10:43 PM, Joao Pinto wrote:
>> Hi,
>>
>> Às 10:25 AM de 1/12/2017, Kishon Vijay Abraham I escreveu:
>>> *num-lanes* dt property is parsed in dw_pcie_host_in
Hi Kishon,
Às 10:26 AM de 1/12/2017, Kishon Vijay Abraham I escreveu:
> Now that pci designware host has a separate file, create a new
> config symbol to select the host only driver. This is in preparation
> to enable endpoint support to designware driver.
>
> Signed-off-by: Kishon Vijay Abraham
Hi!
Às 10:25 AM de 1/12/2017, Kishon Vijay Abraham I escreveu:
> No functional change. Get device pointer at the beginning of
> dw_pcie_host_init instead of getting it all over dw_pcie_host_init.
> This is in preparation for splitting struct pcie_port into host and
> core structures (Once split
Hi,
Às 10:25 AM de 1/12/2017, Kishon Vijay Abraham I escreveu:
> *num-lanes* dt property is parsed in dw_pcie_host_init. However
> *num-lanes* property is applicable to both root complex mode and
> endpoint mode. As a first step, move the parsing of this property
> outside dw_pcie_host_init. This
y Zang <tie-fei.z...@freescale.com>
> Cc: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
> Cc: Niklas Cassel <niklas.cas...@axis.com>
> Cc: Jesper Nilsson <jesper.nils...@axis.com>
> Cc: Joao Pinto <joao.pi...@synopsys.com>
> Cc: Zhou Wang <wangzh...@
Às 10:26 AM de 1/12/2017, Kishon Vijay Abraham I escreveu:
> Split pcie-designware.c into pcie-designware-host.c that contains
> the host specific parts of the driver and pcie-designware.c that
> contains the parts used by both host driver and endpoint driver.
>
> Signed-off-by: Kishon Vijay
dbi space.
> This is in preparation for added endpoint support to linux kernel.
>
> Cc: Jingoo Han <jingooh...@gmail.com>
> Cc: Murali Karicheri <m-kariche...@ti.com>
> Cc: Joao Pinto <joao.pi...@synopsys.com>
> Cc: Stanimir Varbanov <svarba...@mm-sol.com>
> Cc:
evfn, int where, int size, u32 val)
> {
> int ret, type;
> u32 busdev, cfg_size;
> @@ -711,7 +711,7 @@ static int dw_pcie_valid_device(struct pcie_port *pp,
> struct pci_bus *bus,
> }
>
> static int dw_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,
> - int size, u32 *val)
> +int size, u32 *val)
> {
> struct pcie_port *pp = bus->sysdata;
>
> @@ -727,7 +727,7 @@ static int dw_pcie_rd_conf(struct pci_bus *bus, u32
> devfn, int where,
> }
>
> static int dw_pcie_wr_conf(struct pci_bus *bus, u32 devfn,
> - int where, int size, u32 val)
> +int where, int size, u32 val)
> {
> struct pcie_port *pp = bus->sysdata;
>
>
Always good to make clean up! Thanks!
Acked-By: Joao Pinto <jpi...@synopsys.com>
7 @@ struct pcie_port {
> };
>
> struct pcie_host_ops {
> + u64 (*cpu_addr_fixup)(u64 cpu_addr);
> u32 (*readl_rc)(struct pcie_port *pp, u32 reg);
> void (*writel_rc)(struct pcie_port *pp, u32 reg, u32 val);
> int (*rd_own_conf)(struct pcie_port *pp, int where, int size, u32 *val);
>
I think this is an acceptable fixup, I am ok with it.
Reviewed-By: Joao Pinto <jpi...@synopsys.com>
Joao
@@ -25,76 +25,6 @@
>
> #include "pcie-designware.h"
Make sense.
Reviewed-By: Joao Pinto <jpi...@synopsys.com>
Hi Srinivas!
Thanks for the update!
Acked-By: Joao Pinto <jpi...@synopsys.com>
Às 10:32 AM de 12/7/2016, Srinivas Kandagatla escreveu:
> This patch add support to return value from host_init() callback from drivers,
> so that the designware libary can handle or pass it to proper
Às 11:51 AM de 12/2/2016, Srinivas Kandagatla escreveu:
>
>
> On 02/12/16 10:32, Joao Pinto wrote:
>>
>> Hi Srinivas,
>>
>> Às 11:51 AM de 12/1/2016, Srinivas Kandagatla escreveu:
>>> drivers/pci/host/pci-dra7xx.c | 4 +++-
>>
Hi Srinivas,
Às 11:51 AM de 12/1/2016, Srinivas Kandagatla escreveu:
> drivers/pci/host/pci-dra7xx.c | 4 +++-
> drivers/pci/host/pci-exynos.c | 4 +++-
> drivers/pci/host/pci-imx6.c | 4 +++-
> drivers/pci/host/pci-keystone.c | 4 +++-
>
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