Re: [PATCH] powerpc/64: Fix checksum folding in csum_add

Shile Zhang a écrit : fix the missed point in Paul's patch: "powerpc/64: Fix checksum folding in csum_tcpudp_nofold and ip_fast_csum_nofold" Signed-off-by: Shile Zhang --- arch/powerpc/include/asm/checksum.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/inc

Re: [PATCH 01/16] initrd: Add generic code path for common initrd unloading logic.

Shea Levy a écrit : Signed-off-by: Shea Levy --- init/initramfs.c | 7 +++ usr/Kconfig | 4 2 files changed, 11 insertions(+) diff --git a/init/initramfs.c b/init/initramfs.c index 7e99a0038942..de5ce873eb5a 100644 --- a/init/initramfs.c +++ b/init/initramfs.c @@ -526,6 +526,13

Re: [PATCH 14/19] powerpc/altivec: Add missing prototypes for altivec

Mathieu Malaterre a écrit : On Fri, Mar 23, 2018 at 1:19 PM, christophe leroy wrote: Le 22/03/2018 à 21:20, Mathieu Malaterre a écrit : Some functions prototypes were missing for the non-altivec code. Add the missing prototypes directly in xor_vmx, fix warnings treated as errors with W=1:

Re: STRICT_KERNEL_RWX on PPC32 is broken on PowerMac G4

Meelis Roos a écrit : > > How early does it hang ? Any oops or trace ? > > Very early - instead oif kernel emssages, I see some repeated gibberish > of some characteers, and the background turns white. > I am booting from yaboot, background is normally black. Ok, could you try by replacing #if

Re: STRICT_KERNEL_RWX on PPC32 is broken on PowerMac G4

Meelis Roos a écrit : Meelis Roos a écrit : > > > For me, 4.13 worked and 4.14 hangs early during boot. Bisecting led to > > > the following commit. I had STRICT_KERNEL_RWX enabled when I met the > > > option. When I disabled STRICT_KERNEL_RWX, the same kernel booted fine. > > > > Can you

Re: STRICT_KERNEL_RWX on PPC32 is broken on PowerMac G4

Meelis Roos a écrit : > For me, 4.13 worked and 4.14 hangs early during boot. Bisecting led to > the following commit. I had STRICT_KERNEL_RWX enabled when I met the > option. When I disabled STRICT_KERNEL_RWX, the same kernel booted fine. Can you please check that 4.13 boots properly with 'no

Re: STRICT_KERNEL_RWX on PPC32 is broken on PowerMac G4

Meelis Roos a écrit : For me, 4.13 worked and 4.14 hangs early during boot. Bisecting led to the following commit. I had STRICT_KERNEL_RWX enabled when I met the option. When I disabled STRICT_KERNEL_RWX, the same kernel booted fine. Can you please check that 4.13 boots properly with 'nobats'

Re: [PATCH 23/24] powerpc/mm: Cleanup check for stack expansion

Michael Ellerman a écrit : LEROY Christophe writes: Benjamin Herrenschmidt a écrit : When hitting below a VM_GROWSDOWN vma (typically growing the stack), we check whether it's a valid stack-growing instruction and we check the distance to GPR1. This is largely open coded with lo

Re: [PATCH 02/24] powerpc/mm: Pre-filter SRR1 bits before do_page_fault()

Benjamin Herrenschmidt a écrit : By filtering the relevant SRR1 bits in the assembly rather than in do_page_fault() itself, we avoid a conditional branch (since we already come from different path for data and instruction faults). This will allow more simplifications later Signed-off-by: Benj

Re: [PATCH 07/24] powerpc/mm: Move out definition of CPU specific is_write bits

Benjamin Herrenschmidt a écrit : Define a common page_fault_is_write() helper and use it Signed-off-by: Benjamin Herrenschmidt --- arch/powerpc/mm/fault.c | 18 +++--- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c

Re: [PATCH 23/24] powerpc/mm: Cleanup check for stack expansion

Benjamin Herrenschmidt a écrit : When hitting below a VM_GROWSDOWN vma (typically growing the stack), we check whether it's a valid stack-growing instruction and we check the distance to GPR1. This is largely open coded with lots of comments, so move it out to a helper. Did you have a look at

Re: [RFC 0/2] Consolidate patch_instruction

Balbir Singh a écrit : On Tue, 2017-05-16 at 22:20 +0200, LEROY Christophe wrote: Balbir Singh a écrit : > patch_instruction is enhanced in this RFC to support > patching via a different virtual address (text_poke_area). > The mapping of text_poke_area->addr is RW and not RWX

Re: [RFC 0/2] Consolidate patch_instruction

Balbir Singh a écrit : patch_instruction is enhanced in this RFC to support patching via a different virtual address (text_poke_area). The mapping of text_poke_area->addr is RW and not RWX. This way the mapping allows write for patching and then we tear down the mapping. The downside is that we

Re: [PATCH V3] powerpc/hugetlb: Add ABI defines for supported HugeTLB page sizes

Hi Anshuman Khandual a écrit : This just adds user space exported ABI definitions for 2MB, 16MB, 1GB, 16GB non default huge page sizes to be used with mmap() system call. Why not add all possible huge page sizes ? For instance the 8xx (only) supports 512k and 8M hugepages Christophe Sign

Re: [PATCH] powerpc: Avoid taking a data miss on every userspace instruction miss

Anton Blanchard a écrit : From: Anton Blanchard Early on in do_page_fault() we call store_updates_sp(), regardless of the type of exception. For an instruction miss this doesn't make sense, because we only use this information to detect if a data miss is the result of a stack expansion instru

_PAGE_PRESENT and _PAGE_ACCESSED

In ppc8xx tlbmiss handler, we consider a page valid if both _PAGE_PRESENT and _PAGE_ACCESSED are set. Is there any chance to have _PAGE_ACCESSED set and not _PAGE_PRESENT ? Otherwise we could simplify the handler by considering the page valid only when _PAGE_ACCESSED is set Christophe __

Strange reports of perf events on powerpc 83xx

Hi, Has anybody already used 'perf' tool on powerpc MPC83xx ? I have been succesfully using perf on MPC8xx, but on MPC83xx I get something strange. perf record/report reports addresses on user stack, as if it was mixing up D accesses and I accesses. Any idea of what the problem can be ? #

Re: [PATCH v2 2/2] powerpc32: optimise csum_partial() loop

Le 17/08/2015 13:00, leroy christophe a écrit : Le 17/08/2015 12:56, leroy christophe a écrit : Le 07/08/2015 01:25, Segher Boessenkool a écrit : On Thu, Aug 06, 2015 at 05:45:45PM -0500, Scott Wood wrote: If this makes performance non-negligibly worse on other 32-bit chips, and is an

Re: [PATCH v2 2/2] powerpc32: optimise csum_partial() loop

Le 17/08/2015 12:56, leroy christophe a écrit : Le 07/08/2015 01:25, Segher Boessenkool a écrit : On Thu, Aug 06, 2015 at 05:45:45PM -0500, Scott Wood wrote: If this makes performance non-negligibly worse on other 32-bit chips, and is an important improvement on 8xx, then we can use an

Re: [PATCH v2 2/2] powerpc32: optimise csum_partial() loop

Le 07/08/2015 01:25, Segher Boessenkool a écrit : On Thu, Aug 06, 2015 at 05:45:45PM -0500, Scott Wood wrote: If this makes performance non-negligibly worse on other 32-bit chips, and is an important improvement on 8xx, then we can use an ifdef since 8xx already requires its own kernel build.

Re: Missing Linux patches

Le 02/08/2015 21:05, Markus Stockhausen a écrit : Hi Christophe, I saw that this patch from you is still missing in Linux mainline: https://lists.ozlabs.org/pipermail/linuxppc-dev/2014-September/121144.html Is there any reason for not using it? Markus Hi, I sent v3 of that Patch on 19 May

Re: [HELP/RFC] Moving ppc8xx microcode patch from micropatch.c to firmware

Le 30/06/2015 22:38, christophe leroy a écrit : I'm trying to move the 3 microcode patches included in arch/powerpc/sysdev/micropatch.c into the firmware directory in order to use request_firmware() and then be able to add additional micropatch that I need to relocate SMC2 on my MPC885. I've n

Oops in 3.18.14 in destroy_inode()

[46796.501487] Unable to handle kernel paging request for data at address 0x02dd [46796.514365] Faulting instruction address: 0xc00c5978 [46796.524217] Oops: Kernel access of bad area, sig: 11 [#1] [46796.529351] PREEMPT CMPC885 [46796.532144] CPU: 0 PID: 1107 Comm: snmpd Not tainted 3.18.14

Re: [BUG] mpc8323_rdb platform doesn't boot since kernel 3.16

Le 10/06/2015 20:17, Rob Herring a écrit : On Wed, Jun 10, 2015 at 10:12 AM, leroy christophe wrote: Le 06/06/2015 17:32, Rob Herring a écrit : On Sat, Jun 6, 2015 at 6:20 AM, christophe leroy wrote: I've got a MPC8323 RDB evaluation platform from freescale kernel 4.0 doesn't b

Re: [BUG] mpc8323_rdb platform doesn't boot since kernel 3.16

Le 06/06/2015 17:32, Rob Herring a écrit : On Sat, Jun 6, 2015 at 6:20 AM, christophe leroy wrote: I've got a MPC8323 RDB evaluation platform from freescale kernel 4.0 doesn't boot kernel 3.16 doesn't boot kernel 3.15 boots ok I disected the issue down to your commit "of/fdt: Convert FDT funct

Re: [v2,2/2] powerpc32: add support for csum_add()

Le 05/05/2015 00:10, Segher Boessenkool a écrit : On Fri, May 01, 2015 at 08:00:14PM -0500, Scott Wood wrote: On Tue, 2015-04-28 at 21:01 +0200, christophe leroy wrote: The generated code is most likely different on ppc64. I have no ppc64 compiler For reference: yes you do. Just add -m64.

Re: [PATCH 07/11] powerpc/8xx: macro for handling CPU15 errata

Le 20/04/2015 13:40, David Laight a écrit : From: Christophe Leroy Sent: 20 April 2015 06:27 Having a macro will help keep clear code. ... * We have to use the MD_xxx registers for the tablewalk because the * equivalent MI_xxx registers only perform the attribute functions. */ + +#i

Re: [PATCH 00/11] powerpc8xx: Further optimisation of TLB handling

Le 20/04/2015 07:26, Christophe Leroy a écrit : This patchset provides a further optimisation of TLB handling in the 8xx. Main changes are based on: - Using processor handling of PGD/PTE Validity bits instead of testing ourselves the entries validity - Aligning PGD address to allow direct bit man

Re: [PATCH v3 03/17] crypto: talitos - talitos_ptr renamed ptr for more lisibility

Le 17/04/2015 17:14, David Laight a écrit : From: Christophe Leroy Linux CodyingStyle recommends to use short variables for local variables. ptr is just good enough for those 3 lines functions. It helps keep single lines shorter than 80 characters. ... -static void to_talitos_ptr(struct talito

Re: [PATCH v3 00/17] crypto: talitos - Add support for SEC1

Oops, this is the first time I use directly the output of git format-patch into sendmail, and it looks like the mails are dated with the commit date, not today's date. I will resend now with today's date. Sorry for the noise. Christophe Le 17/04/2015 15:47, Christophe Leroy a écrit : The purp

Re: [v3, 01/11] powerpc/8xx: remove remaining unnecessary code in FixupDAR

Le 13/04/2015 22:26, Scott Wood a écrit : On Sun, 2015-04-12 at 18:16 +0200, leroy christophe wrote: Le 26/03/2015 22:32, Scott Wood a écrit : On Tue, Feb 03, 2015 at 12:38:16PM +0100, LEROY Christophe wrote: Since commit 33fb845a6f01 ("powerpc/8xx: Don't use MD_TWC for walk&quo

Re: [v3, 01/11] powerpc/8xx: remove remaining unnecessary code in FixupDAR

Le 26/03/2015 22:32, Scott Wood a écrit : On Tue, Feb 03, 2015 at 12:38:16PM +0100, LEROY Christophe wrote: Since commit 33fb845a6f01 ("powerpc/8xx: Don't use MD_TWC for walk"), MD_EPN and MD_TWC are not writen anymore in FixupDAR so saving r3 has become useless. Signed-off

Re: [PATCH 0/8] powerpc/8xx: Getting rid of CONFIG_8xx

Le 25/03/2015 01:45, Scott Wood a écrit : On Fri, 2015-03-13 at 10:34 +1100, Michael Ellerman wrote: On Thu, 2015-03-12 at 16:24 +0100, Christophe Leroy wrote: Two config options exist to define powerpc MPC8xx: * CONFIG_PPC_8xx * CONFIG_8xx In addition, CONFIG_PPC_8xx also defines CONFIG_CPM1

Re: [PATCH v2 11/11] powerpc/8xx: Add support for TASK_SIZE greater than 0x80000000

Le 21/03/2015 01:47, Scott Wood a écrit : On Tue, 2015-01-20 at 10:57 +0100, Christophe Leroy wrote: By default, TASK_SIZE is set to 0x8000 for PPC_8xx, which is most likely sufficient for most cases. However, kernel configuration allows to set TASK_SIZE to another value, so the 8xx shall h

Re: powerpc32: fix warning from include/linux/mm.h

Le 21/03/2015 00:52, Scott Wood a écrit : On Fri, Dec 05, 2014 at 12:20:20PM +0100, LEROY Christophe wrote: include/linux/mm.h: In function 'is_vmalloc_addr': include/linux/mm.h:367:14: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] r

Re: [PATCH] spi: fsl-spi: use of_iomap() to map parameter ram on CPM1

Le 06/03/2015 12:44, Mark Brown a écrit : On Wed, Mar 04, 2015 at 09:00:39AM +0100, leroy christophe wrote: Le 03/03/2015 19:44, Mark Brown a écrit : Why are we using of_iomap() rather than a generic I/O mapping function here? because all drivers for powerpc seems to be using of_iomap(), as

Re: [PATCH 0/17] crypto: talitos - Add support for SEC1

Le 06/03/2015 01:28, Herbert Xu a écrit : On Thu, Mar 05, 2015 at 06:21:01PM -0600, Kim Phillips wrote: On Thu, 5 Mar 2015 17:46:05 +0100 Christophe Leroy wrote: [15/17] crypto: talitos - Implementation of SEC1 ... [16/17] crypto: talitos - SEC1 bugs on 0 data hash [17/17] crypto: talitos

Re: [PATCH 0/17] crypto: talitos - Add support for SEC1

Le 06/03/2015 01:21, Kim Phillips a écrit : On Thu, 5 Mar 2015 17:46:05 +0100 Christophe Leroy wrote: [15/17] crypto: talitos - Implementation of SEC1 ... [16/17] crypto: talitos - SEC1 bugs on 0 data hash [17/17] crypto: talitos - Update DT bindings with SEC1 This patchseries doesn't ap

Re: [PATCH] spi: fsl-spi: use of_iomap() to map parameter ram on CPM1

Le 03/03/2015 19:44, Mark Brown a écrit : On Thu, Feb 26, 2015 at 05:11:42PM +0100, Christophe Leroy wrote: On CPM2, the SPI parameter RAM is dynamically allocated in the dualport RAM whereas in CPM1, it is statically allocated to a default address with capability to relocate it somewhere else v

[QUESTION,RFC] cacheable_memcpy() versus memcpy() ==> 8% improvment on FTP throughput

In powerpc32 architecture there is a function called cacheable_memcpy() which does same thing as memcpy() but using dcbz/dcbt instructions for an optimised copy (just like __copy_tofrom_user()) What seems strange is that it is almost nowhere used (only used in drivers/net/ethernet/ibm/emac/core.

cacheable_memcpy() versus memcpy() ==> 8% improvment on FTP throughput

In powerpc32 architecture we have a function called cacheable_memcpy() which does same thing as memcpy() but using dcbz/dcbt instructions for an optimised copy (just like __copy_tofrom_user()) What seems strange is that it is almost nowhere used (only used in drivers/net/ethernet/ibm/emac/core.c

Re: [PATCH v2 07/11] powerpc/8xx: macro for handling CPU15 errata

Le 20/01/2015 12:09, David Laight a écrit : From Christophe Leroy Having a macro will help keep clear code. It might remove an #if but it doesn't really help. All it means is that anyone reading the code has to hunt for the definition before proceeding. Some comment about what (and why) the

Re: [PATCH 05/11] powerpc/8xx: Optimise access to swapper_pg_dir

Le 06/01/2015 13:08, David Laight a écrit : On Tue, 2014-12-16 at 16:03 +0100, Christophe Leroy wrote: All accessed to PGD entries are done via 0(r11). By using lower part of swapper_pg_dir as load index to r11, we can remove the ori instruction. Signed-off-by: Christophe Leroy Nice :) Acked

Re: [PATCH 09/11] powerpc/8xx: dont save CR in SCRATCH registers

Le 05/01/2015 19:30, Joakim Tjernlund a écrit : On Tue, 2014-12-16 at 16:03 +0100, Christophe Leroy wrote: CR only needs to be preserved when checking if we are handling a kernel address. So we can preserve CR in a register: - In ITLBMiss, check is done only when CONFIG_MODULES is defined. Othe

Re: [PATCH v3 2/2] powerpc/8xx: use _PAGE_RO instead of _PAGE_RW

Le 05/01/2015 19:12, Joakim Tjernlund a écrit : On Mon, 2014-12-22 at 11:14 +0100, Christophe Leroy wrote: On powerpc 8xx, in TLB entries, 0x400 bit is set to 1 for read-only pages and is set to 0 for RW pages. So we should use _PAGE_RO instead of _PAGE_RW Signed-off-by: Christophe Leroy Hi

Re: [v2 PATCH 1/2] powerpc32: adds handling of _PAGE_RO

Le 18/12/2014 03:14, Scott Wood a écrit : On Wed, 2014-12-17 at 10:14 +0100, Christophe Leroy wrote: Some powerpc like the 8xx don't have a RW bit in PTE bits but a RO (Read Only) bit. This patch implements the handling of a _PAGE_RO flag to be used in place of _PAGE_RW Signed-off-by: Christ

Re: [v2 PATCH 1/2] powerpc32: adds handling of _PAGE_RO

Le 18/12/2014 03:14, Scott Wood a écrit : On Wed, 2014-12-17 at 10:14 +0100, Christophe Leroy wrote: Some powerpc like the 8xx don't have a RW bit in PTE bits but a RO (Read Only) bit. This patch implements the handling of a _PAGE_RO flag to be used in place of _PAGE_RW Signed-off-by: Christ

Re: [v2 PATCH 2/2] powerpc/8xx: use _PAGE_RO instead of _PAGE_RW

Le 18/12/2014 03:22, Scott Wood a écrit : On Wed, 2014-12-17 at 10:14 +0100, Christophe Leroy wrote: On powerpc 8xx, in TLB entries, 0x400 bit is set to 1 for read-only pages and is set to 0 for RW pages. So we should use _PAGE_RO instead of _PAGE_RW Signed-off-by: Christophe Leroy --- v2 is

Re: [v4,17/21] powerpc/8xx: set PTE bit 22 off TLBmiss

Le 07/11/2014 04:37, Scott Wood a écrit : On Fri, Sep 19, 2014 at 10:36:09AM +0200, LEROY Christophe wrote: No need to re-set this bit at each TLB miss. Let's set it in the PTE. Signed-off-by: Christophe Leroy --- Changes in v2: - None Changes in v3: - Removed PPC405 related macro

What is the reel purpose of in_beXX() and out_beXX() fonctions ?

Many drivers use in_be16(), in_be32(), out_be16(), out_be32(), etc to access to registrers in IO mapped memory. What is the real purpose of those functions, and are they really needed ? ioremap() maps the related areas as GUARDED, which means that accesses can't be speculative. So what is

kernel 3.17 - perf build failure

LINK perf libperf.a(skip-callchain-idx.o): In function `arch_skip_callchain_idx': /root/gen/trunk/knl/tools/perf/arch/powerpc/util/skip-callchain-idx.c:250: undefined reference to `pr_debug' libperf.a(skip-callchain-idx.o): In function `check_return_addr': /root/gen/trunk/knl/tools/perf/ar

Re: [PATCH v3 00/21] powerpc/8xx: Optimise MMU TLB handling and add support of 16k pages

Le 17/09/2014 22:34, Scott Wood a écrit : On Wed, 2014-09-17 at 22:33 +0200, christophe leroy wrote: Le 17/09/2014 18:40, Scott Wood a écrit : On Wed, 2014-09-17 at 18:36 +0200, Christophe Leroy wrote: This patchset: 1) provides several MMU TLB handling optimisation on MPC8xx. 2) adds support

Re: powerpc32: add support for csum_add()

Le 12/10/2014 18:22, Jochen Rollwagen a écrit : This patch https://lists.ozlabs.org/pipermail/linuxppc-dev/2014-September/121144.html only compiles after putting an #ifndef ARCH_HAS_CSUM_ADD around the definition in include/net/checksum.h This is missing from the patch This is already in

Re: [PATCH 0/2] net: fs_enet: Remove non NAPI RX and add NAPI for TX

Le 08/10/2014 22:03, David Miller a écrit : From: Christophe Leroy Date: Tue, 7 Oct 2014 15:04:53 +0200 (CEST) When using a MPC8xx as a router, 'perf' shows a significant time spent in fs_enet_interrupt() and fs_enet_start_xmit(). 'perf annotate' shows that the time spent in fs_enet_start_xm

Re: [PATCH 2/2] spi: fsl-spi: Allow dynamic allocation of CPM1 parameter RAM

Le 07/10/2014 02:19, Scott Wood a écrit : On Sat, 2014-10-04 at 12:15 +0200, christophe leroy wrote: Le 03/10/2014 22:24, Scott Wood a écrit : On Fri, 2014-10-03 at 22:15 +0200, christophe leroy wrote: Le 03/10/2014 16:44, Mark Brown a écrit : On Fri, Oct 03, 2014 at 02:56:09PM +0200, Christ

Re: [PATCH v2 1/2] spi: fsl-spi: Fix parameter ram offset setup for CPM1

Le 07/10/2014 02:15, Scott Wood a écrit : On Sat, 2014-10-04 at 14:02 +0200, christophe leroy wrote: Le 03/10/2014 22:29, Scott Wood a écrit : On Fri, 2014-10-03 at 18:49 +0200, Christophe Leroy wrote: On CPM1, the SPI parameter RAM has a default location. In fsl_spi_cpm_get_pram() there was

Looking for mpc8xx QMC driver

I'm looking for someone having some QMC driver and/or some experience with the QMC (QUICC Multichannel Controlleur) on mpc8xx. This is because we are trying to implement audio interface to codecs via the TDM bus using the QUICC. At the time being we are facing a major issue which is that after s

Re: [PATCH v3 03/21] powerpc/8xx: exception InstructionAccess does not exist on MPC8xx

Le 18/09/2014 22:02, Joakim Tjernlund a écrit : christophe leroy wrote on 2014/09/18 21:11:01: Le 18/09/2014 20:12, Joakim Tjernlund a écrit : leroy christophe wrote on 2014/09/18 18:42:14: Le 18/09/2014 17:15, Joakim Tjernlund a écrit : Christophe Leroy wrote on 2014/09/17 18:36:57

Re: [PATCH v3 03/21] powerpc/8xx: exception InstructionAccess does not exist on MPC8xx

Le 18/09/2014 17:15, Joakim Tjernlund a écrit : Christophe Leroy wrote on 2014/09/17 18:36:57: Exception InstructionAccess does not exist on MPC8xx. No need to branch there from somewhere else. Handling can be done directly in InstructionTLBError Exception. Signed-off-by: Christophe Leroy

Re: [PATCH] spi: fsl: Don't use devm_kzalloc in master->setup callback

0c6d0] ret_from_kernel_thread+0x5c/0x64 [3.285970] Instruction dump: [3.288900] 80de 419e01d0 3b7b0038 3c60c046 7f65db78 38635264 48211b99 813f00a0 [3.296559] 381f00a0 7d290278 3169 7c0b4910 <0f00> 93df0044 7fe3fb78 4bfffd4d Reported-by: leroy christophe Signed-off-by: Axel Lin -

Re: Linux 3.16: all my drivers on SPI bus report WARNING: at drivers/base/dd.c:286

Le 19/08/2014 11:21, leroy christophe a écrit : Since Linux 3.16, for all drivers tied to SPI bus, I get the following warning on a PowerPC 8xx. It doesn't happen with Linux 3.15 What can be the reason / what should I look at ? [3.086957] device: 'spi32766.1': device_add [

Linux 3.16: all my drivers on SPI bus report WARNING: at drivers/base/dd.c:286

Since Linux 3.16, for all drivers tied to SPI bus, I get the following warning on a PowerPC 8xx. It doesn't happen with Linux 3.15 What can be the reason / what should I look at ? [3.086957] device: 'spi32766.1': device_add [3.087179] bus: 'spi': add device spi32766.1 [3.087653] bus

Re: [PATCH v2] powerpc 8xx: Loading kernels over 8Mbytes without CONFIG_PIN_TLB

Le 16/12/2013 23:57, Scott Wood a écrit : On Wed, 2013-12-11 at 00:36 +0100, leroy christophe wrote: Le 11/12/2013 00:18, Scott Wood a écrit : There wasn't previously an ifdef specifically around the setting of SPRN_MD_CTR. That's new. There was an ifdef around the entire block,

Re: [PATCH v2] powerpc 8xx: Loading kernels over 8Mbytes without CONFIG_PIN_TLB

Le 11/12/2013 00:18, Scott Wood a écrit : On Wed, 2013-12-11 at 00:05 +0100, leroy christophe wrote: Le 10/12/2013 23:24, Scott Wood a écrit : On Tue, 2013-12-10 at 12:29 +0100, Christophe Leroy wrote: Today, the only way to load kernels whose size is greater than 8Mbytes is to activate

Re: [PATCH v2] powerpc 8xx: Loading kernels over 8Mbytes without CONFIG_PIN_TLB

Le 10/12/2013 23:24, Scott Wood a écrit : On Tue, 2013-12-10 at 12:29 +0100, Christophe Leroy wrote: Today, the only way to load kernels whose size is greater than 8Mbytes is to activate CONFIG_PIN_TLB. Otherwise, the physical memory initially mapped is limited to 8Mbytes. This patch adds the c

Re: [PATCH] watchdog: mpc8xxx_wdt convert to watchdog core

Le 01/12/2013 20:38, Guenter Roeck a écrit : On 11/30/2013 07:33 AM, Christophe Leroy wrote: Convert mpc8xxx_wdt.c to the new watchdog API. Signed-off-by: Christophe Leroy diff -ur a/drivers/watchdog/mpc8xxx_wdt.c b/drivers/watchdog/mpc8xxx_wdt.c --- a/drivers/watchdog/mpc8xxx_wdt.c2013

BUG: Patch "Convert some mftb/mftbu into mfspr" breaks MPC885

Scott, The patch "Convert some mftb/mftbu into mfspr" (beb2dc0a7a84be003ce54e98b95d65cc66e6e536 ) breaks startup on MPC885. The CPU traps (Softwa

BUG: Patch "Convert some mftb/mftbu into mfspr" breaks MPC885

Scott, The patch "Convert some mftb/mftbu into mfspr" (beb2dc0a7a84be003ce54e98b95d65cc66e6e536) breaks startup on MPC885. The CPU traps (SoftwareEmulation trap) at sched_clock() when trying to read TBU with mfspr. Reverting the patch solves the issue. What's the prefered way to fix this ?

Re: [PATCH] powerpc 8xx: Fixing memory init issue with CONFIG_PIN_TLB

Le 15/10/2013 22:33, Scott Wood a écrit : On Tue, 2013-10-15 at 18:27 +0200, leroy christophe wrote: Le 11/10/2013 17:13, Joakim Tjernlund a écrit : "Linuxppc-dev" wrote on 2013/10/11 14:56:40: Activating CONFIG_PIN_TLB allows access to the 24 first Mbytes of memory at bootup in

Re: [PATCH] powerpc 8xx: Fixing memory init issue with CONFIG_PIN_TLB

Le 11/10/2013 17:13, Joakim Tjernlund a écrit : "Linuxppc-dev" wrote on 2013/10/11 14:56:40: Activating CONFIG_PIN_TLB allows access to the 24 first Mbytes of memory at bootup instead of 8. It is needed for "big" kernels for instance when activating CONFIG_LOCKDEP_SUPPORT. This needs to be

Re: [PATCH v2] powerpc 8xx: Fixing issue with CONFIG_PIN_TLB

Le 20/09/2013 23:22, Scott Wood a écrit : The hardware wants to decrement; why fight it? >I see your point. >However it is not clear in the documentation if the decrement is done >really after the update, or at xTLB interrupt. So I propose to still set >the CTR ourself as described in the refer

Re: [PATCH v2] powerpc 8xx: Fixing issue with CONFIG_PIN_TLB

Le 16/09/2013 23:02, Scott Wood a écrit : On Fri, 2013-09-13 at 07:04 +0200, leroy christophe wrote: Le 12/09/2013 20:44, Scott Wood a écrit : On Thu, 2013-09-12 at 20:25 +0200, Christophe Leroy wrote: This is a reorganisation of the setup of the TLB at kernel startup, in order to handle the

Re: [PATCH v2] powerpc 8xx: Fixing issue with CONFIG_PIN_TLB

Le 12/09/2013 20:44, Scott Wood a écrit : On Thu, 2013-09-12 at 20:25 +0200, Christophe Leroy wrote: This is a reorganisation of the setup of the TLB at kernel startup, in order to handle the CONFIG_PIN_TLB case in accordance with chapter 8.10.3 of MPC866 and MPC885 reference manuals. Signed-of

Re: [PATCH] powerpc 8xx: Fixing issue with CONFIG_PIN_TLB

Le 12/09/2013 02:15, Benjamin Herrenschmidt a écrit : On Wed, 2013-09-11 at 17:36 -0500, Scott Wood wrote: I wonder why we don't start from entry 31 so we can actually make use of that autodecrement. What will happen when we load the first normal TLB entry later on? I don't see any setting of

Re: Feedback wished on possible improvment of CPU15 errata handling on mpc8xx

Le 29/08/2013 19:57, Joakim Tjernlund a écrit : "Linuxppc-dev" wrote on 2013/08/29 19:11:48: The mpc8xx powerpc has an errata identified CPU15 which is that whenever the last instruction of a page is a conditional branch to the last instruction of the next page, the CPU might do crazy things.

Feedback wished on possible improvment of CPU15 errata handling on mpc8xx

The mpc8xx powerpc has an errata identified CPU15 which is that whenever the last instruction of a page is a conditional branch to the last instruction of the next page, the CPU might do crazy things. To work around this errata, one of the workarounds proposed by freescale is: "In the ITLB miss

Re: [v2] Enhanced support for MPC8xx/8xxx watchdog

Le 26/06/2013 01:04, Scott Wood a écrit : On Thu, Feb 28, 2013 at 09:52:22AM +0100, LEROY Christophe wrote: This patch modifies the behaviour of the MPC8xx/8xxx watchdog. On the MPC8xx, at 133Mhz, the maximum timeout of the watchdog timer is 1s, which means it must be pinged twice a second

Re: [PATCH] Enhanced support for MPC8xx/8xxx watchdog

Hi Wim, Le 27/02/2013 20:52, Wim Van Sebroeck a écrit : The rest of the code is OK and when above comments are corrected, I will add the patch to improve the userspace experience. Kind regards, Wim. Ok, I'll fix and re-submit my patch according to your comments. Best regards Christophe _

Re: [PATCH] Powerpc 8xx CPM_UART delay in receive

Le 16/08/2012 17:21, Alan Cox a écrit : MAX_IDL: Maximum idle characters. When a character is received, the receiver begins counting idle characters. If MAX_IDL idle characters are received before the next data character, an idle timeout occurs and the buffer is closed, generating a maskable inte

Re: [PATCH] Powerpc 8xx CPM_UART delay in receive

Le 16/08/2012 16:29, Alan Cox a écrit : The PowerPC CPM is working differently. It doesn't use a fifo but buffers. Buffers are handed to the microprocessor only when they are full or after a timeout period which is adjustable. In the driver, the Which is different how - remembering we empty the

Re: [PATCH] Powerpc 8xx CPM_UART delay in receive

Le 14/08/2012 16:52, Alan Cox a écrit : On Tue, 14 Aug 2012 16:26:28 +0200 Christophe Leroy wrote: Hello, I'm not sure who to address this Patch to either It fixes a delay issue with CPM UART driver on Powerpc MPC8xx. The problem is that with the actual code, the driver waits 32 IDLE patter

MPC866, Help, SPI blocked at startup

Hello, Sometimes (but rather often) I get SPI tasks hanging. I get the following trace, as if both tasks where blocking each other, or they are waiting for a third task ? Can someone help or tell what I should look at ? [ 240.939898] INFO: task ff000a80.spi:197 blocked for more than 120 seco

[MPC8xx] Initial MMU too low

Hello, When I build a kernel with DEBUG_LOCK_ALLOC set, I get a kernel which has __bss_stop above the C080 limit, and then I get a bad page exception during the zeroize of the __bss at startup, because the initial MMU only maps the first 8Mbytes. What can I do to fix that ? Regards C. L

Re: [PATCH] spi_mpc8xxx: issue with using definition of pram in Device Tree

M; @@ -844,7 +844,6 @@ return spi_base_ofs; } - cpm_muram_free(spi_base_ofs); return pram_ofs; } --- Begin Message --- On Tue, 7 Sep 2010 11:17:17 +0200 LEROY Christophe wrote: > > Dear Kumar, > > I have a small issue in the init of spi_mpc8xxx.

Dual ethernet attachment with single FEC

Hello, I have a board with 2 PHYs attached to one FEC ethernet controler on powerpc. I want to implement some kind of main-standby attachment to LAN by setting the ISOLATE bit on one on the two PHYs then monitoring the link status and switch to the other PHY when the link status goes down. I

DSP in MPC8xx

Hi, I accordance with document MPC8xxRMAD the CPM of MPC8xx includes some DSP functions. However, it is not real clear if some additional microcode is needed or not to operate it. Does anyone know any implementation of that DSP functionality with Linux ? Regards C. Leroy ___

[PATCH] fixes probe issue and hangup in spi_mpc8xxx.c for data bigger than PAGE_SIZE

This patch applies to 2.6.34.7. It also applies to 2.6.35.4 althought part of it is already included in 2.6.35.4 It fixed a problem with spi_mpc8xxx.c when transmitting or receiving data bigger than PAGE_SIZE when doing a read only or write only operation It also fixed an issue with the init pro

Small issue at init with spi_mpc8xxx.c with CPM1

Dear Kumar, I have a small issue in the init of spi_mpc8xxx.c with MPC866 (CPM1) Unlike cpm_uart that maps the parameter ram directly using of_iomap(np,1), spi_mpc8xxx.c uses cpm_muram_alloc_fixed(). This has two impacts in the .dts file: * The driver must be declared with pram at 1d80 inste

Dual ethernet attachment with single FEC

Hello, I have a board with 2 PHYs attached to one FEC. I want to implement some kind of main-standby attachment to LAN by setting the ISOLATE bit on one on the two PHYs then monitoring the link status and switch to the other PHY when the link status goes down. What would be the most proper w

Looking for a tutorial on the use of the new of_??? init functions

Hello, Is there a tutorial or an HOWTO out somewhere explaining the use of those new of_platform_xxx() and other of_xxx() functions in the init of drivers ? It looks like a very nice way to write drivers in Linux 2-6 but a little help would be welcomed. Regards Christophe ___

HDLC driver for MPC885

Hello, I'm looking for an HDLC driver for the SCCs in MPC885 CPM. Does anybody know where I could find such a driver for kernel 2.6.xx ? Best regards Christophe ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listi

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