For PEXCSRBAR, bit 3-0 indicate prefetchable and address type.
So when getting base address, these bits should be masked,
otherwise we may get incorrect base address.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
Change log:
v2:
Use PCI_BASE_ADDRESS_MEM_MASK instead of 0xfff0
fsl_arch_sys_to_pci() which should
be implemented in architecture-specific PCI controller driver to
convert pci_controller or pci_sys_data to fsl_pci.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v4:
Added indirect type macro
v1-v3:
Derived from http
() to check PCI link.
The weak function fsl_arch_pci_exclude_device() is provided to
call ppc_md.pci_exclude_device() for PowerPC architecture.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v4:
moved indirect type macro to header file
v1-v3:
Derived from http
structure
and PCI bus. Using the fake PCI controller and PCI bus, the patch
provides the early indirect read/write functions.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v4:
no change
v1-v3:
Derived from http://patchwork.ozlabs.org/patch/278965/
Based on upstream
/fsl_pci.c to
drivers/pci/host/pci-fsl-common.c and leaves the architecture
specific functions which should be implemented in arch related files.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v2-v4:
no change
v1-v2:
1. rename pci.h to pci-common.h
2. rename pci-fsl.c to pci-fsl
fsl_arch_pci64_dma_offset(), the architecture-specific driver may
return different offset.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v4:
no change
v1-v3:
Derived from http://patchwork.ozlabs.org/patch/278965/
Based on upstream master.
Based on the discussion of RFC version here
http
to provide
register/remove functionality.
2. Remove architecture-specific header and unnecessary header.
3. Change Kconfig and Makefile to support FSL PCI common driver
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v4:
no change
v1-v3:
Derived from http
not
support mpc83xx.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v4:
no change
v1-v3:
Derived from http://patchwork.ozlabs.org/patch/278965/
Based on upstream master.
Based on the discussion of RFC version here
http://patchwork.ozlabs.org/patch/274487/
arch/powerpc
PCI controller setup code will initialize structure fsl_pci
according to PCI dts node and initialize PCI command register
and ATMU. The patch uses general API of_pci_parse_bus_range
to parse PCI bus range, uses general of_address's API to parse
PCI IO/MEM ranges.
Signed-off-by: Minghuan Lian
interrupt
and delete PCI EDAC from EDAC subsystem.
3. AER uses the same IRQ, so change IRQ handling mode as shared
to avoid AER can not request IRQ.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v4:
Changed IRQ handling mode as shared to avoid aer can not request IRQ.
v1-v3
The new FSL PCI driver does not use cfg_addr of pci_controller,
we may directly access PCI CCSR using fsl_pci-regs.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v4:
no change
v1-v3:
The new patch to fix function check_pci_ctl_endpt_part
Based on upstream master.
Based
The patch updates PCI PM driver, uses fsl_pci instead of
pci_controller.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v4:
no change
v1-v3:
Derived from http://patchwork.ozlabs.org/patch/278965/
Based on upstream master.
Based on the discussion of RFC version here
http
Change pci_ids to fsl_pci_ids Freescale-specific name and change
static to extern modifier for using in fsl_pci_assign_primary().
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v4:
no change
v1-v3:
Derived from http://patchwork.ozlabs.org/patch/278965/
Based on upstream
fsl_arch_sys_to_pci() which should
be implemented in architecture-specific PCI controller driver to
convert pci_controller or pci_sys_data to fsl_pci.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v1-v3:
Derived from http://patchwork.ozlabs.org/patch/278965/
Based
/fsl_pci.c to
drivers/pci/host/pci-fsl-common.c and leaves the architecture
specific functions which should be implemented in arch related files.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v2-v3:
no change
v1-v2:
1. rename pci.h to pci-common.h
2. rename pci-fsl.c to pci-fsl
structure
and PCI bus. Using the fake PCI controller and PCI bus, the patch
provides the early indirect read/write functions.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v1-v3:
Derived from http://patchwork.ozlabs.org/patch/278965/
Based on upstream master.
Based
fsl_arch_pci64_dma_offset(), the architecture-specific driver may
return different offset.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v1-v3:
Derived from http://patchwork.ozlabs.org/patch/278965/
Based on upstream master.
Based on the discussion of RFC version here
http
() to check PCI link.
The weak function fsl_arch_pci_exclude_device() is provided to
call ppc_md.pci_exclude_device() for PowerPC architecture.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v1-v3:
Derived from http://patchwork.ozlabs.org/patch/278965/
Based on upstream
The patch updates PCI PM driver, uses fsl_pci instead of
pci_controller.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v1-v3:
Derived from http://patchwork.ozlabs.org/patch/278965/
Based on upstream master.
Based on the discussion of RFC version here
http
to provide
register/remove functionality.
2. Remove architecture-specific header and unnecessary header.
3. Change Kconfig and Makefile to support FSL PCI common driver
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v1-v3:
Derived from http://patchwork.ozlabs.org/patch
Change pci_ids to fsl_pci_ids Freescale-specific name and change
static to extern modifier for using in fsl_pci_assign_primary().
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v1-v3:
Derived from http://patchwork.ozlabs.org/patch/278965/
Based on upstream master.
Based
not
support mpc83xx.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v1-v3:
Derived from http://patchwork.ozlabs.org/patch/278965/
Based on upstream master.
Based on the discussion of RFC version here
http://patchwork.ozlabs.org/patch/274487/
arch/powerpc/sysdev
PCI controller setup code will initialize structure fsl_pci
according to PCI dts node and initialize PCI command register
and ATMU. The patch uses general API of_pci_parse_bus_range
to parse PCI bus range, uses general of_address's API to parse
PCI IO/MEM ranges.
Signed-off-by: Minghuan Lian
interrupt
and delete PCI EDAC from EDAC subsystem.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v1-v3:
Derived from http://patchwork.ozlabs.org/patch/278965/
Added mpc85xx_pci_err_remove()
Based on upstream master.
Based on the discussion of RFC version here
http
The new FSL PCI driver does not use cfg_addr of pci_controller,
we may directly access PCI CCSR using fsl_pci-regs.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v1-v3:
The new patch to fix function check_pci_ctl_endpt_part
Based on upstream master.
Based
/fsl_pci.c to
drivers/pci/host/pci-fsl-common.c and leaves the architecture
specific functions which should be implemented in arch related files.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v1-v2:
1. rename pci.h to pci-common.h
2. rename pci-fsl.c to pci-fsl-common.c
Based
and check link status.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
change log:
v1-v2:
1. change the driver name from pci-fsl to pci-fsl-common in order to
avoid confusion between fsl-pci and pci-fsl.
2. change type of is_pcie and fsl_pci_check_link() to bool.
3. remove __exit macro
/fsl_pci.c to
drivers/pci/host/pci-fsl.c and leaves the architecture-specific
functions which should be implemented in arch related files.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
Based on upstream master.
Based on the discussion of RFC version here
http://patchwork.ozlabs.org/patch
link status.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
Based on upstream master
Based on the discussion of RFC version here
http://patchwork.ozlabs.org/patch/274488/
The function has been tested on MPC8315ERDB MPC8572DS P5020DS P3041DS
and T4240QDS boards
arch/powerpc/Kconfig
/fsl_pci.c to
drivers/pci/host/pci-fsl.c and leaves the architecture-specific
functions which should be implemented in arch related files.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
Based on upstream master
Change log:
v3:
1. Add the new patch that only contains the code movement.
V2
link status.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
Based on upstream master
The function has been tested on MPC8315ERDB MPC8572DS P5020DS P3041DS
and T4240QDS boards
Change log:
v3:
1. use 'fsl_arch' as function name prefix of all the
architecture-specific hooks.
2. Move
/fsl_pci.c to
drivers/pci/host/pcie-fsl.c and leaves several platform-dependent
functions which should be implemented in platform files.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
Based on upstream master 3.11-rc7
The function has been tested on MPC8315ERDB MPC8572DS P5020DS P3041DS
/fsl_pci.c to
drivers/pci/host/pcie-fsl.c and leaves several platform-dependent
functions which should be implemented in platform files.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
Based on upstream master 3.11-rc6
The function has been tested on P5020DS and P3041DS and T4240QDS boards
-by: Minghuan Lian minghuan.l...@freescale.com
---
arch/powerpc/boot/dts/fsl/b4860si-post.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
index e5cf6c8..9813975 100644
--- a/arch/powerpc/boot
' to describe the ranges of the available
interrupt, so MPIC v4.3 does not support this property.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
v2 log:
1. move msi-available-ranges to optional properties.
.../devicetree/bindings/powerpc/fsl/msi-pic.txt| 51 +-
1
MSIIR. This patch adds
ibs_shift and srs_shift to indicate the bits definition of the
MSIIR and MSIIR1, so the same code can handle the MSIIR and MSIIR1
simultaneously.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
v2 log:
1. remove 'msiregs' support.
arch/powerpc/sysdev/fsl_msi.c
.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
arch/powerpc/boot/dts/fsl/b4si-post.dtsi | 2 +-
arch/powerpc/boot/dts/fsl/qoriq-mpic4.3.dtsi | 153 +++
arch/powerpc/boot/dts/fsl/t4240si-post.dtsi | 2 +-
3 files changed, 155 insertions(+), 2 deletions
simultaneously.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
arch/powerpc/sysdev/fsl_msi.c | 62 ++-
arch/powerpc/sysdev/fsl_msi.h | 4 ++-
2 files changed, 53 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch
' to describe the ranges of the available
interrupt and the ranges are related to the application, rather than
the description of the hardware. this patch also removes
'msi-available-ranges' property.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
.../devicetree/bindings/powerpc/fsl/msi
representation format is 'start-end', 'start'
and 'end' are integers describe the start and end register index,
the available registers lies between start and end and not include
end. For example, the available register x satisfying
start = x end.
Signed-off-by: Minghuan Lian minghuan.l
the available irqs using property
'msi-available-ranges'. The patch removes this property.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi | 1 -
arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi| 3 ---
arch/powerpc/boot/dts/fsl/qoriq-mpic4.3.dtsi | 4
The property 'reg' is used to identify the PCIe device. if there is
no 'reg' the PCI driver can not find PCI device node corresponding
to PCI controller, and can not map the interrupts. So all the INTx
interrupts can not be used.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
arch
PCIE mode. Because FSL PCI controller does not support 'Header Type',
patch still uses 'Programming Interface' to identify PCI mode.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
Signed-off-by: Roy Zang tie-fei.z...@freescale.com
---
Change log:
v2 -
keep the original PCI initialization
PCIE mode. Because FSL PCI controller does not support 'Header Type',
patch still uses 'Programming Interface' to identify PCI mode.
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
Signed-off-by: Roy Zang tie-fei.z...@freescale.com
---
arch/powerpc/sysdev/fsl_pci.c | 38
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