On 6/18/19 11:45 AM, Michael Neuling wrote:
> On Tue, 2019-06-18 at 09:57 +0530, Ravi Bangoria wrote:
>> Directly setting dawr and dawrx with 0 should be enough to
>> disable watchpoint. No need to reset individual bits in
>> variable and then set in hw.
>
>
On 6/18/19 11:41 AM, Michael Neuling wrote:
> This is going to collide with this patch
> https://patchwork.ozlabs.org/patch/1109594/
Yeah, I'm aware of the patch. I just developed this on powerpc/next.
I'll rebase my patches accordingly once mpe picks up that patche.
On 6/18/19 11:51 AM, Christophe Leroy wrote:
>
>
> Le 18/06/2019 à 06:27, Ravi Bangoria a écrit :
>> Move feature availability check at the start of the function.
>> Rearrange comment to it's associated code. Use hw->address and
>> hw->len in the 512 bytes bou
including next doubleword in the length. Watchpoint
exception handler already ignores extraneous exceptions, so no
changes required for that.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/include/asm/hw_breakpoint.h | 7 ++--
arch/powerpc/kernel/hw_breakpoint.c | 44 +---
Directly setting dawr and dawrx with 0 should be enough to
disable watchpoint. No need to reset individual bits in
variable and then set in hw.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/include/asm/hw_breakpoint.h | 3 ++-
arch/powerpc/kernel/process.c| 12
2 files
Remove unnecessary comments. Code itself is self explanatory.
And, ISA already talks about MRD field. I Don't think we need
to re-describe it.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/kernel/process.c | 17 +
1 file changed, 5 insertions(+), 12 deletions(-)
diff --git
Move feature availability check at the start of the function.
Rearrange comment to it's associated code. Use hw->address and
hw->len in the 512 bytes boundary check(to write if statement
in a single line). Add spacing between code blocks.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/
do_dabr() was renamed with do_break() long ago. But I still see
some comments mentioning do_dabr(). Replace it.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/kernel/hw_breakpoint.c | 2 +-
arch/powerpc/kernel/ptrace.c| 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git
patch 1-3: Code refactor
patch 4: Speedup disabling breakpoint
patch 5: Fix length calculation for unaligned targets
Ravi Bangoria (5):
Powerpc/hw-breakpoint: Replace stale do_dabr() with do_break()
Powerpc/hw-breakpoint: Refactor hw_breakpoint_arch_parse()
Powerpc/hw-breakpoint: Refactor
Peter / mpe,
Is the v2 looks good? If so, can anyone of you please pick this up.
On 6/4/19 9:59 AM, Ravi Bangoria wrote:
> perf_event_open() limits the sample_period to 63 bits. See
> commit 0819b2e30ccb ("perf: Limit perf_event_attr::sample_period
> to 63 bits"). Make
this
instruction was emulated by emulate_step. But because handle_dabr_fault
did not restore emulated register state, r29 still contains stale
value in above register state.
Fixes: 5aae8a5370802 ("powerpc, hw_breakpoints: Implement hw_breakpoints for
64-bit server processors"
this
instruction was emulated by emulate_step. But because handle_dabr_fault
did not restore emulated register state, r29 still contains stale
value in above register state.
Fixes: 5aae8a5370802 ("powerpc, hw_breakpoints: Implement hw_breakpoints for
64-bit server processors"
: all warnings being treated as errors
mv: cannot stat './.builtin-kvm.o.tmp': No such file or directory
With the build fix:
Acked-by: Ravi Bangoria
On 6/7/19 11:20 AM, Michael Ellerman wrote:
> Ravi Bangoria writes:
>
>> Powerpc hw triggers watchpoint before executing the instruction.
>> To make trigger-after-execute behavior, kernel emulates the
>> instruction. If the instruction is 'load something into n
On 6/7/19 6:20 AM, Michael Neuling wrote:
> On Thu, 2019-06-06 at 12:59 +0530, Ravi Bangoria wrote:
>> Powerpc hw triggers watchpoint before executing the instruction.
>> To make trigger-after-execute behavior, kernel emulates the
>> instruction. If the instruction is 'lo
On 6/6/19 12:59 PM, Ravi Bangoria wrote:
> Powerpc hw triggers watchpoint before executing the instruction.
> To make trigger-after-execute behavior, kernel emulates the
> instruction. If the instruction is 'load something into non-
> volatile register', exception handler sh
thread+0x444/0x560
kthread+0x160/0x1a0
ret_from_kernel_thread+0x5c/0x70
Signed-off-by: Ravi Bangoria
---
arch/powerpc/kernel/exceptions-64s.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/exceptions-64s.S
b/arch/powerpc/kernel/exceptions-64s.S
index 9
erf-fuzzer).
Signed-off-by: Ravi Bangoria
---
kernel/events/core.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/kernel/events/core.c b/kernel/events/core.c
index abbd4b3b96c2..e44c90378940 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -5005,6 +5005,9 @@ static int perf_ev
On 5/13/19 2:26 PM, Peter Zijlstra wrote:
> On Mon, May 13, 2019 at 09:42:13AM +0200, Peter Zijlstra wrote:
>> On Sat, May 11, 2019 at 08:12:16AM +0530, Ravi Bangoria wrote:
>>> Add a check for sample_period value sent from userspace. Negative
>>> value does not make
On 5/11/19 8:12 AM, Ravi Bangoria wrote:
> Consider a scenario where user creates two events:
>
> 1st event:
> attr.sample_type |= PERF_SAMPLE_BRANCH_STACK;
> attr.branch_sample_type = PERF_SAMPLE_BRANCH_ANY;
> fd = perf_event_open(attr, 0, 1, -1, 0);
>
nfig_bhrb(-1) will set mmcra to -1.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/perf/core-book3s.c | 6 --
arch/powerpc/perf/power8-pmu.c | 3 +++
arch/powerpc/perf/power9-pmu.c | 3 +++
3 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/perf/core-book3s.c b/arc
Add a check for sample_period value sent from userspace. Negative
value does not make sense. And in powerpc arch code this could cause
a recursive PMI leading to a hang (reported when running perf-fuzzer).
Signed-off-by: Ravi Bangoria
---
kernel/events/core.c | 3 +++
1 file changed, 3
by: Ravikumar Bangoria
> Signed-off-by: Nicholas Piggin
This one is giving me a proper backtrace when hardlockup happens
with perf_fuzzer so,
Tested-by: Ravi Bangoria
Neat:
Reported-by: Ravi Bangoria
nd confusing warnings on local CPUs, and
> also causes the SMP detector to stop, so the root cause is never
> detected.
>
> Fix this by using hrtimer based timers for the watchdog heartbeat,
> like the generic kernel hardlockup detector.
>
> Reported-by: Ravikumar Bangoria
Reported-by: Ravi Bangoria
Thanks,
Ravi
://lists.ozlabs.org/pipermail/linuxppc-dev/2018-December/182596.html
Signed-off-by: Ravi Bangoria
---
tools/perf/Documentation/perf-c2c.txt | 16
tools/perf/Documentation/perf-mem.txt | 2 +-
tools/perf/arch/powerpc/util/Build| 1 +
tools/perf/arch/powerpc/util/mem-events.c | 11
On 1/29/19 3:23 PM, Arnaldo Carvalho de Melo wrote:
> I think its just a tooling side, I haven't processed it because I'm
> waiting for Ravi to address Jiri's comment, after that I'm happy to put
> it in my perf/urgent branch that I'm brewing to push to Ingo today or
> tomorrow.
Ah.. Will try
On 1/14/19 9:44 AM, Ravi Bangoria wrote:
> Powerpc hw does not have inbuilt latency filter (--ldlat) for mem-load
> event and, perf_mem_events by default includes ldlat=30 which is
> causing failure on powerpc. Refactor code to support perf mem/c2c on
> powerpc.
>
>
://lists.ozlabs.org/pipermail/linuxppc-dev/2018-December/182596.html
Signed-off-by: Ravi Bangoria
---
tools/perf/Documentation/perf-c2c.txt | 16
tools/perf/Documentation/perf-mem.txt | 2 +-
tools/perf/arch/x86/util/Build| 1 +
tools/perf/arch/x86/util/mem-events.c | 25
We use syscall.tbl to generate system call table on powerpc.
unistd.h is no longer required now. Remove it.
Signed-off-by: Ravi Bangoria
---
tools/arch/powerpc/include/uapi/asm/unistd.h | 404 ---
tools/perf/check-headers.sh | 1 -
2 files changed, 405
Commit aff850393200 ("powerpc: add system call table generation support")
changed how systemcall table is generated for powerpc. Incorporate these
changes into perf as well.
Signed-off-by: Ravi Bangoria
---
tools/perf/arch/powerpc/Makefile | 15 +-
.../perf/arch/pow
Hi Arnaldo,
Yes. I'm aware of it. Just that I was busy with something else so couldn't do
it.
Thanks for reminding :). Will post a patch soon.
Ravi
On 1/8/19 10:34 PM, Arnaldo Carvalho de Melo wrote:
> Hi Ravi,
>
> I noticed that in:
>
> commit
this adds
throttling based on the *time taken* to process the interrupts.
Signed-off-by: Ravi Bangoria
---
v1: https://lkml.org/lkml/2018/11/14/627
arch/powerpc/perf/core-book3s.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/po
On 11/15/18 6:13 PM, Michael Ellerman wrote:
> Ravi Bangoria writes:
>
>> Commit 14c63f17b1fde ("perf: Drop sample rate when sampling is too
>> slow") introduced a way to throttle PMU interrupts if we're spending
>> too much time just processing those. Wir
Commit 14c63f17b1fde ("perf: Drop sample rate when sampling is too
slow") introduced a way to throttle PMU interrupts if we're spending
too much time just processing those. Wire up powerpc PMI handler to
use this infrastructure.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/kernel/t
On 08/14/2018 03:46 PM, Madhavan Srinivasan wrote:
> Hi arnaldo,
>
> Any comments or ack for this patch.
Tested-by: Ravi Bangoria
Thanks,
Ravi
: lxvd2x : PASS (!CPU_FTR_VSX)
emulate_step_test: stxvd2x: PASS (!CPU_FTR_VSX)
Signed-off-by: Ravi Bangoria <ravi.bango...@linux.ibm.com>
---
arch/powerpc/lib/test_emulate_step.c | 21 +++--
1 file changed, 15 insertions(+), 6 deletions(-)
diff --git a/arch/p
Reported-by: Michael Ellerman <m...@ellerman.id.au>
Signed-off-by: Ravi Bangoria <ravi.bango...@linux.ibm.com>
---
arch/powerpc/lib/sstep.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index db6bba259d91..23b7ddf
Replace 'op->type & INSTR_TYPE_MASK' expression with GETTYPE(op->type)
macro.
Signed-off-by: Ravi Bangoria <ravi.bango...@linux.ibm.com>
---
arch/powerpc/include/asm/sstep.h | 2 ++
arch/powerpc/kernel/align.c | 2 +-
arch/powerpc/lib/sstep.c | 6 +++---
3
a new macro to simplify code a bit.
2nd patch fixes the kernel crash when VSX is not supported
or disabled.
3rd patch fixes emulate_step() tests
Ravi Bangoria (3):
powerpc/sstep: Introduce GETTYPE macro
powerpc/sstep: Fix kernel crash if VSX is not present
powerpc/sstep: Fix emulate_step
: stvx : PASS
emulate_step_test: lxvd2x : FAIL
emulate_step_test: stxvd2x: FAIL
Fixes: https://github.com/linuxppc/linux/issues/148
Reported-by: Michael Ellerman <m...@ellerman.id.au>
Signed-off-by: Ravi Bangoria <ravi.bango...@linux.ibm.com>
---
Note: V
[c000494c3db0] [c000e1e4] .kernel_init+0x24/0x160
> [c000494c3e30] [c000bc24] .ret_from_kernel_thread+0x58/0xb4
>
> The below fixes this by gating the VSX tests on CPU_FTR_VSX.
Acked-by: Ravi Bangoria <ravi.bango...@linux.ibm.com>
Thanks,
Ravi
t: opcode=24 retval=-7
>
> Which can be more easily compared to H_NOT_FOUND in hvcall.h
Tested-by: Ravi Bangoria <ravi.bango...@linux.ibm.com>
Thank,
Ravi
Oops.. Really sorry about that.
I've tested acme/perf/core on ubuntu ppc32 with and without libaudit-dev
and it's working fine.
Thank you very much for fixing it,
Ravi
On 02/16/2018 11:20 PM, Arnaldo Carvalho de Melo wrote:
> Em Fri, Feb 16, 2018 at 02:29:01PM -0300, Arnaldo Carvalho de Melo
This should speed up accessing new system calls introduced with the
kernel rather than waiting for libaudit updates to include them.
It also enables users to specify wildcards, for example, perf trace -e
'open*', just like was already possible on x86 and s390.
Signed-off-by: Ravi Bangoria
This should speed up accessing new system calls introduced with
the kernel rather than waiting for libaudit updates to include
them.
Signed-off-by: Ravi Bangoria <ravi.bango...@linux.vnet.ibm.com>
---
tools/perf/arch/powerpc/Makefile | 21 +
.../perf/arch/p
Will be used for generating the syscall id/string translation table.
Signed-off-by: Ravi Bangoria <ravi.bango...@linux.vnet.ibm.com>
---
tools/arch/powerpc/include/uapi/asm/unistd.h | 399 +++
tools/perf/check-headers.sh | 1 +
2 files change
( 0.006 ms): ls/43342 open(filename: 0x793f2778, flags: CLOEXEC ) =
3
...
Ravi Bangoria (3):
tools include powerpc: Grab a copy of
arch/powerpc/include/uapi/asm/unistd.h
perf powerpc: Generate system call table from asm/unistd.h
perf trace powerpc: Use generated syscall table
Hi Balbir,
Sorry was away for few days.
On 12/14/2017 05:54 PM, Balbir Singh wrote:
> On Tue, Dec 12, 2017 at 11:29 PM, Ravi Bangoria
> <ravi.bango...@linux.vnet.ibm.com> wrote:
>> It may very well happen that branch instructions recorded by
>> bhrb entries already get
[c0027964] performance_monitor_exception+0x54/0x70
[c0009ba4] performance_monitor_common+0x114/0x120
Fix this by deferefencing them safely.
Suggested-by: Naveen N. Rao <naveen.n@linux.vnet.ibm.com>
Signed-off-by: Ravi Bangoria <ravi.bango...@linux.vnet.ibm.com&g
as memory address for imc events. While
grouping these two types of events, collect_events() tries to
interpret imc 'event_base' as a flag, which causes a corruption
resulting in a crash.
Consider only those events which belongs to 'perf_hw_context' in
collect_events().
Signed-off-by: Ravi
x6c
Signed-off-by: Ravi Bangoria <ravi.bango...@linux.vnet.ibm.com>
Reviewed-by: Kamalesh Babulal <kamal...@linux.vnet.ibm.com>
---
arch/powerpc/perf/core-book3s.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.
e elf
sections") in binutils.
2. When the sample is from hypervisor. Hypervisor symbols can not
be resolved within guest and thus thread__find_addr_map() fails for
such symbols. Fix this by ignoring hypervisor symbols in the test.
Signed-off-by: Ravi Bangoria <ravi.bango...@linux
Hi Michael,
On Friday 16 June 2017 10:42 AM, Michael Ellerman wrote:
>
> That function (perf_get_regs_user()) didn't exist until 4.7, ie:
>
> ed4a4ef85cf5 ("powerpc/perf: Add support for sampling interrupt register
> state")
>
> So there must be something else going on.
>
> I'll hold off on
Works like a charm with Milian's patch.
Acked-by: Ravi Bangoria <ravi.bango...@linux.vnet.ibm.com>
Note:
I still see very minor differences between libunwind and libdw. Also, second
last
function gets repeated two times in every callchain but it can be fixed later
on.
Otherwise all look
Thanks Naveen,
On Thursday 15 June 2017 08:57 PM, Naveen N. Rao wrote:
> Hmm... are you sure it's the same issue? The above commit only went into
> v4.7, which means we weren't able to use --call-graph=dwarf till v4.7.
Yes sorry. It's from v4.7 onwards.
-Ravi
241631] [c000bbaabdf0] [c010be70]
call_usermodehelper_exec_async+0x170/0x210
[ 131.241955] [c000bbaabe30] [c000bae0]
ret_from_kernel_thread+0x5c/0x7c
Fix it by setting abi to PERF_SAMPLE_REGS_ABI_NONE when userspace
pt_regs are not set.
Signed-off-by: Ravi Bangoria <r
Hi Mark,
On Tuesday 13 June 2017 05:14 PM, Mark Wielaard wrote:
> I see the same on very short runs. But when doing a slightly longer run,
> even just using ls -lahR, which does some more work, then I do see user
> backtraces. They are still missing for some of the early samples though.
> It is
en for binaries that do not have CFI information. In addition,
>> libunwind is always preferred to libdw by the build machinery so this
>> cannot introduce regressions on machines that have both libunwind and
>> libdw installed.
>>
>> Cc: a...@kernel.org
>>
Thanks Balbir for the review,
On Tuesday 11 April 2017 02:25 PM, Balbir Singh wrote:
> On Tue, 2017-04-11 at 10:38 +0530, Ravi Bangoria wrote:
>> If we set a kprobe on a 'stdu' instruction on powerpc64, we see a kernel
>> OOPS:
>>
>> [ 1275.165932] Bad ke
: be96f63375a1 ("powerpc: Split out instruction analysis part of
emulate_step()")
Signed-off-by: Ravi Bangoria <ravi.bango...@linux.vnet.ibm.com>
Reviewed-by: Naveen N. Rao <naveen.n@linux.vnet.ibm.com>
---
History:
Commit 8e9f69371536 ("powerpc/kprobe: Don't emulate
: 8e9f69371536 ("powerpc/kprobe: Don't emulate store when kprobe stwu r1")
Signed-off-by: Ravi Bangoria <ravi.bango...@linux.vnet.ibm.com>
---
History:
Commit 8e9f69371536 ("powerpc/kprobe: Don't emulate store when kprobe
stwu r1") fixed exception frame corruption for 32 bit
: PASS
[0.764349] emulate_step smoke test: stvx : PASS
[0.764575] emulate_step smoke test: lxvd2x : PASS
[0.764788] emulate_step smoke test: stxvd2x: PASS
[0.764997] emulate_step smoke test: complete.
Signed-off-by: Ravi Bangoria <ravi.ba
emulate_step() uses a number of underlying kernel functions that were
initially not enabled for LE. This has been rectified since. So, fix
emulate_step() for LE for the corresponding instructions.
Reported-by: Anton Blanchard <an...@samba.org>
Signed-off-by: Ravi Bangoria <r
() for selftest
- Makefile changes
v3 link:
https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1332686.html
Ravi Bangoria (2):
powerpc: Emulation support for load/store instructions on LE
powerpc: emulate_step tests for load/store instructions
arch/powerpc/include/asm/ppc
On Tuesday 14 February 2017 04:16 PM, Michael Ellerman wrote:
> Ravi Bangoria <ravi.bango...@linux.vnet.ibm.com> writes:
>
>> diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
>> index 0e649d7..ddc879d 100644
>> --- a/arch/powerpc/lib/Makefile
>
Thanks Michael,
On Tuesday 14 February 2017 03:50 PM, Michael Ellerman wrote:
> Ravi Bangoria <ravi.bango...@linux.vnet.ibm.com> writes:
>
>> emulate_step() uses a number of underlying kernel functions that were
>> initially not enabled for LE. This has been rectified s
On Tuesday 14 February 2017 02:17 PM, Naveen N. Rao wrote:
> On 2017/02/14 01:32PM, Ravi Bangoria wrote:
>> emulate_step() uses a number of underlying kernel functions that were
>> initially not enabled for LE. This has been rectified since. So, fix
>> emulate_step() for LE
: PASS
[0.764349] emulate_step smoke test: stvx : PASS
[0.764575] emulate_step smoke test: lxvd2x : PASS
[0.764788] emulate_step smoke test: stxvd2x: PASS
[0.764997] emulate_step smoke test: complete.
Signed-off-by: Ravi Bangoria <ravi.ba
emulate_step() uses a number of underlying kernel functions that were
initially not enabled for LE. This has been rectified since. So, fix
emulate_step() for LE for the corresponding instructions.
Reported-by: Anton Blanchard <an...@samba.org>
Signed-off-by: Ravi Bangoria <r
/next. No functionality changes.
v2 link:
https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1332638.html
Ravi Bangoria (2):
powerpc: Emulation support for load/store instructions on LE
powerpc: emulate_step tests for load/store instructions
arch/powerpc/include/asm/ppc-opcode.h
Hi Michael,
Can you please pull this patch.
Thanks,
Ravi
On Tuesday 22 November 2016 02:55 PM, Ravi Bangoria wrote:
> Xmon data-breakpoint feature is broken.
>
> Whenever there is a watchpoint match occurs, hw_breakpoint_handler will
> be called by do_break via notifier chai
: PASS
[0.764349] emulate_step smoke test: stvx : PASS
[0.764575] emulate_step smoke test: lxvd2x : PASS
[0.764788] emulate_step smoke test: stxvd2x: PASS
[0.764997] emulate_step smoke test: complete.
Signed-off-by: Ravi Bangoria <ravi.ba
emulate_step() uses a number of underlying kernel functions that were
initially not enabled for LE. This has been rectified since. So, fix
emulate_step() for LE for the corresponding instructions.
Reported-by: Anton Blanchard <an...@samba.org>
Signed-off-by: Ravi Bangoria <r
patch of v1 into one patch, as suggested by Naveen
v1 link:
https://www.mail-archive.com/linuxppc-dev@lists.ozlabs.org/msg110671.html
Ravi Bangoria (2):
powerpc: Emulation support for load/store instructions on LE
powerpc: emulate_step tests for load/store instructions
arch/powerpc/include
Hi Michael,
Welcome back!!
Can you please take a look at:
https://lists.ozlabs.org/pipermail/linuxppc-dev/2016-November/151426.html
https://lists.ozlabs.org/pipermail/linuxppc-dev/2016-November/150452.html
Thanks,
Ravi
On Monday 16 January 2017 03:03 PM, Michael Ellerman wrote:
> Hi folks,
>
Hi Arnaldo,
Can you please pick this up if it looks good?
-Ravi
On Tuesday 22 November 2016 02:10 PM, Ravi Bangoria wrote:
> perf report (with TUI) exits with error when it finds a sample of zero
> length symbol(i.e. addr == sym->start == sym->end). Actually these are
> valid
Hi Arnaldo,
Can you please review 2nd and 3rd patch.
-Ravi
On Monday 05 December 2016 09:26 PM, Ravi Bangoria wrote:
> For jump instructions that does not include target address as direct
> operand, show the original disassembled line for them. This is needed
> for certain pow
10,r2,-15
▒
BTW, we have lot of such instructions in kernel.
Thanks,
-Ravi
On Monday 05 December 2016 09:26 PM, Ravi Bangoria wrote:
> Arch like powerpc has jump instructions that includes target address
> as second operand. For example, 'bne cr7,0xc00f6154'
mov_DYNAMIC+0x2e8,%rax
movl -bashx16,%fs:(%rax)
mov-bashx,%eax
retq
Signed-off-by: Ravi Bangoria <ravi.bango...@linux.vnet.ibm.com>
---
Changes in v8:
- v7: https://lkml.org/lkml/2016/9/21/436
- Rebased to acme/perf/core.
- No logical c
bctr ca2c
stdr2,24(r1)
addis r12,r2,-1
After:
ld r12,32088(r12)
mtctr r12
v bctr
stdr2,24(r1)
addis r12,r2,-1
Suggested-by: Michael Ellerman <m...@ellerman.id.au>
Signed-off-by: Ravi Bangoria <ravi.bango...@linux.vne
ld r9,2312(r30)
stdr9,1032(r31)
74:ld r9,88(r31)
After patch:
ld r9,1032(r31)
cmpdi cr7,r9,0
v bne74
ld r9,2312(r30)
stdr9,1032(r31)
74:ld r9,88(r31)
Signed-off-by: Ravi Bangoria <ravi.ba
Thanks Michael,
On Tuesday 22 November 2016 05:03 PM, Michael Ellerman wrote:
> Ravi Bangoria <ravi.bango...@linux.vnet.ibm.com> writes:
>
>> Xmon data-breakpoint feature is broken.
>>
>> Whenever there is a watchpoint match occurs, hw_breakpoint_handler will
>>
with NOTIFY_STOP. Similarly, do_break
also returns without notifying to xmon.
Solve this by returning NOTIFY_DONE when hw_breakpoint_handler does not
find any perf_event associated with matched watchpoint.
Signed-off-by: Ravi Bangoria <ravi.bango...@linux.vnet.ibm.com>
---
arch/powerpc/kernel/hw_breakp
On Sunday 06 November 2016 01:01 AM, Anton Blanchard wrote:
> Hi,
>
>> kprobe, uprobe, hw-breakpoint and xmon are the only user of
>> emulate_step.
>>
>> Kprobe / uprobe single-steps instruction if they can't emulate it, so
>> there is no problem with them. As I mention, hw-breakpoint is broken.
On Friday 04 November 2016 07:37 AM, Andrew Donnellan wrote:
> On 03/11/16 21:27, Ravi Bangoria wrote:
>> Yes, kernel-space hw-breakpoint feature is broken on LE without this.
>
> Is there any actual user-visible feature that depends on this, or is this
> solely for debuggi
On Thursday 03 November 2016 03:18 PM, Michael Ellerman wrote:
> Ravi Bangoria <ravi.bango...@linux.vnet.ibm.com> writes:
>
>> On Thursday 03 November 2016 02:34 AM, Anton Blanchard wrote:
>>> Hi Ravi,
>>>
>>>> emulate_step() uses a number of unde
On Thursday 03 November 2016 02:34 AM, Anton Blanchard wrote:
> Hi Ravi,
>
>> emulate_step() uses a number of underlying kernel functions that were
>> initially not enabled for LE. This has been rectified since. So, fix
>> emulate_step() for LE for the corresponding instructions.
> Thanks.
: PASS
[0.764349] emulate_step smoke test: stvx : PASS
[0.764575] emulate_step smoke test: lxvd2x : PASS
[0.764788] emulate_step smoke test: stxvd2x: PASS
[0.764997] emulate_step smoke test: complete.
Signed-off-by: Ravi Bangoria <ravi.ba
These encodings will be used in subsequent patch that test
emulate_step for load/store instructions.
Signed-off-by: Ravi Bangoria <ravi.bango...@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/ppc-opcode.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/powerpc/include/a
emulate_step() uses a number of underlying kernel functions that were
initially not enabled for LE. This has been rectified since. So, fix
emulate_step() for LE for the corresponding instructions.
Reported-by: Anton Blanchard <an...@samba.org>
Signed-off-by: Ravi Bangoria <r
emulation support for all types of (Normal, Floating Point,
Vector and Vector Scalar) load/store instructions.
- Introduce selftest to test emulate_step for load/store instructions.
Ravi Bangoria (3):
powerpc: Emulation support for load/store instructions on LE
powerpc: Add encoding for couple
emulate_step() uses a number of underlying kernel functions that were
initially not enabled for LE. This has been rectified since. So, fix
emulate_step() for LE for the corresponding instructions.
Reported-by: Anton Blanchard <an...@samba.org>
Signed-off-by: Ravi Bangoria <r
On Wednesday 05 October 2016 05:04 PM, Arnaldo Carvalho de Melo wrote:
> Em Wed, Sep 21, 2016 at 09:17:56PM +0530, Ravi Bangoria escreveu:
>> From: Kim Phillips <kim.phill...@arm.com>
>>
>> For ARM we remove the list that contains non-arm insns, and
>> ins
On Wednesday 05 October 2016 05:01 PM, Arnaldo Carvalho de Melo wrote:
> Em Wed, Sep 21, 2016 at 09:17:55PM +0530, Ravi Bangoria escreveu:
>> If jump target is outside of function range, perf is not handling it
>> correctly. Especially when target address is lesser than function s
On Wednesday 05 October 2016 04:58 PM, Arnaldo Carvalho de Melo wrote:
> Em Wed, Sep 21, 2016 at 09:17:54PM +0530, Ravi Bangoria escreveu:
>> Current perf is not able to parse jump instruction when second operand
>> contains target address. Arch like powerpc has such instructions.
On Wednesday 05 October 2016 04:57 PM, Arnaldo Carvalho de Melo wrote:
> Em Wed, Sep 21, 2016 at 09:17:53PM +0530, Ravi Bangoria escreveu:
>> For jump instructions that does not include target address as direct
>> operand, use raw value for that. This is needed for certain power
Hi Arnaldo,
Sorry for little late replies, I was off last week.
Please find my comments.
On Wednesday 05 October 2016 04:49 PM, Arnaldo Carvalho de Melo wrote:
> Em Wed, Sep 21, 2016 at 09:17:51PM +0530, Ravi Bangoria escreveu:
>> Change current data structures and function to enable c
Hello,
Any updates?
Arnaldo, if patches looks good to you, can you please pickup them.
-Ravi
On Wednesday 21 September 2016 09:17 PM, Ravi Bangoria wrote:
> Currently Perf annotate support code navigation (branches and calls)
> only when run on the same architecture where per
On Thursday 22 September 2016 01:04 AM, Kim Phillips wrote:
> On Wed, 21 Sep 2016 21:17:50 +0530
> Ravi Bangoria <ravi.bango...@linux.vnet.ibm.com> wrote:
>
>> Kim, I don't have arm test machine. Can you please help me to test
>> this on arm.
> This works for
r9,1032(r31)
74:ld r9,88(r31)
After patch:
ld r9,1032(r31)
cmpdi cr7,r9,0
v bne74
ld r9,2312(r30)
stdr9,1032(r31)
74:ld r9,88(r31)
Signed-off-by: Ravi Bangoria <ravi.bango...@linux.vnet.ibm.com>
---
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