On Mon, Nov 21, 2016 at 12:52:49PM +0800, yanjiang@windriver.com wrote:
> From: Yanjiang Jin
>
> T4240QDS DMA controller uses the external DMA control signals to start or
> restart a paused DMA transfer, acknowledge a DMA transfer in progress and
> also indicates
On Fri, 2016-11-11 at 17:53 +0200, Madalin Bucur wrote:
> Signed-off-by: Madalin Bucur
> ---
> arch/powerpc/boot/dts/fsl/t1042d4rdb.dts | 47
>
> 1 file changed, 47 insertions(+)
>
> diff --git a/arch/powerpc/boot/dts/fsl/t1042d4rdb.dts
>
On Fri, 2016-10-07 at 11:00 +0200, David Engraf wrote:
> Am 27.09.2016 um 01:08 schrieb Scott Wood:
> >
> > On Mon, 2016-09-26 at 10:48 +0200, David Engraf wrote:
> > >
> > > Am 25.09.2016 um 08:20 schrieb Scott Wood:
> > > >
> > > >
ot;
> code for non-modular drivers.
>
> Since the code was already not using module_init, the init ordering
> remains unchanged with this commit.
>
> Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
>
> Cc: Scott Wood <o...@buserror.net>
>
On Mon, 2016-11-14 at 13:28 +0100, Florian Larysch wrote:
> The T4240RDB contains a W83793 hardware monitoring chip. Add a device
> tree entry to make the driver attach to it, as the i2c-mpc bus driver
> dropped support for class-based instantiation of devices a long time
> ago.
>
>
On Thu, 2016-11-10 at 04:11 +, Y.B. Lu wrote:
> >
> > -Original Message-
> > From: Y.B. Lu
> > Sent: Thursday, November 10, 2016 12:06 PM
> > To: 'Scott Wood'; Ulf Hansson
> > Cc: linux-mmc; Arnd Bergmann; linuxppc-dev@lists.ozlabs.org;
> >
On Wed, 2016-11-09 at 19:27 +0100, Ulf Hansson wrote:
> - i2c-list
>
> On 9 November 2016 at 04:14, Yangbo Lu wrote:
> >
> > This patchset is used to fix a host version register bug in the T4240-
> > R1.0-R2.0
> > eSDHC controller. To match the SoC version and revision, 15
On Fri, 2016-10-28 at 11:32 +0800, Yangbo Lu wrote:
> + guts->regs = of_iomap(np, 0);
> + if (!guts->regs)
> + return -ENOMEM;
> +
> + /* Register soc device */
> + machine = of_flat_dt_get_machine_name();
> + if (machine)
> + soc_dev_attr.machine =
On Wed, 2016-09-21 at 14:57 +0800, Yangbo Lu wrote:
> diff --git a/drivers/soc/fsl/Kconfig b/drivers/soc/fsl/Kconfig
> new file mode 100644
> index 000..b99764c
> --- /dev/null
> +++ b/drivers/soc/fsl/Kconfig
> @@ -0,0 +1,19 @@
> +#
> +# Freescale SOC drivers
> +#
> +
> +source
On 10/23/2016 06:48 PM, Andy Fleming wrote:
> Many of the embedded powerpc boards use an array of device names
> to register the devices from the device tree. Instead, we can use
> of_platform_default_populate(), which will iterate through all the root nodes
> and register them.
>
>
On Thu, 2016-09-29 at 10:21 +, C.H. Zhao wrote:
>
> From: Scott Wood <o...@buserror.net>
> Sent: Thursday, September 29, 2016 4:03 AM
> To: C.H. Zhao
> Cc: linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org; z.chenhui@g
> mail.com; Jason Jin
> Subje
On Tue, 2016-09-27 at 11:05 +, C.H. Zhao wrote:
> From: Scott Wood <o...@buserror.net>
> Sent: Sunday, September 25, 2016 3:24 PM
> To: C.H. Zhao
> Cc: linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org; z.chenhui@g
> mail.com; Jason Jin
> Subject: Re: [v3,
codes of setup arch functions
Scott Wood (1):
powerpc/fsl_pci: Size upper inbound window based on RAM size
Vaishali Thakkar (1):
soc/fsl/qe: Use resource_size
Zhao Qiang (1):
soc/fsl/qe: Use of_adress_to_resource() in get_qe_base()
arch/powerpc/Makefile
On Mon, 2016-09-26 at 01:46 +, Qiang Zhao wrote:
> On Sun, Sep 25, 2016 at 12:19PM -0500, Scott Wood wrote:
>
> >
> > -Original Message-----
> > From: Scott Wood [mailto:o...@buserror.net]
> > Sent: Sunday, September 25, 2016 12:19 PM
> > To: Qi
On Mon, 2016-09-26 at 10:48 +0200, David Engraf wrote:
> Am 25.09.2016 um 08:20 schrieb Scott Wood:
> >
> > On Mon, Aug 22, 2016 at 04:46:43PM +0200, David Engraf wrote:
> > >
> > > The PowerPC e5500/e6500 architecture is based on the e500mc core. Enable
> &
On Tue, Aug 02, 2016 at 07:59:31PM +0800, Chenhui Zhao wrote:
> T104x has deep sleep feature, which can switch off most parts of
> the SoC when it is in deep sleep mode. This way, it becomes more
> energy-efficient.
>
> The DDR controller will also be powered off in deep sleep. Therefore,
> the
On Tue, Sep 06, 2016 at 02:11:57PM -0500, Andy Fleming wrote:
> Cyrus uses GPIOs to complete board shutdown/reset.
> Add nodes to indicate that support to the device tree.
>
> Signed-off-by: Andy Fleming
> ---
> arch/powerpc/boot/dts/fsl/cyrus_p5020.dts | 11 +++
> 1
On 09/16/2016 04:05 PM, Scott Wood wrote:
>>>>I don't see any other platforms doing this. How do the nodes get probed
>>>>for them?
>>>>
>>>>
>>>>The answer is I don't know, but this is a common issue with adding
>>
On Mon, Aug 22, 2016 at 04:46:43PM +0200, David Engraf wrote:
> The PowerPC e5500/e6500 architecture is based on the e500mc core. Enable
> CONFIG_E500 and CONFIG_PPC_E500MC when e5500/e6500 is used.
>
> This will also fix using CONFIG_PPC_QEMU_E500 on PPC64.
>
> Signed-off-by: David Engraf
On Tue, Aug 16, 2016 at 08:26:20AM +0200, Christophe Leroy wrote:
> fixes: 0e6e01ff694ee ("CPM/QE: use genalloc to manage CPM/QE muram")
> Cc: sta...@vger.linux.org
> Signed-off-by: Christophe Leroy
[snip]
> muram_pbase = of_translate_address(np, zero);
> if
On Sat, Sep 24, 2016 at 11:14:11PM -0500, Scott Wood wrote:
> On Fri, Sep 23, 2016 at 10:20:32AM +0800, Zhao Qiang wrote:
> > QE was supported on PowerPC, and dependent on PPC,
> > Now it is supported on other platforms. so remove PPCisms.
> >
> > Signed-off-by: Zha
On Fri, Sep 23, 2016 at 10:20:32AM +0800, Zhao Qiang wrote:
> QE was supported on PowerPC, and dependent on PPC,
> Now it is supported on other platforms. so remove PPCisms.
>
> Signed-off-by: Zhao Qiang
> ---
> Changes for v2:
> - na
> Changes for v3:
> - add
On 09/15/2016 03:03 AM, Andy Fleming wrote:
> I agree that halt and power off mean and have always meant different
> things to the kernel. The problem is that most desktop systems,
> having halted, pass control to the BIOS which--usually--shuts off the
> power. Am I wrong about this? I've been
On Tue, 2016-09-13 at 07:23 +, Y.B. Lu wrote:
> >
> >
> > -Original Message-
> > From: linux-mmc-ow...@vger.kernel.org [mailto:linux-mmc-
> > ow...@vger.kernel.org] On Behalf Of Scott Wood
> > Sent: Tuesday, September 13, 2016 7:25 AM
> &
On Mon, 2016-09-12 at 06:39 +, Y.B. Lu wrote:
> Hi Scott,
>
> Thanks for your review :)
> See my comment inline.
>
> >
> > -Original Message-
> > From: Scott Wood [mailto:o...@buserror.net]
> > Sent: Friday, September 09, 2016 11:47 AM
>
On 09/10/2016 05:05 PM, Andy Fleming wrote:
>
>
> On Tuesday, September 6, 2016, Scott Wood <scott.w...@nxp.com
> <mailto:scott.w...@nxp.com>> wrote:
>
> On 09/06/2016 02:12 PM, Andy Fleming wrote:
> > Boards can implement power and
On 09/10/2016 05:12 PM, Andy Fleming wrote:
>
>
> On Tuesday, September 6, 2016, Scott Wood <scott.w...@nxp.com
> <mailto:scott.w...@nxp.com>> wrote:
>
> On 09/06/2016 02:12 PM, Andy Fleming wrote:
> > This sets up the proper config elements for Powe
river to manage and access global utilities block.
> Initially only reading SVR and registering soc device are supported.
> Other guts accesses, such as reading RCW, should eventually be moved
> into this driver as well.
>
> Signed-off-by: Yangbo Lu <yangbo...@nxp.com>
> Signe
On Mon, 2016-09-05 at 08:42 +0200, Christophe Leroy wrote:
> When the watchdog is in NMI mode, the system reset interrupt is
> generated when the watchdog counter expires.
>
> Signed-off-by: Christophe Leroy
> ---
> arch/powerpc/kernel/head_8xx.S | 2 +-
>
On 09/06/2016 02:12 PM, Andy Fleming wrote:
> Boards can implement power and reset functionality over gpio using
> these drivers:
> drivers/power/reset/gpio-poweroff.c
> drivers/power/reset/gpio-restart.c
>
> While not all corenet boards use gpio for power/reset, this
> support can be added
On 09/06/2016 02:12 PM, Andy Fleming wrote:
> This sets up the proper config elements for Power and Reset to work
> properly (using the gpio pins).
>
> Signed-off-by: Andy Fleming
> ---
> arch/powerpc/Makefile | 5 +
>
On 08/26/2016 12:55 AM, Scott Wood wrote:
> On 08/26/2016 12:26 AM, Tillmann Heidsieck wrote:
>> On 2016-08-24 23:39, Scott Wood wrote:
>>> BTW, for some reason your patch is not showing up in Patchwork.
>>
>> Are there some known pitfalls when sending patches to Patc
trigger the creation of the second inbound window.
It also fixes an off-by-one error that set dma_direct_ops on PCI devices
whose dma mask could address all the space below the DMA offset
(previously 40 bits), but not the window that starts at the DMA offset.
Signed-off-by: Scott Wood <o...@buserror.
On 08/26/2016 12:26 AM, Tillmann Heidsieck wrote:
> Hello Scott,
>
> thanks for the fast reply!
>
> On 2016-08-24 23:39, Scott Wood wrote:
> [..]
>>
>> The second inbound window is at 256G, and it maps all of RAM. Note
>> that
>> for accesses in this
leroy <christophe.le...@c-s.fr>
> > wrote:
> > >
> > > Alessio,
> > >
> > >
> > > Le 05/08/2016 à 09:51, Christophe Leroy a écrit :
> > > >
> > > >
> > > >
> > > >
> > > > Le 19/07/2016 à 23:
On 08/24/2016 02:48 PM, Tillmann Heidsieck wrote:
> For systems with >4G of RAM, the current implementation adds a second
> inbound PCIe window starting at 128G this leaves all memory from 4G to
> 128G inaccessible to inbound PCIe transactions.
The second inbound window is at 256G, and it maps
On Mon, 2016-08-08 at 18:08 +0200, Christophe Leroy wrote:
> Commit 0e6e01ff694ee ("CPM/QE: use genalloc to manage CPM/QE muram")
> has changed the way muram is managed.
> genalloc uses kmalloc(), hence requires the SLAB to be up and running.
>
> On powerpc 8xx, cpm_reset() is called early during
On Fri, 2016-08-05 at 21:20 +, york sun wrote:
> On 08/05/2016 02:09 PM, Scott Wood wrote:
> >
> > On Fri, 2016-08-05 at 20:29 +, york sun wrote:
> > >
> > > On 08/04/2016 08:43 PM, Michael Ellerman wrote:
> > > >
> > > >
On Fri, 2016-08-05 at 20:29 +, york sun wrote:
> On 08/04/2016 08:43 PM, Michael Ellerman wrote:
> >
> > Does the driver really need to use these routines? They're meant for use
> > early in boot, before PCI is setup.
> >
> > AFAICS this is just a regular driver, so when it's probed the PCI
On Tue, 2016-08-02 at 10:07 +0200, Christophe Leroy wrote:
> commit 7aef4136566b0 ("powerpc32: rewrite csum_partial_copy_generic()
> based on copy_tofrom_user()") introduced a bug when destination
> address is odd and initial csum is not null
>
> In that (rare) case the initial csum value has to
On Tue, 2016-08-02 at 05:57 +, Yangbo Lu wrote:
> Hi Scott,
>
> >
> > -Original Message-----
> > From: Scott Wood [mailto:o...@buserror.net]
> > Sent: Wednesday, July 27, 2016 8:38 AM
> > To: Yangbo Lu; Michael Ellerman; Arnd Bergmann; Ulf Hanss
On 08/02/2016 10:34 AM, arvind Yadav wrote:
>
>
> On Tuesday 02 August 2016 01:15 PM, Arnd Bergmann wrote:
>> On Monday, August 1, 2016 4:55:43 PM CEST Scott Wood wrote:
>>> On 08/01/2016 02:02 AM, Arnd Bergmann wrote:
>>>>> diff --git a/include/linux/
On 08/01/2016 02:02 AM, Arnd Bergmann wrote:
> On Sunday, July 31, 2016 4:48:44 PM CEST Arvind Yadav wrote:
>> IS_ERR_VALUE() assumes that parameter is an unsigned long.
>> It can not be used to check if 'unsigned int' is passed insted.
>> Which tends to reflect an error.
>>
>> In 64bit
On Mon, 2016-07-25 at 06:12 +, Yangbo Lu wrote:
> Hi Scott,
>
>
> >
> > -Original Message-
> > From: Scott Wood [mailto:o...@buserror.net]
> > Sent: Friday, July 22, 2016 12:45 AM
> > To: Michael Ellerman; Arnd Bergmann
> > Cc: linux-..
On Tue, 2016-07-26 at 14:22 -0700, Andrey Smirnov wrote:
> On Tue, Jul 26, 2016 at 12:59 AM, Scott Wood <o...@buserror.net> wrote:
> >
> > On Mon, 2016-07-25 at 21:25 -0700, Andrey Smirnov wrote:
> > >
> > > Convert fsl_rstcr_r
On Mon, 2016-07-25 at 21:25 -0700, Andrey Smirnov wrote:
> Convert fsl_rstcr_restart into a function to be registered with
> register_reset_handler() API and introduce fls_rstcr_restart_register()
> function that can be added as an initcall that would do aforementioned
> registration.
>
>
On Mon, 2016-07-25 at 06:15 +, Qiang Zhao wrote:
> On Thu, Jul 07, 2016 at 10:25PM , Jason Cooper wrote:
> >
> > -Original Message-
> > From: Jason Cooper [mailto:ja...@lakedaemon.net]
> > Sent: Thursday, July 07, 2016 10:25 PM
> > To: Qiang Zhao
CONFIG_PIN_TLB handling
powerpc/8xx: add CONFIG_PIN_TLB_IMMR
Claudiu Manoil (1):
powerpc/85xx: Don't report SRAM to L2 cache fallback as error
Scott Wood (1):
powerpc/8xx: Force VIRT_IMMR_BASE to be a positive number
Sriram Dash (2):
powerpc/85xx: Change T1040si USB controller version
On Thu, 2016-07-21 at 20:26 +1000, Michael Ellerman wrote:
> Quoting Scott Wood (2016-07-21 04:31:48)
> >
> > On Wed, 2016-07-20 at 13:24 +0200, Arnd Bergmann wrote:
> > >
> > > On Saturday, July 16, 2016 9:50:21 PM CEST Scott Wood wrote:
> > > &
On Wed, 2016-07-20 at 13:24 +0200, Arnd Bergmann wrote:
> On Saturday, July 16, 2016 9:50:21 PM CEST Scott Wood wrote:
> >
> > From: yangbo lu <yangbo...@nxp.com>
> >
> > Move mpc85xx.h to include/linux/fsl and rename it to svr.h as a common
> > header file
On Tue, 2016-07-19 at 12:00 +0200, Alessio Igor Bogani wrote:
> Hi all,
>
> I have got two boards MVME5100 (MPC7410 cpu) and MVME7100 (MPC8641D
> cpu) for which I use the same cross-compiler (ppc7400).
>
> I tested these against kernel HEAD to found that these don't boot
> anymore (PID 1 crash).
Establish an initial user of fsl_guts_get_svr(), so that the code gets
some test coverage until users outside arch/powerpc can get converted.
Signed-off-by: Scott Wood <o...@buserror.net>
---
arch/powerpc/Kconfig | 1 +
arch/powerpc/sysdev/fsl_pci.c | 6 +-
2 files chan
nd all references to the SVR symbols.
Signed-off-by: Yangbo Lu <yangbo...@nxp.com>
Acked-by: Wolfram Sang <w...@the-dreams.de>
Acked-by: Stephen Boyd <sb...@codeaurora.org>
Acked-by: Joerg Roedel <jroe...@suse.de>
[scottwood: update description]
Signed-off-by: Scott Wood <o..
block.
Initially only reading SVR is supported. Other guts accesses, such as
reading RCW, should eventually be moved into this driver as well.
Signed-off-by: Yangbo Lu <yangbo...@nxp.com>
[scottwood: minor cleanup]
Signed-off-by: Scott Wood <o...@buserror.net>
---
arch/powerpc/platf
r...@kernel.org>
Signed-off-by: Scott Wood <o...@buserror.net>
---
Documentation/devicetree/bindings/{powerpc => soc}/fsl/guts.txt | 3 +++
1 file changed, 3 insertions(+)
rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/guts.txt (91%)
diff --git a/Documentation/d
From: yangbo lu <yangbo...@nxp.com>
Update Freescale DCFG compatible with 'fsl,-dcfg' instead
of 'fsl,ls1021a-dcfg' to include more chips such as ls1021a,
ls1043a, and ls2080a.
Signed-off-by: Yangbo Lu <yangbo...@nxp.com>
Acked-by: Rob Herring <r...@kernel.org>
Signed-off
r(SPRN_SVR) is now discouraged, especially in drivers that are
not PPC-specific.
I plan to send this via the PPC tree for this merge window, to provide a
base for using/extending the guts driver in various drivers in the next
cycle.
Scott Wood (1):
powerpc/fsl-pci: Use fsl_guts_get_svr()
Ya
nate
> > function selection for multiplexed signals,and clock control.
> >
> > This patch adds GUTS driver to manage and access global utilities
> > block.
> >
> > Signed-off-by: Yangbo Lu <yangbo...@nxp.com>
> > Acked-by: Scott Wood <o...@buserr
On 07/11/2016 12:10 PM, Daniel Walker wrote:
> On 07/11/2016 09:55 AM, Scott Wood wrote:
>> On 07/11/2016 11:36 AM, Daniel Walker wrote:
>>> On 07/08/2016 06:12 PM, Scott Wood wrote:
>>>> On 07/07/2016 06:48 PM, Daniel Walker wrote:
>>>>> On 07/07/201
On 07/11/2016 11:36 AM, Daniel Walker wrote:
> On 07/08/2016 06:12 PM, Scott Wood wrote:
>> On 07/07/2016 06:48 PM, Daniel Walker wrote:
>>> On 07/07/2016 03:37 PM, Scott Wood wrote:
>>>> On 07/07/2016 05:01 PM, Daniel Walker wrote:
>>>>> On 07/07/201
in this:
Error: operand out of range (0xfff0 is not between 0x and
0x)
By casting to a larger type, we can force the output to be expressed
as a positive number.
Signed-off-by: Scott Wood <o...@buserror.net>
Cc: Christophe Leroy <christophe.le...@c-s.fr>
---
arch/powerp
On Tue, 2016-05-17 at 14:01 +0200, Christophe Leroy wrote:
> On processors like the 8xx, the machine check exception can also
> happen directly on the load/store instruction itself, so that case
> needs to be handled as well
>
> Signed-off-by: Christophe Leroy
> ---
On 07/07/2016 06:48 PM, Daniel Walker wrote:
> On 07/07/2016 03:37 PM, Scott Wood wrote:
>> On 07/07/2016 05:01 PM, Daniel Walker wrote:
>>> On 07/07/2016 02:59 PM, Scott Wood wrote:
>>>> On 07/07/2016 04:49 PM, Daniel Walker wrote:
>>>>> On 07/07/2016
On Thu, 2016-07-07 at 19:26 -0700, Michael Turquette wrote:
> Quoting Scott Wood (2016-07-06 21:13:23)
> >
> > On Wed, 2016-07-06 at 18:30 -0700, Michael Turquette wrote:
> > >
> > > Quoting Scott Wood (2016-06-15 23:21:25)
> > > >
> > >
On 07/07/2016 04:49 PM, Daniel Walker wrote:
> On 07/07/2016 02:23 PM, Scott Wood wrote:
>>
>> I suspect that add the usage of cspr_ext into the driver would fix the
>> issue we have. It reads like you would find that acceptable ?
>> What specifically i
On 07/07/2016 02:44 PM, Daniel Walker wrote:
> It seems natual that if cspr is in the device tree, you would also want
> cspr_ext because both are used to identify the device. The fact that
> it's missing to me is strange. As I said in my prior email, even if
> uboot sets those, you could have
On 07/07/2016 05:01 PM, Daniel Walker wrote:
> On 07/07/2016 02:59 PM, Scott Wood wrote:
>> On 07/07/2016 04:49 PM, Daniel Walker wrote:
>>> On 07/07/2016 02:23 PM, Scott Wood wrote:
>>>> I suspect that add the usage of cspr_ext into the driver would fix the
>>
On 07/07/2016 03:52 PM, Daniel Walker wrote:
> On 07/07/2016 01:34 PM, Scott Wood wrote:
>> On 07/07/2016 02:44 PM, Daniel Walker wrote:
>>> It seems natual that if cspr is in the device tree, you would also want
>>> cspr_ext because both are used to identify the dev
On 07/07/2016 10:48 AM, Daniel Walker wrote:
> On 07/06/2016 05:57 PM, Scott Wood wrote:
>> On 07/06/2016 03:23 PM, Daniel Walker wrote:
>>> Hi,
>>>
>>> We are using the t1040 platform, and we have found that we need to
>>> populate this reg
On Thu, 2016-07-07 at 10:30 +0200, Arnd Bergmann wrote:
> On Thursday, July 7, 2016 2:35:33 AM CEST Yangbo Lu wrote:
> >
> > Hi Arnd,
> >
> > Could you reply when you see the email?
> > If your method doesn’t resolve the problem, we still want to use our old
> > patchset.
> >
> > This guts
On 07/06/2016 03:23 PM, Daniel Walker wrote:
> Hi,
>
> We are using the t1040 platform, and we have found that we need to
> populate this register. In the Technical Reference Manual it's
> description is section 24.3.2. This option appears in the driver, but it
> doesn't appears to be used
On Wed, 2016-07-06 at 18:30 -0700, Michael Turquette wrote:
> Quoting Scott Wood (2016-06-15 23:21:25)
> >
> > -static struct device_node *cpu_to_clk_node(int cpu)
> > +static struct clk *cpu_to_clk(int cpu)
> > {
> > - struct device_node *np, *clk_np;
&
On Fri, 2016-07-01 at 22:53 +0200, Rafael J. Wysocki wrote:
> On Friday, July 01, 2016 01:55:46 AM Scott Wood wrote:
> >
> > On Thu, 2016-06-30 at 15:29 +0200, Rafael J. Wysocki wrote:
> > >
> > > On Thursday, June 30, 2016 05:46:42 AM Scott Wood wrote:
> >
On Thu, 2016-06-30 at 15:29 +0200, Rafael J. Wysocki wrote:
> On Thursday, June 30, 2016 05:46:42 AM Scott Wood wrote:
> >
> > On 06/29/2016 10:02 PM, Yuantian Tang wrote:
> > >
> > > >
> > > > -Original Message-
> > > > From
On 06/29/2016 10:02 PM, Yuantian Tang wrote:
>> -Original Message-
>> From: Rafael J. Wysocki [mailto:r...@rjwysocki.net]
>> Sent: Thursday, June 30, 2016 10:24 AM
>> To: Yuantian Tang <yuantian.t...@nxp.com>
>> Cc: Scott Wood <o...@buserror.ne
From: Scott Wood <scottw...@freescale.com>
Get the CPU clock's potential parent clocks from the clock interface
itself, rather than manually parsing the clocks property to find a
phandle, looking at the clock-names property of that, and assuming that
those are valid parent clocks for t
From: Scott Wood <scottw...@freescale.com>
Commit fc4a05d4b0eb ("clk: Remove unused provider APIs") removed
__clk_get_num_parents() and clk_hw_get_parent_by_index(), leaving only
true provider API versions that operate on struct clk_hw.
qoriq-cpufreq needs these functions in or
From: Scott Wood <scottw...@freescale.com>
Get the CPU clock's potential parent clocks from the clock interface
itself, rather than manually parsing the clocks property to find a
phandle, looking at the clock-names property of that, and assuming that
those are valid parent clocks for t
From: Scott Wood <scottw...@freescale.com>
Commit fc4a05d4b0eb ("clk: Remove unused provider APIs") removed
__clk_get_num_parents() and clk_hw_get_parent_by_index(), leaving only
true provider API versions that operate on struct clk_hw.
qoriq-cpufreq needs these functions in or
From: Scott Wood <scottw...@freescale.com>
Get the CPU clock's potential parent clocks from the clock interface
itself, rather than manually parsing the clocks property to find a
phandle, looking at the clock-names property of that, and assuming that
those are valid parent clocks for t
From: Scott Wood <scottw...@freescale.com>
Commit fc4a05d4b0eb ("clk: Remove unused provider APIs") removed
__clk_get_num_parents() and clk_hw_get_parent_by_index(), leaving only
true provider API versions that operate on struct clk_hw.
qoriq-cpufreq needs these functions in or
On Thu, 2016-06-02 at 11:01 +0200, Arnd Bergmann wrote:
> On Wednesday, June 1, 2016 8:24:20 PM CEST Scott Wood wrote:
> > On Mon, 2016-05-30 at 15:18 +0200, Arnd Bergmann wrote:
> > > All users of this driver are PowerPC specific and the header file
> > > has no bus
On Thu, 2016-06-02 at 10:52 +0200, Arnd Bergmann wrote:
> On Wednesday, June 1, 2016 8:11:14 PM CEST Scott Wood wrote:
> > > +#define T4240_HOST_VER ((VENDOR_V_23 << SDHCI_VENDOR_VER_SHIFT) |
> > > SDHCI_SPEC_200)
> > > +static const struct so
On Thu, 2016-06-02 at 10:43 +0200, Arnd Bergmann wrote:
> On Wednesday, June 1, 2016 8:47:22 PM CEST Scott Wood wrote:
> > On Mon, 2016-05-30 at 15:15 +0200, Arnd Bergmann wrote:
> > > diff --git a/drivers/soc/fsl/guts.c b/drivers/soc/fsl/guts.c
> > > new file mode 1006
On Wed, 2016-06-08 at 23:21 +1000, Michael Ellerman wrote:
> Commit 74701d5947a6 "powerpc/mm: Rename function to indicate we are
> allocating fragments" renamed page_table_free() to pte_fragment_free().
> One occurrence was mistyped as pte_fragment_fre().
>
> This only breaks the nohash 4K page
On Wed, 2016-06-08 at 09:03 +0200, Christophe Leroy wrote:
> In see in the current ppc kernel that for PPC32, SYS_SUPPORTS_HUGETLBFS
> is selected only if we have PHYS_64BIT.
> What is the reason for only implementing HUGETLBFS with 64 bits phys
> addresses ?
That's not for PPC32 in general --
On Mon, 2016-05-30 at 10:04 +0100, Marwa Hamza wrote:
> hello everyone
> I'm trying to run qemu for powerpc architecture but either
> 1/ i got a black screen with this sentence " QEMU 2.4.0.1 monitor - type
> help for more information"
>(QEMU)
> if i run this command
On Mon, 2016-05-09 at 10:29 +0200, Sebastian Huber wrote:
> Hello,
>
> the "fman" Ethernet driver was integrated in mainline Linux Dezember
> 2015 ("drivers/net/ethernet/freescale/fman"). It seems that the other
> parts, e.g. BMan, QMan ("drivers/soc/fsl/qbman") and basic DPAA Ethernet
>
On Tue, 2016-05-10 at 17:11 -0400, Robert P. J. Day wrote:
> bit of a conundrum here ... we have a legacy MPC8360 system here, on
> which we installed linux built with wind river linux 8. we obviously
> want to push the various bus frequencies to their max for best
> performance, and the device
On Fri, 2016-05-27 at 23:12 +0200, Giuseppe Lippolis wrote:
> Dear All,
> I'm trying with buildroot to build the linux-4.4.3 for an iomega 150d
> machine mounting the mpc8347E sys.
> Due the old U-Boot version is not possible to use the standard uImage, but
> it is needed to set the cuImage target
On Mon, 2016-05-30 at 15:15 +0200, Arnd Bergmann wrote:
> diff --git a/drivers/soc/fsl/guts.c b/drivers/soc/fsl/guts.c
> new file mode 100644
> index ..2f30698f5bcf
> --- /dev/null
> +++ b/drivers/soc/fsl/guts.c
> @@ -0,0 +1,130 @@
> +/*
> + * Freescale QorIQ Platforms GUTS Driver
> +
On Mon, 2016-05-30 at 15:18 +0200, Arnd Bergmann wrote:
> All users of this driver are PowerPC specific and the header file
> has no business in the global include/linux/ hierarchy, so move
> it back before anyone starts using it on ARM.
>
> This reverts commit
On Mon, 2016-05-30 at 15:16 +0200, Arnd Bergmann wrote:
> This is a rewrite of an earlier patch from Yangbo Lu, adding a quirk
> for the NXP QorIQ T4240 in the detection of the host device version.
>
> Unfortunately, this device cannot be detected using the compatible
> string, as we have to
On 05/24/2016 10:07 AM, Claudiu Manoil wrote:
> If the SRAM region parameters are missing the SRAM driver
> probing exits and the L2 region is configured as L2 cache
> entirely. This is the expected default behaviour, so it
> makes no sense to report it as an error.
>
> Signed-off-by: Claudiu
On Tue, 2016-05-17 at 01:18 +, Qiang Zhao wrote:
> On Tue, May 17, 2016 at 07:22AM, Scott Wood wrote:
> > -Original Message-
> > From: Scott Wood [mailto:o...@buserror.net]
> > Sent: Tuesday, May 17, 2016 7:22 AM
> > To: Qiang Zhao <qiang.z...@nxp.c
(1):
powerpc/fsl: Fix SPI compatible on t208xrdb and t1040rdb
Scott Wood (1):
powerpc/fsl: Remove FSL_SOC dependency from FSL_LBC
chenhui zhao (1):
powerpc/fsl-pci: Add a workaround for PCI 5 errata
arch/powerpc/Kconfig | 1 -
arch/powerpc/boot
On Wed, Apr 27, 2016 at 10:35:25AM +0200, Alessio Igor Bogani wrote:
> + bcsr@4,0 {
> + compatible = "artesyn,mvme7100-bcsr";
> + reg = <4 0 0x1>;
> + };
> +
> +serial@5,1000 {
> + cell-index = <2>;
On Wed, Mar 09, 2016 at 09:21:28AM +0800, Zhao Qiang wrote:
> Add IC, SI and SIRAM document of QE to
> Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
>
> Signed-off-by: Zhao Qiang
> Acked-by: Rob Herring
> ---
> changes for v2
> - Add
On Fri, 2016-05-13 at 11:25 +0200, Christophe Leroy wrote:
> Le 11/05/2016 à 22:38, Scott Wood a écrit :
> > On Wed, 2016-05-11 at 17:03 +0200, Christophe Leroy wrote:
> > > Memory: 124428K/131072K available (3748K kernel code, 188K rwdata,
> > > 648K rodata, 508K ini
On Mon, 2016-05-16 at 11:40 +1000, Michael Ellerman wrote:
> On Fri, 2016-05-13 at 17:41 -0700, Daniel Walker wrote:
>
> > Hi,
> >
> > I noticed that udbg is missing for fsl booke , or at least it doesn't
> > appear to be implemented. I don't know a great deal about fsl book. I'm
> > working
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