[PATCH v2 07/18] powerpc/85xx: Implement 64-bit kexec support

From: Tiejun Chen <tiejun.c...@windriver.com> Unlike 32-bit 85xx kexec, we don't do a core reset. Signed-off-by: Tiejun Chen <tiejun.c...@windriver.com> [scottwood: edit changelog, and cleanup] Signed-off-by: Scott Wood <scottw...@freescale.com> --- arch/powerpc/platfor

[PATCH v2 10/18] powerpc/booke64: Fix args to copy_and_flush

enter with the kernel at zero and thus skip copy_to_flush -- but it will be needed for kexec support. Signed-off-by: Tiejun Chen <tiejun.c...@windriver.com> [scottwood: split patch and rewrote changelog] Signed-off-by: Scott Wood <scottw...@freescale.com> --- arch/powerpc/kernel/head_64.S | 11 +

[PATCH v2 11/18] powerpc/book3e: support CONFIG_RELOCATABLE

n boot a relocated kernel, we should reset ipvr properly again after .relocate. Signed-off-by: Tiejun Chen <tiejun.c...@windriver.com> [scottwood: cleanup and ifdef removal] Signed-off-by: Scott Wood <scottw...@freescale.com> --- arch/powerpc/include/asm/exception-64e.h | 4 ++-- arch/powerpc

[PATCH v2 12/18] powerpc/book3e/kdump: Enable crash_kexec_wait_realmode

While book3e doesn't have "real mode", we still want to wait for all the non-crash cpus to complete their shutdown. Signed-off-by: Scott Wood <scottw...@freescale.com> --- arch/powerpc/kernel/crash.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arc

[PATCH v2 14/18] powerpc/book3e-64/kexec: create an identity TLB mapping

] Signed-off-by: Scott Wood <scottw...@freescale.com> --- arch/powerpc/kernel/misc_64.S | 52 ++- 1 file changed, 51 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S index 6e4168c..246ad8c 100644 --- a/a

[PATCH v2 13/18] powerpc/book3e-64: Don't limit paca to 256 MiB

This limit only makes sense on book3s, and on book3e it can cause problems with kdump if we don't have any memory under 256 MiB. Signed-off-by: Scott Wood <scottw...@freescale.com> --- arch/powerpc/kernel/paca.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git

[PATCH v2 15/18] powerpc/book3e-64/kexec: Enable SMP release

that up. Instead, kexec-tools will set a boolean property linux,booted-from-kexec in the /chosen node. Signed-off-by: Scott Wood <scottw...@freescale.com> Cc: devicet...@vger.kernel.org --- v2: Use a device tree property instead of a flag in the kernel image This depends on the kexec-tools pa

[PATCH v2 16/18] powerpc/booke: Only use VIRT_PHYS_OFFSET on booke32

booke-32 will use VIRT_PHYS_OFFSET, so given the issues with its calculation, restrict its definition to booke-32. Signed-off-by: Scott Wood <scottw...@freescale.com> --- arch/powerpc/include/asm/page.h | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/i

[PATCH v2 17/18] powerpc/book3e-64/kexec: Set "r4 = 0" when entering spinloop

book3e_secondary_core_init will only create a TLB entry if r4 = 0, so do so. Signed-off-by: Scott Wood <scottw...@freescale.com> --- arch/powerpc/kernel/misc_64.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S index 2

[PATCH v2 18/18] powerpc/book3e-64: Enable kexec

From: Tiejun Chen <tiejun.c...@windriver.com> Allow KEXEC for book3e, and bypass or convert non-book3e stuff in kexec code. Signed-off-by: Tiejun Chen <tiejun.c...@windriver.com> [scottw...@freescale.com: move code to minimize diff, and cleanup] Signed-off-by: Scott Wood <scottw..

Re: [PATCH v2 01/25] powerpc/8xx: Save r3 all the time in DTLB miss handler

On Tue, 2015-10-06 at 22:30 +0200, christophe leroy wrote: > Le 06/10/2015 18:46, Scott Wood a écrit : > > On Tue, 2015-10-06 at 15:35 +0200, Christophe Leroy wrote: > > > Le 29/09/2015 00:07, Scott Wood a écrit : > > > > On Tue, Sep 22, 2015 at 06:50:29PM

[PATCH v2 1/3] ppc64: Fix warnings

long arguments to be passed as int. Signed-off-by: Scott Wood <scottw...@freescale.com> --- v2: no change kexec/arch/ppc64/crashdump-ppc64.c | 3 ++- kexec/arch/ppc64/kexec-elf-ppc64.c | 9 + 2 files changed, 3 insertions(+), 9 deletions(-) diff --git a/kexec/arch/ppc64/crashdump

[PATCH v2 2/3] ppc64: Avoid rfid if no need to clear MSR_LE

fact that MSR_LE should never be set on book3e, and the rfid is only needed if MSR_LE is set (and thus needs to be cleared). In theory that MSR bit is reserved on book3e, rather than zero, but in practice I have not seen it set. Signed-off-by: Scott Wood <scottw...@freescale.com> Cc: Samuel Me

[PATCH v2 3/3] ppc64: Add a flag to tell the kernel it's booting from kexec

communication between the kernel and kexec to set that up. Signed-off-by: Scott Wood <scottw...@freescale.com> --- v2: Use a device tree property rather than setting a flag in the kernel image, as requested by Michael Ellerman. --- kexec/arch/ppc64/Makefile | 6 +++ kexec/arch/ppc64

Re: [kexec-lite PATCH V2] trampoline: Reset primary cpu endian to big-endian

On Wed, 2015-07-08 at 13:49 +1000, Samuel Mendoza-Jonas wrote: > On 08/07/15 13:37, Scott Wood wrote: > > On Wed, 2015-07-08 at 13:29 +1000, Samuel Mendoza-Jonas wrote: > > > Older big-endian ppc64 kernels don't include the FIXUP_ENDIAN check, > > > meaning if we kexec

Re: [PATCH v2 13/25] powerpc/8xx: also use r3 in the ITLB miss in all situations

On Tue, 2015-10-06 at 16:12 +0200, Christophe Leroy wrote: > Le 29/09/2015 02:00, Scott Wood a écrit : > > On Tue, Sep 22, 2015 at 06:50:54PM +0200, Christophe Leroy wrote: > > > We are spending between 40 and 160 cycles with a mean of 65 cycles > > > in the TLB

Re: [PATCH v2 15/25] powerpc/8xx: move 8xx SPRN defines into reg_8xx.h and add some missing ones

On Tue, 2015-10-06 at 16:35 +0200, Christophe Leroy wrote: > Le 29/09/2015 02:03, Scott Wood a écrit : > > On Tue, Sep 22, 2015 at 06:50:58PM +0200, Christophe Leroy wrote: > > > Move 8xx SPRN defines into reg_8xx.h and add some missing ones > > > > >

Re: [PATCH v2 01/25] powerpc/8xx: Save r3 all the time in DTLB miss handler

On Tue, 2015-10-06 at 15:35 +0200, Christophe Leroy wrote: > Le 29/09/2015 00:07, Scott Wood a écrit : > > On Tue, Sep 22, 2015 at 06:50:29PM +0200, Christophe Leroy wrote: > > > We are spending between 40 and 160 cycles with a mean of 65 cycles in > > > the TLB

Re: [PATCH v2 01/25] powerpc/8xx: Save r3 all the time in DTLB miss handler

On Tue, 2015-10-06 at 15:35 +0200, Christophe Leroy wrote: > Le 29/09/2015 00:07, Scott Wood a écrit : > > On Tue, Sep 22, 2015 at 06:50:29PM +0200, Christophe Leroy wrote: > > > We are spending between 40 and 160 cycles with a mean of 65 cycles in > > > the TLB

Re: [PATCH v3 1/2] fsl: Add binding for RCPM

On Thu, 2015-10-01 at 12:05 -0500, Yoder Stuart-B08248 wrote: > > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > @@ -0,0 +1,63 @@ > > +* Run Control and Power Management > > +--- > > +The RCPM performs all device-level tasks associated with

Re: [RFC PATCH 0/8] clk: qoriq: Move chip-specific knowledge into driver

[Resending to updated e-mail address] On Tue, 2015-08-11 at 11:25 -0700, Michael Turquette wrote: > Hi Scott, > > Quoting Scott Wood (2015-06-18 19:49:10) > > The existing device tree bindings are error-prone and inflexible. > > Correct the mistake by moving the knowledge i

Re: [RFC PATCH 0/8] clk: qoriq: Move chip-specific knowledge into driver

On Tue, 2015-08-11 at 11:25 -0700, Michael Turquette wrote: > Hi Scott, > > Quoting Scott Wood (2015-06-18 19:49:10) > > The existing device tree bindings are error-prone and inflexible. > > Correct the mistake by moving the knowledge into the driver, which > > has mor

Re: [v3 1/8] devres: add devm_alloc_percpu()

On Thu, Sep 24, 2015 at 06:00:12PM +0300, Madalin Bucur wrote: > Introduce managed counterparts for alloc_percpu() and free_percpu(). > Add devm_alloc_percpu() and devm_free_percpu() into the managed > interfaces list. > > Signed-off-by: Madalin Bucur > Tested-by:

Re: [v5, 2/6] fsl/fman: Add FMan support

On Thu, Sep 24, 2015 at 12:10:34PM +0300, igal.liber...@freescale.com wrote: > +int fman_get_rx_extra_headroom(void) > +{ > + static bool fm_check_rx_extra_headroom; > + > + if (!fm_check_rx_extra_headroom) { > + if (fsl_fm_rx_extra_headroom > FSL_FM_RX_EXTRA_HEADROOM_MAX || >

Re: [PATCH 00/31] powerpc/mm: Update page table format for book3s 64

On Mon, 2015-09-28 at 10:26 +0530, Aneesh Kumar K.V wrote: > Scott Wood <scottw...@freescale.com> writes: > > > On Tue, 2015-09-22 at 12:18 +0530, Aneesh Kumar K.V wrote: > > > Scott Wood <scottw...@freescale.com> writes: > > > > > > > On

Re: [PATCH v8 1/4] perf,kvm/{x86,s390}: Remove dependency on uapi/kvm_perf.h

On Mon, 2015-09-28 at 08:31 -0600, David Ahern wrote: > On 9/28/15 7:00 AM, Alexander Yarygin wrote: > > > diff --git a/tools/perf/builtin-kvm.c b/tools/perf/builtin-kvm.c > > > index fc1cffb..ef25fcf 100644 > > > --- a/tools/perf/builtin-kvm.c > > > +++ b/tools/perf/builtin-kvm.c > > > @@ -31,20

Re: [PATCH v2 06/25] powerpc32: iounmap() cannot vunmap() area mapped by TLBCAMs either

On Tue, Sep 22, 2015 at 06:50:40PM +0200, Christophe Leroy wrote: > iounmap() cannot vunmap() area mapped by TLBCAMs either > > Signed-off-by: Christophe Leroy > --- > No change in v2 > > arch/powerpc/mm/pgtable_32.c | 4 +++- > 1 file changed, 3 insertions(+), 1

Re: [PATCH v2 01/25] powerpc/8xx: Save r3 all the time in DTLB miss handler

On Tue, Sep 22, 2015 at 06:50:29PM +0200, Christophe Leroy wrote: > We are spending between 40 and 160 cycles with a mean of 65 cycles in > the TLB handling routines (measured with mftbl) so make it more > simple althought it adds one instruction. > > Signed-off-by: Christophe Leroy

Re: [PATCH v2 05/25] powerpc/8xx: Fix vaddr for IMMR early remap

On Tue, Sep 22, 2015 at 06:50:38PM +0200, Christophe Leroy wrote: > Memory: 124428K/131072K available (3748K kernel code, 188K rwdata, > 648K rodata, 508K init, 290K bss, 6644K reserved) > Kernel virtual memory layout: > * 0xfffdf000..0xf000 : fixmap > * 0xfde0..0xfe00 :

Re: [PATCH v2 07/25] powerpc32: refactor x_mapped_by_bats() and x_mapped_by_tlbcam() together

On Tue, Sep 22, 2015 at 06:50:42PM +0200, Christophe Leroy wrote: > x_mapped_by_bats() and x_mapped_by_tlbcam() serve the same kind of > purpose, so lets group them into a single function. > > Signed-off-by: Christophe Leroy > --- > No change in v2 > >

Re: [PATCH v2 08/25] powerpc/8xx: Map IMMR area with 512k page at a fixed address

On Tue, Sep 22, 2015 at 06:50:44PM +0200, Christophe Leroy wrote: > diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c > index 3fd9083..1f2fdbc 100644 > --- a/arch/powerpc/mm/pgtable_32.c > +++ b/arch/powerpc/mm/pgtable_32.c > @@ -49,6 +49,10 @@ EXPORT_SYMBOL(ioremap_bot);

Re: [PATCH v2 11/25] powerpc/8xx: map 16M RAM at startup

On Tue, Sep 22, 2015 at 06:50:50PM +0200, Christophe Leroy wrote: > On recent kernels, with some debug options like for instance > CONFIG_LOCKDEP, the BSS requires more than 8M memory, allthough > the kernel code fits in the first 8M. > Today, it is necessary to activate CONFIG_PIN_TLB to get more

Re: [PATCH v2 20/25] powerpc32: Remove clear_pages() and define clear_page() inline

On Tue, Sep 22, 2015 at 06:51:09PM +0200, Christophe Leroy wrote: > clear_pages() is never used, and PPC32 is the only architecture > (still) having this function. Neither PPC64 nor any other > architecture has it. It is used, by clear_page(). > This patch removes clear_page() and move

Re: [PATCH v2 22/25] powerpc32: move xxxxx_dcache_range() functions inline

On Tue, Sep 22, 2015 at 06:51:13PM +0200, Christophe Leroy wrote: > flush/clean/invalidate _dcache_range() functions are all very > similar and are quite short. They are mainly used in __dma_sync() > perf_event locate them in the top 3 consumming functions during > heavy ethernet activity > >

Re: [PATCH v2 14/25] powerpc32: remove ioremap_base

On Tue, Sep 22, 2015 at 06:50:56PM +0200, Christophe Leroy wrote: > ioremap_base is not initialised and is nowhere used so remove it > > Signed-off-by: Christophe Leroy > --- > No change in v2 Could you also clean up the references to ioremap_base in the comments?

Re: [PATCH v2 13/25] powerpc/8xx: also use r3 in the ITLB miss in all situations

On Tue, Sep 22, 2015 at 06:50:54PM +0200, Christophe Leroy wrote: > We are spending between 40 and 160 cycles with a mean of 65 cycles > in the TLB handling routines (measured with mftbl) so make it more > simple althought it adds one instruction > > Signed-off-by: Christophe Leroy

Re: [PATCH v2 15/25] powerpc/8xx: move 8xx SPRN defines into reg_8xx.h and add some missing ones

On Tue, Sep 22, 2015 at 06:50:58PM +0200, Christophe Leroy wrote: > Move 8xx SPRN defines into reg_8xx.h and add some missing ones > > Signed-off-by: Christophe Leroy > --- > No change in v2 Why are they being moved? Why are they being separated from the bit

Re: [PATCH v2 21/25] powerpc: add inline functions for cache related instructions

On Tue, Sep 22, 2015 at 06:51:11PM +0200, Christophe Leroy wrote: > This patch adds inline functions to use dcbz, dcbi, dcbf, dcbst > from C functions > > Signed-off-by: Christophe Leroy > --- > New in v2 > > arch/powerpc/include/asm/cache.h | 19 +++ >

Re: [PATCH v3 5/5] cpufreq: qoriq: Don't look at clock implementation details

On Fri, 2015-09-25 at 23:42 +0200, Rafael J. Wysocki wrote: > On Tuesday, September 22, 2015 12:46:54 PM Viresh Kumar wrote: > > On 19-09-15, 23:29, Scott Wood wrote: > > > Get the CPU clock's potential parent clocks from the clock interface > > > itself, rather than

Re: [PATCH v2 08/25] powerpc/8xx: Map IMMR area with 512k page at a fixed address

On Fri, 2015-09-25 at 14:46 +, David Laight wrote: > From: Scott Wood > > Sent: 24 September 2015 21:14 > > > Isn't this a more general problem? > > > > > > If there are multiple remap requests for the same physical page > > > shouldn't th

Re: [V5, 2/6] fsl/fman: Add FMan support

On Mon, Sep 21, 2015 at 02:52:34PM +0300, Igal.Liberman wrote: > diff --git a/drivers/net/ethernet/freescale/fman/fman.c > b/drivers/net/ethernet/freescale/fman/fman.c > new file mode 100644 > index 000..924685f > --- /dev/null > +++ b/drivers/net/ethernet/freescale/fman/fman.c > @@ -0,0

Re: [PATCH v3 1/2] fsl: Add binding for RCPM

On Thu, 2015-09-24 at 16:29 +0800, Dongsheng Wang wrote: > +* Freescale RCPM Wakeup Source Device Tree Bindings > +--- > +Required rcpm-wakeup property should be added to a device node if the > device > +can be used as a wakeup source. > + > + -

Re: [PATCH] powerpc/e6500: add TMCFG0 register definition

++ > 1 file changed, 6 insertions(+) Acked-by: Scott Wood <scottw...@freescale.com> -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev

Re: [PATCH V3] thermal: qoriq: Add thermal management support

On Wed, 2015-09-23 at 16:28 +0800, Jia Hongtao wrote: > This driver add thermal management support by enabling TMU (Thermal > Monitoring Unit) on QorIQ platform. > > It's based on thermal of framework: > - Trip points defined in device tree. > - Cpufreq as cooling device registered in qoriq

Re: [PATCH v2 08/25] powerpc/8xx: Map IMMR area with 512k page at a fixed address

On Thu, 2015-09-24 at 11:41 +, David Laight wrote: > From: Christophe Leroy > > Sent: 22 September 2015 17:51 > ... > > Traditionaly, each driver manages one computer board which has its > > own components with its own memory maps. > > But on embedded chips like the MPC8xx, the SOC has all

Re: [PATCH v10 3/5] CPM/QE: use genalloc to manage CPM/QE muram

On Wed, 2015-09-23 at 00:28 -0500, Zhao Qiang-B45475 wrote: > On Wen, Sep 23, 2015 at 12:03 AM +0800, Wood Scott-B07421 wrote: > > > -Original Message- > > From: Wood Scott-B07421 > > Sent: Wednesday, September 23, 2015 12:03 PM > > To: Zhao Qiang-B45475 > > Cc:

Re: [PATCH 15/19] KVM: PPC: e500: fix handling local_sid_lookup result

rpc/kvm/e500.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) Acked-by: Scott Wood <scottw...@freescale.com> -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev

Re: [PATCH v3 1/2] fsl: Add binding for RCPM

On Thu, 2015-09-24 at 21:38 -0500, Wang Dongsheng-B40534 wrote: > > > +* Freescale RCPM Wakeup Source Device Tree Bindings > > > +--- > > > +Required rcpm-wakeup property should be added to a device node if the > > > device > > > +can be used as a wakeup

Re: [PATCH v10 3/5] CPM/QE: use genalloc to manage CPM/QE muram

On Thu, 2015-09-24 at 21:50 -0500, Zhao Qiang-B45475 wrote: > On Fri, Sep 25, 2015 at 7:30 AM +0800, Wood Scott-B07421 wrote: > > -Original Message- > > From: Wood Scott-B07421 > > Sent: Friday, September 25, 2015 7:30 AM > > To: Zhao Qiang-B45475 > > Cc: linux-ker...@vger.kernel.org;

Re: [PATCH V3] thermal: qoriq: Add thermal management support

On Thu, 2015-09-24 at 22:09 -0500, Jia Hongtao-B38951 wrote: > > -Original Message- > > From: Wood Scott-B07421 > > Sent: Friday, September 25, 2015 6:10 AM > > To: Jia Hongtao-B38951 > > Cc: edubez...@gmail.com; linux...@vger.kernel.org; linuxppc- > > d...@lists.ozlabs.org > > Subject:

Re: [PATCH v2 22/25] powerpc32: move xxxxx_dcache_range() functions inline

On Tue, 2015-09-22 at 19:34 +, Joakim Tjernlund wrote: > On Tue, 2015-09-22 at 13:58 -0500, Scott Wood wrote: > > On Tue, 2015-09-22 at 18:12 +, Joakim Tjernlund wrote: > > > On Tue, 2015-09-22 at 18:51 +0200, Christophe Leroy wrote: > > > > flush/clean/invali

Re: [PATCH v2 22/25] powerpc32: move xxxxx_dcache_range() functions inline

On Tue, 2015-09-22 at 18:12 +, Joakim Tjernlund wrote: > On Tue, 2015-09-22 at 18:51 +0200, Christophe Leroy wrote: > > flush/clean/invalidate _dcache_range() functions are all very > > similar and are quite short. They are mainly used in __dma_sync() > > perf_event locate them in the top 3

Re: [PATCH 00/31] powerpc/mm: Update page table format for book3s 64

On Tue, 2015-09-22 at 12:18 +0530, Aneesh Kumar K.V wrote: > Scott Wood <scottw...@freescale.com> writes: > > > On Mon, 2015-09-21 at 12:10 +0530, Aneesh Kumar K.V wrote: > > > Hi All, > > > > > > This patch series attempt to update book3s 64

Re: [PATCH 09/31] powerpc/mm: Don't use pte_val as lvalue

On Tue, 2015-09-22 at 12:14 +0530, Aneesh Kumar K.V wrote: > Scott Wood <scottw...@freescale.com> writes: > > > On Mon, Sep 21, 2015 at 12:10:36PM +0530, Aneesh Kumar K.V wrote: > > > +static inline pte_t pte_mkwrite(pte_t pte) > > > +{ > > > + pte_bas

Re: [PATCH v10 5/5] QE: Move QE from arch/powerpc to drivers/soc

On Tue, 2015-09-22 at 03:24 -0500, Zhao Qiang-B45475 wrote: > On Tue, Sep 22, 2015 at 06:56 AM +0800, Wood Scott-B07421 wrote: > > > -Original Message- > > From: Wood Scott-B07421 > > Sent: Tuesday, September 22, 2015 6:56 AM > > To: Zhao Qiang-B45475 > > Cc: linux-ker...@vger.kernel.org;

Re: [PATCH v2 22/25] powerpc32: move xxxxx_dcache_range() functions inline

On Tue, 2015-09-22 at 19:55 +, Joakim Tjernlund wrote: > On Tue, 2015-09-22 at 14:42 -0500, Scott Wood wrote: > > On Tue, 2015-09-22 at 19:34 +, Joakim Tjernlund wrote: > > > On Tue, 2015-09-22 at 13:58 -0500, Scott Wood wrote: > > > > On Tue, 2015-09-22 at

Re: [PATCH v2 22/25] powerpc32: move xxxxx_dcache_range() functions inline

On Tue, 2015-09-22 at 20:32 +, Joakim Tjernlund wrote: > On Tue, 2015-09-22 at 15:14 -0500, Scott Wood wrote: > > On Tue, 2015-09-22 at 19:55 +, Joakim Tjernlund wrote: > > > On Tue, 2015-09-22 at 14:42 -0500, Scott Wood wrote: > > > > On Tue, 2015-09-22 at

Re: [PATCH v10 3/5] CPM/QE: use genalloc to manage CPM/QE muram

On Tue, 2015-09-22 at 21:20 -0500, Zhao Qiang-B45475 wrote: > On Wen, Sep 23, 2015 at 8:19 AM +0800, Wood Scott-B07421 wrote: > > > > > > { > > > > > - int ret; > > > > > + > > > > > + unsigned long start; > > > > > unsigned long flags; > > > > > + unsigned long size_alloc = size; struct

Re: [PATCH 04/17] powerpc: mpic: use IRQCHIP_SKIP_SET_WAKE instead of redundant mpic_irq_set_wake

: Michael Ellerman <m...@ellerman.id.au> > Cc: Scott Wood <scottw...@freescale.com> > Cc: Hongtao Jia <hongtao@freescale.com> > Cc: Marc Zyngier <marc.zyng...@arm.com> > Cc: linuxppc-dev@lists.ozlabs.org > Signed-off-by: Sudeep Holla <sudeep.ho...@arm.com

Re: [PATCH v10 3/5] CPM/QE: use genalloc to manage CPM/QE muram

On Tue, 2015-09-22 at 03:10 -0500, Zhao Qiang-B45475 wrote: > On Tue, Sep 22, 2015 at 06:47 AM +0800, Wood Scott-B07421 wrote: > > -Original Message- > > From: Wood Scott-B07421 > > Sent: Tuesday, September 22, 2015 6:47 AM > > To: Zhao Qiang-B45475 > > Cc: linux-ker...@vger.kernel.org;

Re: [PATCH v2 22/25] powerpc32: move xxxxx_dcache_range() functions inline

On Wed, 2015-09-23 at 00:49 +0200, Christophe Leroy wrote: > Le 23/09/2015 00:34, Scott Wood a écrit : > > On Tue, 2015-09-22 at 22:57 +0200, Christophe Leroy wrote: > > > > Here is what I get in asm. First one is with "if (i) mb();". We see > > > >

Re: [PATCH 04/17] powerpc: mpic: use IRQCHIP_SKIP_SET_WAKE instead of redundant mpic_irq_set_wake

: Michael Ellerman <m...@ellerman.id.au> > Cc: Scott Wood <scottw...@freescale.com> > Cc: Hongtao Jia <hongtao@freescale.com> > Cc: Marc Zyngier <marc.zyng...@arm.com> > Cc: linuxppc-dev@lists.ozlabs.org > Signed-off-by: Sudeep Holla <sudeep.ho...@arm.com

Re: [PATCH v2 22/25] powerpc32: move xxxxx_dcache_range() functions inline

On Tue, 2015-09-22 at 22:57 +0200, Christophe Leroy wrote: > Here is what I get in asm. First one is with "if (i) mb();". We see gcc > puts a beqlr. This is the form that is closest to what we had in the > former misc_32.S > Second one if with "mb()". Here we get a branch to sync for a useless

Re: [PATCH] powerpc: fsl_pci: cast the regs->nip to void * when passing it to probe_kernel_address()

On Mon, 2015-09-21 at 17:22 +0800, Kevin Hao wrote: > With the reimplementation of probe_kernel_address() in commit > ecc83243e1d4 ("uaccess: reimplement probe_kernel_address() using > probe_kernel_read()"), the explication of the cast for the addr > parameter has been dropped. So we have to

Re: [PATCH v10 4/5] QE/CPM: move muram management functions to qe_common

On Mon, 2015-09-21 at 22:06 -0500, Zhao Qiang-B45475 wrote: > On Tue, Sep 22, 2015 at 10:26AM +0800, Wood Scott-B07421 wrote: > > > -Original Message- > > From: Wood Scott-B07421 > > Sent: Tuesday, September 22, 2015 10:26 AM > > To: Zhao Qiang-B45475 > > Cc: linux-ker...@vger.kernel.org;

Re: [PATCH v10 4/5] QE/CPM: move muram management functions to qe_common

On Mon, 2015-09-21 at 22:22 -0500, Zhao Qiang-B45475 wrote: > On Tue, Sep 22, 2015 at 11:08AM +0800, Wood Scott-B07421 wrote: > > > -Original Message- > > From: Wood Scott-B07421 > > Sent: Tuesday, September 22, 2015 11:08 AM > > To: Zhao Qiang-B45475 > > Cc: linux-ker...@vger.kernel.org;

Re: [PATCH v10 5/5] QE: Move QE from arch/powerpc to drivers/soc

On Fri, Sep 18, 2015 at 03:15:21PM +0800, Zhao Qiang wrote: > diff --git a/drivers/soc/fsl/qe/Kconfig b/drivers/soc/fsl/qe/Kconfig > new file mode 100644 > index 000..3012571 > --- /dev/null > +++ b/drivers/soc/fsl/qe/Kconfig > @@ -0,0 +1,33 @@ > +# > +# QE Communication options > +# > + >

Re: [PATCH 09/31] powerpc/mm: Don't use pte_val as lvalue

On Mon, Sep 21, 2015 at 12:10:36PM +0530, Aneesh Kumar K.V wrote: > +static inline pte_t pte_mkwrite(pte_t pte) > +{ > + pte_basic_t ptev; > + > + ptev = pte_val(pte) & ~_PAGE_RO; > + ptev |= _PAGE_RW; > + return __pte(pte); > +} s/__pte(pte)/__pte(ptev)/ ...to fix an endless

Re: [PATCH 10/31] powerpc/mm: Don't use pmd_val, pud_val and pgd_val as lvalue

On Mon, Sep 21, 2015 at 12:10:37PM +0530, Aneesh Kumar K.V wrote: > /* PUD level exusts only on 4k pages */ > #ifndef CONFIG_PPC_64K_PAGES > typedef struct { unsigned long pud; } pud_t; > -#define pud_val(x) ((x).pud) > #define __pud(x) ((pud_t) { (x) }) > +static inline unsigned long

Re: [PATCH v10 4/5] QE/CPM: move muram management functions to qe_common

On Mon, 2015-09-21 at 21:23 -0500, Zhao Qiang-B45475 wrote: > On Tue, Sep 22, 2015 at 06:54AM +0800, Wood Scott-B07421 wrote: > > -Original Message- > > From: Wood Scott-B07421 > > Sent: Tuesday, September 22, 2015 6:54 AM > > To: Zhao Qiang-B45475 > > Cc: linux-ker...@vger.kernel.org;

Re: [PATCH v10 3/5] CPM/QE: use genalloc to manage CPM/QE muram

On Fri, Sep 18, 2015 at 03:15:19PM +0800, Zhao Qiang wrote: > Use genalloc to manage CPM/QE muram instead of rheap. > > Signed-off-by: Zhao Qiang > --- > Changes for v9: > - splitted from patch 3/5, modify cpm muram management functions. > Changes for v10: >

Re: [PATCH v10 4/5] QE/CPM: move muram management functions to qe_common

On Fri, Sep 18, 2015 at 03:15:20PM +0800, Zhao Qiang wrote: > QE and CPM have the same muram, they use the same management > functions. Now QE support both ARM and PowerPC, it is necessary > to move QE to "driver/soc", so move the muram management functions > from cpm_common to qe_common for

Re: [PATCH 03/31] powerpc/mm: make a separate copy for book3s

On Mon, 2015-09-21 at 12:10 +0530, Aneesh Kumar K.V wrote: > In this patch we do: > cp pgtable-ppc32.h book3s/32/pgtable.h > cp pgtable-ppc64.h book3s/64/pgtable.h > > This enable us to do further changes to hash specific config. > We will change the page table format for 64bit hash in later

Re: [BUG] Revert 0b05e2d671c4 'powerpc/32: cacheable_memcpy becomes memcpy'

On Mon, 2015-09-21 at 17:10 +1000, Michael Ellerman wrote: > On Fri, 2015-09-18 at 16:45 +0200, Thomas Gleixner wrote: > > On Fri, 18 Sep 2015, Segher Boessenkool wrote: > > > > > On Fri, Sep 18, 2015 at 08:01:57PM +1000, Michael Ellerman wrote: > > > > Weird. > > > > > > > > Can you try: > > >

Re: [PATCH 2/4] powerpc/device-tree: bindings for DSP cores/clusters for Freescale SOCs

On Mon, 2015-09-21 at 03:36 -0500, Aggrwal Poonam-B10812 wrote: > > > -Original Message- > > From: Wood Scott-B07421 > > Sent: Sunday, September 20, 2015 5:45 AM > > To: Aggrwal Poonam-B10812 > > Cc: linuxppc-dev@lists.ozlabs.org;

Re: [PATCH 00/31] powerpc/mm: Update page table format for book3s 64

On Mon, 2015-09-21 at 12:10 +0530, Aneesh Kumar K.V wrote: > Hi All, > > This patch series attempt to update book3s 64 linux page table format to > make it more flexible. Our current pte format is very restrictive and we > overload multiple pte bits. This is due to the non-availability of free

[PATCH v3 0/5] clk: qoriq: Move chip-specific knowledge into driver

describing its individual registers. For more detail, see the commit message of patch 2. As there are both ARM and PPC patches that depend on this patchset, I'm requesting ACKs from clk and cpufreq in order to put this into a topic branch that both ARM and PPC can pull. Scott Wood (5): powerpc/fsl

[PATCH v3 2/5] clk: qoriq: Move chip-specific knowledge into driver

ll still work, and be directed at the corresponding new clock. Signed-off-by: Scott Wood <scottw...@freescale.com> --- v2: was patch 3/5 Added missing initialization of hwc->cg. .../devicetree/bindings/clock/qoriq-clock.txt | 61 +- drivers/clk/clk-qoriq.c

[PATCH v3 1/5] powerpc/fsl: Move fsl_guts.h out of arch/powerpc

Freescale's Layerscape ARM chips use the same structure. Signed-off-by: Scott Wood <scottw...@freescale.com> --- v3: was patch 2/5 arch/powerpc/include/asm/fsl_guts.h| 192 - arch/powerpc/platforms/85xx/mpc85xx_mds.c | 2 +- arch/powerpc/platform

[PATCH v3 5/5] cpufreq: qoriq: Don't look at clock implementation details

uency mask mechanism made assumptions about particular parent clock indices that are no longer valid. Signed-off-by: Scott Wood <scottw...@freescale.com> --- v3: was patch 1/5 and patch 4/5, plus blacklist e6500 and changes to clk api usage drivers/cpufreq/qoriq

[PATCH v3 3/5] clk: qoriq: Add ls2080a support.

LS2080A is the first implementation of the chassis 3 clockgen, which has a different register layout than previous chips. It is also little endian, unlike previous chips. Signed-off-by: Scott Wood <scottw...@freescale.com> --- v3: new patch drivers/clk/Kconfig | 2 +- drivers/c

[PATCH v3 4/5] clk: Add consumer APIs for discovering possible parent clocks

set_parent() and thus populate the cpufreq table, so revive them as legitimate consumer APIs. Signed-off-by: Scott Wood <scottw...@freescale.com> --- v3: new patch drivers/clk/clk.c | 19 +++ include/linux/clk.h | 31 +++ 2 files changed, 50 ins

Re: [PATCH 2/4] powerpc/device-tree: bindings for DSP cores/clusters for Freescale SOCs

On Sat, 2015-09-19 at 23:46 +0530, Poonam Aggrwal wrote: > From: poonam aggrwal > > Device Tree Bindings for DSP CPU clusters and DSP CPUs for Freescale PowerPC > SOCs which have DSP CPUs in addition to PowerPC CPUs. > For example B4860 has 3 DSP clusters which have

Re: [PATCH v9 2/5] genalloc:support allocating specific region

On Mon, 2015-09-14 at 09:38 +0800, Zhao Qiang wrote: > Add new algo for genalloc, it reserve a specific region of > memory matching the size requirement (no alignment constraint) > > Signed-off-by: Zhao Qiang > --- > Changes for v9: > - reserve a specific region,

Re: [PATCH v9 3/5] qe_common: add qe_muram_ functions to manage muram

On Mon, 2015-09-14 at 09:38 +0800, Zhao Qiang wrote: > diff --git a/arch/powerpc/sysdev/qe_lib/qe_common.c > b/arch/powerpc/sysdev/qe_lib/qe_common.c > new file mode 100644 > index 000..1213458 > --- /dev/null > +++ b/arch/powerpc/sysdev/qe_lib/qe_common.c > @@ -0,0 +1,242 @@ > +/* > + *

Re: [PATCH v9 2/5] genalloc:support allocating specific region

On Thu, 2015-09-17 at 15:19 -0500, Scott Wood wrote: > On Mon, 2015-09-14 at 09:38 +0800, Zhao Qiang wrote: > > Add new algo for genalloc, it reserve a specific region of > > memory matching the size requirement (no alignment constraint) > > > > Signed-off-by: Zhao Qian

Re: [PATCH v9 3/5] qe_common: add qe_muram_ functions to manage muram

On Thu, 2015-09-17 at 21:35 -0500, Zhao Qiang-B45475 wrote: > On Mon, 2015-09-18 at 04:28 +0800, Wood Scott-B07421 wrote: > > -Original Message- > > From: Wood Scott-B07421 > > Sent: Friday, September 18, 2015 4:28 AM > > To: Zhao Qiang-B45475 > > Cc: linux-ker...@vger.kernel.org;

Re: [PATCH] PowerPC: Move Freescale device tree files into fsl folder

On Fri, 2015-09-18 at 12:00 +0800, Jia Hongtao wrote: > It makes no sense that some Freescale device tree files are in fsl > directory while some others not. This patch move Freescale device tree > files into fsl folder. To do that the following two steps are made: > - Move Freescale device tree

Re: [BUG] Revert 0b05e2d671c4 'powerpc/32: cacheable_memcpy becomes memcpy'

On Wed, 2015-09-16 at 18:23 +0200, Thomas Gleixner wrote: > With this commit applied, my MPC5200 board fails to boot 4.3-rc1. The > boot failure is silent. > > Bisection pointed straight to this commit. Reverting it on top of > 4.3-rc1 works like a charm. Yes, we've been iterating on a fix for

Re: [PATCH v2 1/2] fsl: Add binding for RCPM

On Tue, 2015-09-15 at 21:35 -0500, Tang Yuantian-B29983 wrote: > > > -Original Message- > > From: Wood Scott-B07421 > > Sent: Wednesday, September 16, 2015 10:32 AM > > To: Wang Dongsheng-B40534 > > Cc: devicet...@vger.kernel.org;

Re: [PATCH v2 1/2] fsl: Add binding for RCPM

On Tue, 2015-09-15 at 22:18 -0500, Wang Dongsheng-B40534 wrote: > Hi Scott, > > > -Original Message- > > From: Wang Dongsheng-B40534 > > Sent: Wednesday, September 16, 2015 10:44 AM > > To: Wood Scott-B07421; Tang Yuantian-B29983 > > Cc: devicet...@vger.kernel.org;

Re: [PATCH v2 1/2] fsl: Add binding for RCPM

On Tue, 2015-09-15 at 16:55 +0800, Dongsheng Wang wrote: > +* Freescale RCPM Wakeup Source Device Tree Bindings > +--- > +Required rcpm-wakeup property should be added to a device node if the > device > +can be used as a wakeup source. > + > + -

Re: [PATCH v2 1/2] fsl: Add binding for RCPM

On Tue, 2015-09-15 at 21:15 -0500, Wang Dongsheng-B40534 wrote: > Hi Scott, > > > -Original Message- > > From: Wood Scott-B07421 > > Sent: Wednesday, September 16, 2015 7:57 AM > > To: Wang Dongsheng-B40534 > > Cc: devicet...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; > >

Re: [PATCH v2 1/2] fsl: Add binding for RCPM

On Tue, 2015-09-15 at 21:30 -0500, Wang Dongsheng-B40534 wrote: > Hi Scott, > > > -Original Message- > > From: Wood Scott-B07421 > > Sent: Wednesday, September 16, 2015 10:19 AM > > To: Wang Dongsheng-B40534 > > Cc: devicet...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; > >

Re: [PATCH v3] powerpc32: memset: only use dcbz once cache is enabled

On Mon, 2015-09-14 at 08:21 +0200, Christophe Leroy wrote: > memset() uses instruction dcbz to speed up clearing by not wasting time > loading cache line with data that will be overwritten. > Some platform like mpc52xx do no have cache active at startup and > can therefore not use memset().

Re: [PATCH v3] powerpc32: memset: only use dcbz once cache is enabled

On Mon, 2015-09-14 at 17:44 +0200, Christophe LEROY wrote: > Le 14/09/2015 17:20, Scott Wood a écrit : > > On Mon, 2015-09-14 at 08:21 +0200, Christophe Leroy wrote: > > > memset() uses instruction dcbz to speed up clearing by not wasting time > > > l

Re: [PATCH v2] powerpc32: memcpy/memset: only use dcbz once cache is enabled

On Sat, 2015-09-12 at 11:57 +0200, christophe leroy wrote: > Le 11/09/2015 03:24, Michael Ellerman a écrit : > > On Thu, 2015-09-10 at 17:05 -0500, Scott Wood wrote: > > > > > > I don't think this duplication is what Michael meant by "the normal cpu > > &g

Re: [PATCH v3] powerpc32: memcpy: only use dcbz once cache is enabled

On Fri, 2015-09-11 at 16:33 +0200, Christophe Leroy wrote: > memcpy() uses instruction dcbz to speed up copy by not wasting time > loading cache line with data that will be overwritten. > Some platform like mpc52xx do no have cache active at startup and > can therefore not use memcpy(). Allthough

Re: [v2 04/11] soc/fsl: Introduce drivers for the DPAA QMan

On Wed, Aug 12, 2015 at 04:14:50PM -0400, Roy Pledge wrote: > +/* Lock/unlock frame queues, subject to the "LOCKED" flag. This is about > + * inter-processor locking only. Note, FQLOCK() is always called either > under a > + * local_irq_save() or from interrupt context - hence there's no need for

Re: [PATCH 1/2] fsl: Add binding for RCPM

On Wed, 2015-09-09 at 21:03 -0500, Wang Dongsheng-B40534 wrote: > Hi Scott, > > Thanks for your review. > > > -Original Message- > > From: Wood Scott-B07421 > > Sent: Thursday, September 10, 2015 3:57 AM > > To: Wang Dongsheng-B40534 > > Cc: devicet...@vger.kernel.org;

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