>> Looking at fsl_backplane_config_aneg() you expect phydev->speed to be
>> set, and from the speed you then kick of either KR autoneg or KX
>> autoneg. Could you also start the training at this point? Use the
>> speed to indicate if training is needed?
>
> [S.H]The training cannot be started at
___
From: Andrew Lunn <and...@lunn.ch>
Sent: Friday, January 22, 2016 5:12 AM
To: Shaohui Xie
Cc: Sebastian Hesselbarth; Florian Fainelli; shh@gmail.com;
devicet...@vger.kernel.org; net...@vger.kernel.org;
linuxppc-dev@lists.ozlabs.org; da...@davemlo
know what fsl's hardware needs to support backplane.
Thank you for your time and reviewing!
Shaohui
____
From: Shaohui Xie
Sent: Friday, January 22, 2016 6:05 PM
To: Sebastian Hesselbarth; Andrew Lunn
Cc: Florian Fainelli; shh@gmail.com; devicet...@vger.
> > If you look at the list of possible values for "phy-mode" you'd see
> > that none of it describes a PHY-to-PHY connection but all are for
> > MAC-to-PHY connections. Also, names above suggest it already: MII is
> > short for media _independent_ interface.
> >
> > I copy Andrew's concerns and
> -Original Message-
> From: Sebastian Hesselbarth [mailto:sebastian.hesselba...@gmail.com]
> Sent: Monday, January 18, 2016 4:06 PM
> To: Shaohui Xie; Florian Fainelli; Andrew Lunn; shh@gmail.com
> Cc: devicet...@vger.kernel.org; net...@vger.kernel.org
> -Original Message-
> From: Andrew Lunn [mailto:and...@lunn.ch]
> Sent: Monday, January 18, 2016 11:15 PM
> To: Shaohui Xie
> Cc: Sebastian Hesselbarth; Florian Fainelli; shh@gmail.com;
> devicet...@vger.kernel.org; net...@vger.kernel.org; linuxppc-
> d...
> > + - fsl-lane-handle: phandle, specifies a reference to a node representing
> > a
> Serdes.
> > + - fsl-lane-reg: offset and length of the register set for the serdes
> > lane.
>
> These should be fsl,... not fsl-...
Will fix it.
Thank you!
Shaohui
> -Original Message-
> From: Andrew Lunn [mailto:and...@lunn.ch]
> Sent: Friday, January 15, 2016 12:44 AM
> To: shh@gmail.com
> Cc: devicet...@vger.kernel.org; net...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org; f.faine...@gmail.com; da...@davemloft.net; Sha
> > [S.H] 'compatible' and 'phy-mode' are standard properties already in
> > common Ethernet phy binding, I can update 'phy-mode' with
> > "1000base-kx" and "10gbase-kr", how about I still list the two
> > properties here for the requirement of PCS PHY to support backplane?
>
> Yes. The common
> Subject: Re: [PATCH] powerpc: fsl: update fman dt binding for PCS PHY
>
> On Mon, Dec 28, 2015 at 11:47:34AM +0800, shh@gmail.com wrote:
> > From: Shaohui Xie <shaohui@freescale.com>
> >
> > PCS PHY can support backplane (1000BASE-KX and 10GB
> @@ -55,6 +55,7 @@ fman@40 {
> reg = <0xe 0x1000>;
> fsl,fman-ports = <_rx_0x08 _tx_0x28>;
> ptp-timer = <_timer0>;
> + pcsphy-handle = <>;
> };
>
> mdio@e1000 {
> @@ -62,5 +63,9 @@ fman@40 {
>
On Tue, 2015-08-04 at 19:24 -0500, Scott Wood wrote:
On Tue, 2015-08-04 at 19:18 -0500, Scott Wood wrote:
On Fri, Jul 24, 2015 at 11:45:33AM +0800, shaohui xie wrote:
From: Shaohui Xie shaohui@freescale.com
The PHY uses XAUI interface to connect to MAC, mostly the PHY used
-Original Message-
From: Wood Scott-B07421
Sent: Wednesday, August 05, 2015 8:19 AM
To: shaohui xie
Cc: linuxppc-dev@lists.ozlabs.org; Xie Shaohui-B21989
Subject: Re: [1/2] powerpc/config: enable teranetics PHY
On Fri, Jul 24, 2015 at 11:45:33AM +0800, shaohui xie wrote:
From
:18 -0500, Scott Wood wrote:
On Fri, Jul 24, 2015 at 11:45:33AM +0800, shaohui xie wrote:
From: Shaohui Xie shaohui@freescale.com
The PHY uses XAUI interface to connect to MAC, mostly the PHY
used on riser card.
Signed-off-by: Shaohui Xie shaohui
-Original Message-
From: Wood Scott-B07421
Sent: Friday, January 30, 2015 8:54 AM
To: shh@gmail.com
Cc: linuxppc-dev@lists.ozlabs.org; devicet...@vger.kernel.org; Medve
Emilian-EMMEDVE1; Xie Shaohui-B21989
Subject: Re: [PATCH][v4] power/fsl: add MDIO dt binding for FMan
On
-Original Message-
From: Wood Scott-B07421
Sent: Friday, January 30, 2015 10:44 AM
To: Xie Shaohui-B21989
Cc: linuxppc-dev@lists.ozlabs.org; devicet...@vger.kernel.org; Medve
Emilian-EMMEDVE1
Subject: Re: [PATCH][v4] power/fsl: add MDIO dt binding for FMan
On Thu, 2015-01-29 at
-Original Message-
From: Wood Scott-B07421
Sent: Thursday, January 08, 2015 9:13 AM
To: Medve Emilian-EMMEDVE1
Cc: Xie Shaohui-B21989; linuxppc-dev@lists.ozlabs.org;
devicet...@vger.kernel.org
Subject: Re: [PATCH] [v3] power/fsl: add MDIO dt binding for FMan
On Wed, 2015-01-07 at
/fsl: add MDIO dt binding for FMan
From: Shaohui Xie shaohui@freescale.com
This binding is for FMan MDIO, it covers FMan v2 FMan v3.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
changes in v3:
rephrase the 'Definition' of property 'bus-frequency', don't
:21 AM, shh@gmail.com wrote:
From: Andy Fleming aflem...@gmail.com
Signed-off-by: Andy Fleming aflem...@gmail.com
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
arch/powerpc/configs/corenet32_smp_defconfig | 1 +
arch/powerpc/configs/corenet64_smp_defconfig | 1 +
2 files
Hello Scott,
Is this v3 OK?
Best Regards,
Shaohui Xie
-Original Message-
From: shh@gmail.com [mailto:shh@gmail.com]
Sent: Tuesday, December 23, 2014 3:58 PM
To: linuxppc-dev@lists.ozlabs.org; devicet...@vger.kernel.org; Wood
Scott-B07421
Cc: Medve Emilian-EMMEDVE1; Xie
compatible simple-bus,
Then we will only need to enable MDIO mux option in config without adding
compatible in corenet_generic.c.
Best Regards,
Shaohui Xie
-Original Message-
From: Emil Medve [mailto:emilian.me...@freescale.com]
Sent: Friday, January 02, 2015 4:43 PM
To: shh
-Original Message-
From: Wood Scott-B07421
Sent: Tuesday, December 23, 2014 4:08 PM
To: Xie Shaohui-B21989
Cc: Medve Emilian-EMMEDVE1; linuxppc-dev@lists.ozlabs.org;
devicet...@vger.kernel.org; Liberman Igal-B31950
Subject: Re: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan
,
Shaohui Xie
I can't put patches in my -next until the merge window closes.
+EXAMPLE
+
+Example for FMan v2 external MDIO:
+
+mdio@f1000 {
+ compatible = fsl,fman-xmdio;
+ reg = 0xf1000 0x1000;
+ bus-frequency = 2;
+};
So the bus frequency is only
Best Regards,
Shaohui Xie
-Original Message-
From: Wood Scott-B07421
Sent: Tuesday, December 23, 2014 5:26 AM
To: Medve Emilian-EMMEDVE1
Cc: Xie Shaohui-B21989; linuxppc-dev@lists.ozlabs.org;
devicet...@vger.kernel.org; Liberman Igal-B31950
Subject: Re: [PATCH] [v2] power/fsl
-B31950
Subject: Re: [PATCH] [v2] power/fsl: add MDIO dt binding for FMan
On Thu, 2014-12-18 at 06:53 -0600, Xie Shaohui-B21989 wrote:
Ping.
Best Regards,
Shaohui Xie
I can't put patches in my -next until the merge window closes.
+EXAMPLE
Ping.
Best Regards,
Shaohui Xie
-Original Message-
From: Xie Shaohui-B21989
Sent: Wednesday, November 26, 2014 10:11 AM
To: Wood Scott-B07421
Cc: linuxppc-dev@lists.ozlabs.org; devicet...@vger.kernel.org; Medve Emilian-
EMMEDVE1; Liberman Igal-B31950
Subject: RE: [PATCH] [v2
On Thu, 2014-12-18 at 06:53 -0600, Xie Shaohui-B21989 wrote:
Ping.
Best Regards,
Shaohui Xie
I can't put patches in my -next until the merge window closes.
+EXAMPLE
+
+Example for FMan v2 external MDIO:
+
+mdio@f1000 {
+ compatible = fsl,fman-xmdio
dt binding for FMan
On Fri, 2014-11-14 at 17:53 +0800, shh@gmail.com wrote:
From: Shaohui Xie shaohui@freescale.com
This binding is for FMan MDIO, it covers FMan v2 FMan v3.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
changes in V2:
addressed comments from
Ping.
Best Regards,
Shaohui Xie
-Original Message-
From: shh@gmail.com [mailto:shh@gmail.com]
Sent: Friday, November 14, 2014 5:53 PM
To: linuxppc-dev@lists.ozlabs.org; devicet...@vger.kernel.org; Wood
Scott-B07421
Cc: Medve Emilian-EMMEDVE1; Liberman Igal-B31950; Xie
Best Regards,
Shaohui Xie
-Original Message-
From: Wood Scott-B07421
Sent: Thursday, November 13, 2014 3:15 PM
To: Xie Shaohui-B21989
Cc: Liberman Igal-B31950; linuxppc-dev@lists.ozlabs.org;
devicet...@vger.kernel.org; Medve Emilian-EMMEDVE1
Subject: Re: [PATCH] DT: add MDIO
Best Regards,
Shaohui Xie
-Original Message-
From: Wood Scott-B07421
Sent: Thursday, November 13, 2014 4:04 PM
To: Xie Shaohui-B21989
Cc: Liberman Igal-B31950; linuxppc-dev@lists.ozlabs.org;
devicet...@vger.kernel.org; Medve Emilian-EMMEDVE1
Subject: Re: [PATCH] DT: add MDIO
: Re: [PATCH] DT: add MDIO node for FMan node
On Tue, 2014-11-04 at 19:56 +0800, shh@gmail.com wrote:
From: Shaohui Xie shaohui@freescale.com
This binding is for FMan MDIO, it covers FMan v2 FMan v3.
Signed-off-by: Shaohui Xie shaohui@freescale.com
...@vger.kernel.org;
Medve Emilian-EMMEDVE1; Xie Shaohui-B21989
Subject: Re: [PATCH] DT: add MDIO node for FMan node
On Tue, 2014-11-04 at 19:56 +0800, shh@gmail.com wrote:
From: Shaohui Xie shaohui@freescale.com
This binding is for FMan MDIO, it covers
-04 at 19:56 +0800, shh@gmail.com wrote:
From: Shaohui Xie shaohui@freescale.com
This binding is for FMan MDIO, it covers FMan v2 FMan v3.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
based on http://patchwork.ozlabs.org/patch/390351/
for 'next' of
git
Ping.
Best Regards,
Shaohui Xie
-Original Message-
From: shh@gmail.com [mailto:shh@gmail.com]
Sent: Tuesday, November 04, 2014 7:57 PM
To: linuxppc-dev@lists.ozlabs.org; devicet...@vger.kernel.org; Wood
Scott-B07421
Cc: Medve Emilian-EMMEDVE1; Xie Shaohui-B21989
Subject
-Original Message-
From: Linuxppc-dev [mailto:linuxppc-dev-
bounces+b21989=freescale@lists.ozlabs.org] On Behalf Of Scott Wood
Sent: Friday, August 01, 2014 2:31 AM
To: Medve Emilian-EMMEDVE1
Cc: linuxppc-...@ozlabs.org
Subject: Re: [PATCH v2 5/7] powerpc/corenet: Add MDIO bus
controllers, if we need to distinguish
the controllers, what could be the proper way? Perhaps a new property is needed
in dts?
Please comment!
Thanks!
Best Regards,
Shaohui Xie
-Original Message-
From: Linuxppc-dev [mailto:linuxppc-dev-
bounces+b21989=freescale@lists.ozlabs.org
Hello, Florian,
Thank you for reviewing the patches!
Please see my comments inline.
Best Regards,
Shaohui Xie
-Original Message-
From: Florian Fainelli [mailto:f.faine...@gmail.com]
Sent: Wednesday, November 13, 2013 1:54 AM
To: shh@gmail.com
Cc: linuxppc-dev; linux-ker
Added more people and list.
Best Regards,
Shaohui Xie
-Original Message-
From: shh@gmail.com [mailto:shh@gmail.com]
Sent: Monday, November 11, 2013 7:07 PM
To: linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org
Cc: Bucur Madalin-Cristian-B32716; Kanetkar Shruti
Added more people and list.
Best Regards,
Shaohui Xie
-Original Message-
From: shh@gmail.com [mailto:shh@gmail.com]
Sent: Monday, November 11, 2013 7:04 PM
To: linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org
Cc: Bucur Madalin-Cristian-B32716; Kanetkar Shruti
Added more people and list.
Best Regards,
Shaohui Xie
-Original Message-
From: shh@gmail.com [mailto:shh@gmail.com]
Sent: Monday, November 11, 2013 7:08 PM
To: linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org
Cc: Bucur Madalin-Cristian-B32716; Kanetkar Shruti
Added more people and list.
Best Regards,
Shaohui Xie
-Original Message-
From: shh@gmail.com [mailto:shh@gmail.com]
Sent: Monday, November 11, 2013 7:08 PM
To: linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org
Cc: Bucur Madalin-Cristian-B32716; Kanetkar Shruti
Clause 45 read/write functions
On Mon, 2013-11-11 at 19:04 +0800, shh@gmail.com wrote:
From: Andy Fleming
You need an extra parameter to read or write Clause 45 PHYs, so we
need a different API with the extra parameter.
Signed-off-by: Andy Fleming
Signed-off-by: Shaohui Xie
with the extra parameter.
Signed-off-by: Andy Fleming
Signed-off-by: Shaohui Xie shaohui@freescale.com
Why did you remove Andy's e-mail address? Even though it's no
longer valid, it helps identify which specific person you're talking
about.
[S.H] Andy's e-mail
Otherwise there will be no SCSI device nodes.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
arch/powerpc/configs/corenet64_smp_defconfig |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/configs/corenet64_smp_defconfig
b/arch/powerpc/configs
Otherwise there will be no SCSI device nodes.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
resend due to patch work did not capture this patch.
arch/powerpc/configs/corenet64_smp_defconfig |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc
Hugetlbfs is missed in current p1023rds_defconfig, enable it by default.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
arch/powerpc/configs/85xx/p1023rds_defconfig |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/configs/85xx/p1023rds_defconfig
b
Error handle in case of DDR ECC off is wrong, sysfs entries have not been
created, so edac_mc_free which frees a mci instance should not be called.
Also, free mci's memory in this case.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
drivers/edac/edac_core.h|1 +
drivers/edac
, P2041RDB, P3041DS, P4080DS, P5020DS, P5040DS
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
based on next branch of
http://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
arch/powerpc/boot/dts/p5040ds.dts |8
1 files changed, 4 insertions(+), 4 deletions
errors in following way: in the service routine, based on 'DLM' flag,
HCONTROL[27] operation clears Hstatus, CE and DE registers, clear Serror
register.
Signed-off-by: Shaohui Xie shaohui@freescale.com
Signed-off-by: Anju Bhartiya anju.bhart...@freescale.com
---
changes for v4:
1. put
errors in following way: in the service routine, based on 'DLM' flag,
HCONTROL[27] operation clears Hstatus, CE and DE registers, clear Serror
register.
Signed-off-by: Shaohui Xie shaohui@freescale.com
Signed-off-by: Anju Bhartiya anju.bhart...@freescale.com
---
changes for v3:
1. not using
errors in following way: in the service routine, based on 'DLM' flag,
HCONTROL[27] operation clears Hstatus, CE and DE registers, clear Serror
register.
Signed-off-by: Shaohui Xie shaohui@freescale.com
Signed-off-by: Anju Bhartiya anju.bhart...@freescale.com
---
changes for V2:
1. remove the using
errors in following way: in the service routine, based on 'DLM' flag,
HCONTROL[27] operation clears Hstatus, CE and DE registers, clear Serror
register.
Signed-off-by: Shaohui Xie shaohui@freescale.com
Signed-off-by: Anju Bhartiya anju.bhart...@freescale.com
---
drivers/ata/sata_fsl.c | 48
__GFP_DMA32 only
if the device's dma_mask total memory size. By doing this, devices which
cannot DMA all the memory will be limited to ZONE_DMA32, but devices which
can DMA all the memory will not be affected by this limitation.
Signed-off-by: Shaohui Xie shaohui@freescale.com
Signed-off
if the device's
dma_mask total memory size. By doing this, devices which cannot DMA all
the memory will be limited to ZONE_DMA, but devices which can DMA all the
memory will not be affected by this limitation.
Signed-off-by: Shaohui Xie shaohui@freescale.com
Signed-off-by: Mingkai Hu mingkai
Default CCB on P3041 is 750MHz, but espi cannot work at 40MHz with this CCB,
so we need to slow down the clock rate of espi to 35MHz to make it work stable
with the CCB.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
arch/powerpc/boot/dts/p3041ds.dts |2 +-
1 files changed, 1
Currently, BOOKE watchdog code for checking wdt and wdt_period is
in setup_32.c, it cannot be used in 64-bit, so move it to a common place
setup-common.c, which will be shared by 32-bit and 64-bit.
Also, replace the simple_strtoul with kstrtol.
Signed-off-by: Shaohui Xie shaohui
NAND on p2041 uses CS1 as chip select.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
arch/powerpc/boot/dts/p2041rdb.dts | 41 +++-
1 files changed, 40 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/boot/dts/p2041rdb.dts
b/arch/powerpc/boot
CONFIG_FSL_BOOKE is only defined in 32-bit, CONFIG_PPC_FSL_BOOK3E is
defined in both 32-bit and 64-bit, so use CONFIG_PPC_FSL_BOOK3E to make
driver work in 32-bit 64-bit.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
changes for v2:
use PPC_FSL_BOOK3E instead of FSL_SOC_BOOKE
Currently, BOOKE watchdog code for checking wdt and wdt_period is
in setup_32.c, it cannot be used in 64-bit, so move it to a common place
prom.c, which will be shared by 32-bit and 64-bit.
Also, replace the simple_strtoul with kstrtol.
Signed-off-by: Shaohui Xie shaohui@freescale.com
CONFIG_FSL_BOOKE is only defined in 32-bit, CONFIG_FSL_SOC_BOOKE is
defined in both 32-bit and 64-bit, so use CONFIG_FSL_SOC_BOOKE to make
diver work in 32-bit 64-bit.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
drivers/watchdog/Kconfig |8
drivers/watchdog
it after reset all.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
based on http://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc.git,
branch 'for-linus'.
changes for v2:
call the wrapper API instead of access the register directly.
drivers/mmc/host/sdhci.c |5 +
1 files changed
it after reset all.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
based on http://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc.git,
branch 'for-linus'.
drivers/mmc/host/sdhci.c |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci.c b
call trace, so use (void *) for both 32-bit and 64-bit.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
changes for v2:
1. use (void *) instead of unsigned long and the double cast according
to Timur's comment.
drivers/usb/gadget/fsl_udc_core.c |3 +--
1 files changed, 1 insertions
call trace, so use unsigned long for both 32-bit and 64-bit.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
drivers/usb/gadget/fsl_udc_core.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/usb/gadget/fsl_udc_core.c
b/drivers/usb/gadget/fsl_udc_core.c
e93f0010 7c0004ac
0c00 4c00012c 6204
---[ end trace d152129396f60c53 ]---
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
drivers/usb/gadget/fsl_udc_core.c |8 +---
1 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/gadget/fsl_udc_core.c
b/drivers
On some platforms such as P3060QDS, has multiple spi flashes, but they are
not available at same time, so if their status is 'disabled', which is set
by u-boot, will not be probed.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
Disabled nodes should automatically not be probed. But I
Add support for EON spi flash EN25Q32B, which is not listed in id table,
need to add it in the id table to support the EON flash.
Signed-off-by: Shaohui Xie shaohui@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
drivers/mtd/devices/m25p80.c |1 +
1 files changed, 1
compatible in dts has been changed, so driver need to update accordingly.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
apply for http://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
'next' branch.
drivers/edac/mpc85xx_edac.c |2 +-
1 files changed, 1 insertions(+), 1
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
arch/powerpc/boot/dts/p4080ds.dts |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/dts/p4080ds.dts
b/arch/powerpc/boot/dts/p4080ds.dts
index 927f94d..9c37a85 100644
--- a/arch/powerpc/boot/dts
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
arch/powerpc/platforms/85xx/corenet_ds.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c
b/arch/powerpc/platforms/85xx/corenet_ds.c
index 2ab338c..15247b0 100644
Gala ga...@kernel.crashing.org
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
arch/powerpc/sysdev/fsl_pci.h | 31 +--
1 files changed, 25 insertions(+), 6 deletions(-)
difg --gite a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h
index a39ed5c
...@kernel.crashing.org
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
drivers/edac/mpc85xx_edac.c | 239 --
drivers/edac/mpc85xx_edac.h | 17 +--
2 files changed, 188 insertions(+), 68 deletions(-)
diff --git a/drivers/edac/mpc85xx_edac.c b
From: Kai.Jiang kai.ji...@freescale.com
Parameter offset_in_page in function edac_mc_handle_ce should be masked
the higher bits above the page size, not the lower bits. The original input
sometimes causes crash.
Signed-off-by: Kai.Jiang kai.ji...@freescale.com
---
drivers/edac/mpc85xx_edac.c |
.localbus: read_byte beyond end of buffer
Signed-off-by: Shaohui Xie shaohui@freescale.com
Acked-by: Scott Wood scottw...@freescale.com
---
drivers/mtd/nand/fsl_elbc_nand.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand
Signed-off-by: Shaohui Xie shaohui@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/sysdev/fsl_lbc.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_lbc.c b/arch/powerpc/sysdev/fsl_lbc.c
index e0292c3
Signed-off-by: Shaohui Xie b21...@freescale.com
Cc: Li Yang le...@freescale.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Roy Zang tie-fei.z...@freescale.com
Cc: Alexandre Bounine alexandre.boun...@idt.com
---
arch/powerpc/include/asm/rio.h |5 +
arch/powerpc/kernel/traps.c| 13
port2
for now, still the handler takes care of port2.
Currently the handler only clear error status without any recovery.
Signed-off-by: Shaohui Xie b21...@freescale.com
Cc: Li Yang le...@freescale.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Roy Zang tie-fei.z...@freescale.com
Cc: Alexandre
Signed-off-by: Shaohui Xie b21...@freescale.com
Cc: Li Yang le...@freescale.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Roy Zang tie-fei.z...@freescale.com
Cc: Alexandre Bounine alexandre.boun...@idt.com
---
arch/powerpc/include/asm/rio.h |5 +
arch/powerpc/kernel/traps.c| 17
From: Li Yang le...@freescale.com
Also make 74xx HID1 definition conditional.
Signed-off-by: Li Yang le...@freescale.com
Signed-off-by: Shaohui Xie b21...@freescale.com
Cc: Li Yang le...@freescale.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Roy Zang tie-fei.z...@freescale.com
Cc: Alexandre
Signed-off-by: Shaohui Xie b21...@freescale.com
Cc: Li Yang le...@freescale.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Roy Zang tie-fei.z...@freescale.com
Cc: Alexandre Bounine alexandre.boun...@idt.com
---
arch/powerpc/kernel/cpu_setup_fsl_booke.S |6 ++
arch/powerpc/sysdev
Signed-off-by: Shaohui Xie b21...@freescale.com
Cc: Li Yang le...@freescale.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Roy Zang tie-fei.z...@freescale.com
Cc: Alexandre Bounine alexandre.boun...@idt.com
---
arch/powerpc/kernel/traps.c | 14 +-
arch/powerpc/sysdev/fsl_rio.c
port2
for now, still the handler takes care of port2.
Currently the handler only clear error status without any recovery.
Signed-off-by: Shaohui Xie b21...@freescale.com
Cc: Li Yang le...@freescale.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Roy Zang tie-fei.z...@freescale.com
Cc: Alexandre
Signed-off-by: Shaohui Xie b21...@freescale.com
Cc: Li Yang le...@freescale.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Roy Zang tie-fei.z...@freescale.com
Cc: Alexandre Bounine alexandre.boun...@idt.com
---
arch/powerpc/kernel/cpu_setup_fsl_booke.S |6 ++
arch/powerpc/sysdev
Signed-off-by: Shaohui Xie b21...@freescale.com
Cc: Li Yang le...@freescale.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Roy Zang tie-fei.z...@freescale.com
Cc: Alexandre Bounine alexandre.boun...@idt.com
---
arch/powerpc/kernel/traps.c | 14 +-
arch/powerpc/sysdev/fsl_rio.c
From: Li Yang le...@freescale.com
Also make 74xx HID1 definition conditional.
Signed-off-by: Li Yang le...@freescale.com
Signed-off-by: Shaohui Xie b21...@freescale.com
Cc: Li Yang le...@freescale.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Roy Zang tie-fei.z...@freescale.com
Cc: Alexandre
port2
for now, still the handler takes care of port2.
Currently the handler only clear error status without any recovery.
Signed-off-by: Shaohui Xie b21...@freescale.com
Cc: Li Yang le...@freescale.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Roy Zang tie-fei.z...@freescale.com
Cc: Alexandre
From: Li Yang le...@freescale.com
The access to HID1 register is only legitimate for e500 v1/v2 cores.
Also fixes magic number.
Signed-off-by: Li Yang le...@freescale.com
Signed-off-by: Shaohui Xie b21...@freescale.com
---
arch/powerpc/sysdev/fsl_rio.c |9 ++---
1 files changed, 6
Add some comments to make sRIO registers map better readable.
Signed-off-by: Shaohui Xie b21...@freescale.com
---
arch/powerpc/sysdev/fsl_rio.c | 65 +
1 files changed, 40 insertions(+), 25 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch
port2
for now, still the handler takes care of port2.
Currently the handler only clear error status without any recovery.
Signed-off-by: Shaohui Xie b21...@freescale.com
---
arch/powerpc/sysdev/fsl_rio.c | 81 ++---
1 files changed, 76 insertions(+), 5
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