M_MRK_GRP_CMPL is strictly not restricted to loads and stores, that
seems to be a close/resonable match.
Cc: Stephane Eranian
Cc: Paul Mckerras
Cc: Michael Ellerman
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/perf/power7-pmu.c | 16
1 files changed, 16 insertions(+), 0 d
M_MRK_GRP_CMPL is strictly not restricted to loads and stores, that
seems to be a close/resonable match.
Cc: Stephane Eranian
Cc: Paul Mckerras
Cc: Michael Ellerman
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/perf/power8-pmu.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
[PATCH 2/7] powerpc/perf: Export Power8 generic events in sysfs
Export existing Power8 generic events in sysfs.
Cc: Paul Mckerras
Cc: Michael Ellerman
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/perf/power8-pmu.c | 23 +++
1 files changed, 23 insertions(+), 0
: Sukadev Bhattiprolu
---
arch/powerpc/perf/power8-pmu.c | 24
1 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c
index 96a64d6..30c6b12 100644
--- a/arch/powerpc/perf/power8-pmu.c
+++ b/arch
t I am unable to verify the build on few other configs due to a problem
unrleated to this patchset. That is being discussed in a separate thread.
I would like some feedback on this patchset in the meanwhile.
Sukadev Bhattiprolu (7):
powerpc/perf: Rename Power8 macros to start with PME
po
Andreas Schwab [sch...@linux-m68k.org] wrote:
| Sukadev Bhattiprolu writes:
|
| > {standard input}: Assembler messages:
| > {standard input}:244: Error: junk at end of line: `1'
| > make[2]: *** [arch/powerpc/platforms/85xx/smp.o] Error 1
| > make[1]: *** [arch/powerpc/pla
Kumar Gala [ga...@kernel.crashing.org] wrote:
|
| >
| > The pre-processor output for the first WARN_ON() is:
| >
| > ---
| > ({ int __ret_warn_on = !!(nr < 0 || nr >= 32); if
(__builtin_constant_p(__ret_warn_on)) { if (__ret_warn_on) do { __asm__
__volatile__( "1:twi 31,0,0\n" ".section __
I am tryng to compile clean mainline kernel with a few different config files
and running into errors with some configs.
I am building on RHEL6.3 with following binaries:
gcc (GCC) 4.4.6 20120305 (Red Hat 4.4.6-4)
GNU ld version 2.20.51.0.2-5.34.el6 20100205
binutils-2.20
Anshuman Khandual [khand...@linux.vnet.ibm.com] wrote:
| On 06/24/2013 04:58 PM, Michael Ellerman wrote:
| > In pmu_disable() we disable the PMU by setting the FC (Freeze Counters)
| > bit in MMCR0. In order to do this we have to read/modify/write MMCR0.
| >
| > It's possible that we read a value
From: Sukadev Bhattiprolu
Date: Tue, 25 Jun 2013 15:50:18 -0700
Subject: [RFC][PATCH 2/3][v2] perf/Power7: Export MDTLB_SRC fields to userspace
Power7 saves the "perf-event vector" information in the mmcra register.
Included in this event vector is a "marked-data-TLB source&quo
Michael Ellerman [mich...@ellerman.id.au] wrote:
| On Wed, 2013-06-19 at 17:15 +0800, Runzhen Wang wrote:
| > In the Power7 PMU guide:
| >
https://www.power.org/documentation/commonly-used-metrics-for-performance-analysis/
| > PM_BRU_MPRED is referred to as PM_BR_MPRED.
| >
| > This patch fix the
31112 0 45563b1fb arch/powerpc/perf/power7-pmu.o
|
| Signed-off-by: Runzhen Wang
Reviewed-by: Sukadev Bhattiprolu
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev
| documentation accordingly.
|
| Signed-off-by: Runzhen Wang
Reviewed-by: Sukadev Bhattiprolu
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev
Michael Neuling [mi...@neuling.org] wrote:
| Suka,
|
| One of these two patches breaks pmac32_defconfig and I suspect all other
| 32 bit configs (against mainline)
|
| arch/powerpc/perf/core-book3s.c: In function 'record_and_restart':
| arch/powerpc/perf/core-book3s.c:1632:4: error: passing argum
Stephane Eranian [eran...@google.com] wrote:
| > Further, in the above REM_CCE1 case, Power7 can also identify if the data
came
| > from the L2 or L3 cache of another core on the same chip. To describe this
to
| > user space, we propose to set ->mem_lvl to:
| >
| > PERF_MEM_LVL_REM_CCE1|P
Anshuman Khandual [khand...@linux.vnet.ibm.com] wrote:
| > The former approach seems less confusing and this patch uses that approach.
| >
|
| Yeah, the former approach is simpler and makes sense.
Ok. Seems to make sense at least on Power.
| > + * We use the table, dcache_src_map, to map this
>From 9f1a8a16e0ef36447e343d1cd4797c2b6a81225f Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Fri, 7 Jun 2013 13:26:31 -0700
Subject: [PATCH 2/2] perf: Add support for the mem_xlvl field.
A follow-on patch to adding perf_mem_data_src support for Power7.
At this point, this is o
From: Sukadev Bhattiprolu
Date: Wed, 8 May 2013 22:59:29 -0700
Subject: [PATCH 1/2] perf/Power7: Save dcache_src fields in sample record.
Power7 saves the "perf-event vector" information in the mmcra register.
Included in this event vector is a "data-cache source" field which
Sukadev Bhattiprolu [suka...@linux.vnet.ibm.com] wrote:
| Michael Ellerman [mich...@ellerman.id.au] wrote:
| | On Sat, Apr 06, 2013 at 09:48:03AM -0700, Sukadev Bhattiprolu wrote:
| | > From bdeacf7175241f6c79b5b2be0fa6b20b0d0b7d1c Mon Sep 17 00:00:00 2001
| | > From: Sukadev Bhatt
Michael Ellerman [mich...@ellerman.id.au] wrote:
| From: Michael Ellerman
|
| On power8 we have a new SIER (Sampled Instruction Event Register), which
| captures information about instructions when we have random sampling
| enabled.
|
| Add support for loading the SIER into pt_regs, overloading
Michael Ellerman [mich...@ellerman.id.au] wrote:
| From: Michael Ellerman
|
| On power8 the SIPR and SIHV are not in MMCRA, so convert the routines
| to take regs and change the names accordingly.
|
| Signed-off-by: Michael Ellerman
| ---
| arch/powerpc/perf/core-book3s.c | 20 +++---
Michael Ellerman [mich...@ellerman.id.au] wrote:
| On Sat, Apr 06, 2013 at 09:48:03AM -0700, Sukadev Bhattiprolu wrote:
| > From bdeacf7175241f6c79b5b2be0fa6b20b0d0b7d1c Mon Sep 17 00:00:00 2001
| > From: Sukadev Bhattiprolu
| > Date: Sat, 6 Apr 2013 08:48:26 -0700
| > Subject:
>From 03a785f9d19249d2e524f31d8ead539f15d28a9f Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Sat, 6 Apr 2013 09:52:05 -0700
Subject: [PATCH] perf: Power7 Update testing ABI to list CPI-stack events
Following patch added several Power7 events into /sys/devices/cpu/events.
Docum
>From bdeacf7175241f6c79b5b2be0fa6b20b0d0b7d1c Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Sat, 6 Apr 2013 08:48:26 -0700
Subject: [PATCH] perf: Power7: Make CPI stack events available in sysfs
A set of Power7 events are often used for Cycles Per Instruction (CPI) stack
analy
The 'perf' tool has some built-in test cases and one of them checks to
see if the symbols in vmlinux match those in /proc/kallsyms.
This test is failing on Power for several reasons. I fixed a couple of
them (described briefly at the end of the mail) and these fixes take
the test further.
One p
from one place ?
Sukadev
---
>From 50c7a46f14083c0ed10d66b7aed66ba76e798550 Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Tue, 5 Mar 2013 21:20:56 -0800
Subject: [PATCH] [PATCH 5/6][v4]: perf Create a sysfs format entry for Power7
events
Create a sysfs entry, '/sys/bus/even
Michael Ellerman [mich...@ellerman.id.au] wrote:
| On Tue, Jan 22, 2013 at 10:26:13PM -0800, Sukadev Bhattiprolu wrote:
| >
| > [PATCH 5/6][v4]: perf: Create a sysfs entry for Power event format
| >
| > Create a sysfs entry, '/sys/bus/event_source/devices/cpu/format/event
From: Sukadev Bhattiprolu
Date: Tue, 5 Feb 2013 15:04:49 -0800
Subject: [PATCH] perf/powerpc: Fix compile warnings
Fix compile errors like those below:
CC arch/powerpc/perf/power7-pmu.o
/home/git/linux/arch/powerpc/perf/power7-pmu.c:397:2: error: initialization from
incompatible pointer
Paul Mackerras [pau...@samba.org] wrote:
| > + /*
| > +* If this event was disabled in record_and_restart() because we
| > +* exceeded the ->event_limit, this is probably a good time to
| > +* re-enable the event ? If we don't reenable the event, we will
| > +* never notify the us
est PAPI.
$ papi.git/src/ctests/nonthread PAPI_TOT_CYC@500
$ papi.git/src/ctests/overflow_single_event
Changelog[v2]:
- [Paul Mackerras] Also clear PERF_HES_UPTODATE flag since we are
restarting the event; cleanup comments and patch description.
Signed-off-by:
o '-Werror'.
By defining __SANE_USERSPACE_TYPES__ we include
and define __u64 as unsigned long long.
Changelog[v2]:
[Michael Ellerman] Use __SANE_USERSPACE_TYPES__ and avoid PRIu64
format specifier - which as Jiri Olsa pointed out, breaks on x86-64.
Signed-off-by: Sukadev
Michael Ellerman [mich...@ellerman.id.au] wrote:
| > | make: *** [tests/attr.o] Error 1
| > |
| > | i386 compiles fine
| >
| > __u64 is 'unsigned long long' on x86 and PRIu64 is 'llu' which is fine.
| >
| > __u64 is 'unsigned long' on Power and PRIu64 is 'lu' which is again fine.
| >
| > But __
testing/'
Changelog[v3]:
[Greg KH] Include ABI documentation.
Signed-off-by: Sukadev Bhattiprolu
Acked-by: Jiri Olsa
---
.../testing/sysfs-bus-event_source-devices-events | 62
1 files changed, 62 insertions(+), 0 deletions(-)
delete mode 100644 Documenta
change is common in the code common
to POWER cpus.
This code is based on corresponding code in x86.
Changelog[v2]: [Jiri Osla] Use PMU_FORMAT_ATTR() rather than duplicating it.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/include/asm/perf_event_server.h |6 ++
arch/powerpc/perf/cor
are POWER specific and the others are the
generic events.
This will enable users to specify these events with their symbolic
names rather than with their raw code.
perf stat -e 'cpu/PM_CYC' ...
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/include/asm/perf_event_serv
a47473939db20e3961b200eb00acf5fcf084d755
Author: Jiri Olsa
Date: Wed Oct 10 14:53:11 2012 +0200
perf/x86: Make hardware event translations available in sysfs
Changelog:[v2]
[Jiri Osla] Drop EVENT_ID() macro since it is only used once.
Signed-off-by: Sukadev Bhattiprolu
need to define PMU_EVENT_PTR()
Signed-off-by: Sukadev Bhattiprolu
Acked-by: Jiri Olsa
---
arch/x86/kernel/cpu/perf_event.c | 13 +++--
include/linux/perf_event.h | 11 +++
2 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event.c b
[PATCH 1/6][v4]: perf/Power7: Use macros to identify perf events
Define and use macros to identify perf events codes This would make it
easier and more readable when these event codes need to be used in more
than one place.
Signed-off-by: Sukadev Bhattiprolu
Acked-by: Jiri Olsa
---
arch
nation/ABI
Changelog[v2]:
[Jiri Olsa] Use PMU_FORMAT_ATTR() rather than duplicating code.
Sukadev Bhattiprolu (6):
perf/Power7: Use macros to identify perf events
perf: Make EVENT_ATTR global
perf/POWER7: Make generic event translations available in sysfs
perf/POWER7: Make some POWER
Jiri Olsa [jo...@redhat.com] wrote:
| On Fri, Jan 18, 2013 at 05:30:52PM -0800, Sukadev Bhattiprolu wrote:
| > From 4d266e5040c33103f5d226b0d16b89f8ef79e3ad Mon Sep 17 00:00:00 2001
| > From: Sukadev Bhattiprolu
| > Date: Fri, 18 Jan 2013 11:14:28 -0800
| > Subject: [PATCH] perf:
>From 4d266e5040c33103f5d226b0d16b89f8ef79e3ad Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Fri, 18 Jan 2013 11:14:28 -0800
Subject: [PATCH] perf: Fix compile warnings in tests/attr.c
Replace '%llu' in printf()s with 'PRIu64' in 'tools/perf/tests/att
the updated patch.
---
>From 1e3cc6b3ef87f533985b10574af472361e39eecd Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Tue, 8 Jan 2013 22:31:49 -0800
Subject: [PATCH] perf: Document the ABI of perf sysfs entries
This patchset addes two new sets of files to sysfs for POWER architecture.
- perf event config format
>From 776e6d7942754f139c27753213c9cf4617536618 Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Thu, 17 Jan 2013 09:11:30 -0800
Subject: [PATCH] perf; Fix PMU format parsing test failure
On POWER, the 'perf format parsing' test always fails.
Looks like it is because mems
Jiri Olsa [jo...@redhat.com] wrote:
| On Tue, Jan 15, 2013 at 03:57:59PM -0300, Arnaldo Carvalho de Melo wrote:
| > Em Wed, Jan 09, 2013 at 05:07:03PM -0800, Sukadev Bhattiprolu escreveu:
| > > [PATCH 6/6][v3] perf: Document the ABI of perf sysfs entries
| > >
| > > This p
d PAPI_TOT_CYC@500
$ papi.git/src/ctests/overflow_single_event
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/perf/core-book3s.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index aa
which would become part of the ABI.
Changelog[v3]:
[Greg KH] Include ABI documentation.
Signed-off-by: Sukadev Bhattiprolu
---
Documentation/ABI/stable/sysfs-devices-cpu-events | 54 +
Documentation/ABI/stable/sysfs-devices-cpu-format | 27 ++
2 files
change is common in the code common
to POWER cpus.
This code is based on corresponding code in x86.
Changelog[v2]: [Jiri Olsa] Use PMU_FORMAT_ATTR() rather than duplicating it.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/include/asm/perf_event_server.h |6 ++
arch/powerpc/perf/cor
are POWER specific and the others are the
generic events.
This will enable users to specify these events with their symbolic
names rather than with their raw code.
perf stat -e 'cpu/PM_CYC/' ...
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/include/asm/perf_event_serv
a47473939db20e3961b200eb00acf5fcf084d755
Author: Jiri Olsa
Date: Wed Oct 10 14:53:11 2012 +0200
perf/x86: Make hardware event translations available in sysfs
Changelog:[v3]
[Jiri Olsa] Drop EVENT_ID() macro since it is only used once.
Signed-off-by: Sukadev Bhattiprolu
need to define PMU_EVENT_PTR()
Signed-off-by: Sukadev Bhattiprolu
---
arch/x86/kernel/cpu/perf_event.c | 13 +++--
include/linux/perf_event.h | 11 +++
2 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu
[PATCH 1/6][v3] perf/Power7: Use macros to identify perf events
Define and use macros to identify perf events codes. This would make it
easier and more readable when these event codes need to be used in more
than one place.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/perf/power7-pmu.c
Jiri Olsa [jo...@redhat.com] wrote:
| On Tue, Dec 18, 2012 at 11:28:02PM -0800, Sukadev Bhattiprolu wrote:
| >
| > Rename EVENT_ATTR() and EVENT_PTR() PMU_EVENT_ATTR() and PMU_EVENT_PTR().
| > Make them global so they are available to all architectures.
| >
| > Further to allo
the
| PMCs match this, then we make note that we couldn't find the PMC that caused
| the IRQ.
|
| Signed-off-by: Michael Neuling
| Reviewed-by: Sukadev Bhattiprolu
| cc: Paul Mackerras
| cc: Anton Blanchard
| cc: Linux PPC dev
| ---
| arch/powerpc/perf/core-book3s.c | 83
Greg KH [g...@kroah.com] wrote:
| On Tue, Dec 18, 2012 at 11:28:49PM -0800, Sukadev Bhattiprolu wrote:
| >
| > [PATCH 3/5] perf/POWER7: Make generic event translations available in sysfs
|
| As you are adding new sysfs files, you must also add new
| Documentation/ABI entries at the sam
s based on corresponding code in x86.
Changelog[v2]: [Jiri Osla] Use PMU_FORMAT_ATTR() rather than duplicating it.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/include/asm/perf_event_server.h |6 ++
arch/powerpc/perf/core-book3s.c | 12
arch/powerpc/perf/po
able users to specify these events with their symbolic
names rather than with their raw code.
perf stat -e 'cpu/PM_CYC' ...
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/include/asm/perf_event_server.h |2 ++
arch/powerpc/perf/power7-pmu.c | 18 +++
a47473939db20e3961b200eb00acf5fcf084d755
Author: Jiri Olsa
Date: Wed Oct 10 14:53:11 2012 +0200
perf/x86: Make hardware event translations available in sysfs
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/include/asm/perf_event_server.h | 25 +++
arch/powerpc/perf
Rename EVENT_ATTR() and EVENT_PTR() PMU_EVENT_ATTR() and PMU_EVENT_PTR().
Make them global so they are available to all architectures.
Further to allow architectures flexibility, have PMU_EVENT_PTR() pass in the
variable name as a parameter.
Signed-off-by: Sukadev Bhattiprolu
---
arch/x86
Define and use macros to identify perf events codes This would make it
easier and more readable when these event codes need to be used in more
than one place.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/perf/power7-pmu.c | 28
1 files changed, 20
Jiri Olsa [jo...@redhat.com] wrote:
| >
| > Can we remove the assumption that the event id is a generic event that
| > has PERF_COUNT_HW_ prefix and also let the architectures pass in a "show"
| > function ? This would allow architectures to display any arch specific
| > events that don't yet have
Jiri Olsa [jo...@redhat.com] wrote:
| On Wed, Nov 07, 2012 at 11:19:28AM -0800, Sukadev Bhattiprolu wrote:
|
| SNIP
|
| > +struct perf_pmu_events_attr {
| > + struct device_attribute attr;
| > + u64 id;
| > +};
| > +
| > +extern ssize_t power_events_sysfs_show(
Looking for feedback on this prototype for making POWER-specific event
translations available in sysfs. It is based on the patchset:
https://lkml.org/lkml/2012/11/7/402
which makes the translations for _generic_ events in POWER available in sysfs:
Since this is in POWER7 specific code
>From b8beef080260c1625c8f801105504a82005295e5 Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Wed, 31 Oct 2012 11:21:28 -0700
Subject: [PATCH 1/4] perf/powerpc: Use uapi/unistd.h to fix build error
Use the 'unistd.h' from arch/powerpc/include/uapi to build the perf tool
>From bafc551c31ce23c1cba0b75d23de6c46aba90f26 Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Tue, 6 Nov 2012 16:30:28 -0800
Subject: [PATCH 4/4] perf: Create a sysfs entry for Power event format
Create a sysfs entry, '/sys/bus/event_source/devices/cpu/format/event'
wh
>From d05d1ce6d55bf339eee6230ded9f5dd1351f60e5 Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Tue, 6 Nov 2012 14:07:36 -0800
Subject: [PATCH 3/4] perf/POWER7: Make event translations available in sysfs
Make the perf events supported by POWER7 available via sysfs.
$ ls /
>From 8a0dbd8f3fce2834292efa50c15ca64d4f6a6536 Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Wed, 7 Nov 2012 09:36:14 -0800
Subject: [PATCH 2/4] perf/Power7: Use macros to identify perf events
Define and use macros to identify perf events codes This would make it
easier and m
From: Sukadev Bhattiprolu
Date: Wed, 31 Oct 2012 11:21:28 -0700
Subject: [PATCH] perf: powerpc: Use uapi/unistd.h to fix build error
Use the 'unistd.h' from arch/powerpc/include/uapi to build the perf tool.
Signed-off-by: Sukadev Bhattiprolu
---
tools/perf/perf.h |2 +-
1 fil
Peter Zijlstra [pet...@infradead.org] wrote:
| On Tue, 2012-10-16 at 11:31 -0700, Sukadev Bhattiprolu wrote:
| > On a side note, how does the kernel on x86 use the 'config' information in
| > say /sys/bus/event_source/devices/cpu/format/cccr ? On Power7, the raw
| > code enco
Stephane Eranian [eran...@google.com] wrote:
| So all in all, I think this is not a very good idea. You have to put
| this into the tool or a library that auto-detects the
| host CPU and programs the right set of events.
|
| We've had that discussion many times. Just reiterating my personal
| opin
Robert Richter [robert.rich...@amd.com] wrote:
| Sukadev,
|
| On 15.10.12 17:55:34, Robert Richter wrote:
| > On 11.10.12 18:28:39, Sukadev Bhattiprolu wrote:
| > > + { .type = PERF_TYPE_HARDWARE, .config =
PERF_COUNT_HW_STALLED_CYCLES_FIXED_POINT },
| > > + { .type = PER
>From 89cb6a25b9f714e55a379467a832ee015014ed11 Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Tue, 18 Sep 2012 10:59:01 -0700
Subject: [PATCH] perf: Add a few generic stalled-cycles events
The existing generic event 'stalled-cycles-backend' corresponds to
PM_CMPLU_S
Is there a way to reliably check if a speculative roll back has occured in
the CPU ?
Normally we consider that an overflow has occured if the number of events
in a PMC reaches the overflow mark (0x8000).
With speculative rollback, we assume that the overflow has occured if the
number of even
Sukadev Bhattiprolu [suka...@linux.vnet.ibm.com] wrote:
|
| >From 21e9d1775f0c6f37a39e5d682ff74693fa9a4004 Mon Sep 17 00:00:00 2001
| From: Sukadev Bhattiprolu
| Date: Tue, 7 Aug 2012 17:53:24 -0700
| Subject: [PATCH] Use pmc_overflow to detect rolled back events.
|
| For certain speculat
that implement that bit).
Changelog[v2]:
- [Gabriel Paubert] Rename PV_POWER7P to PV_POWER7p.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/include/asm/perf_event_server.h |1 +
arch/powerpc/include/asm/reg.h |4 ++
arch/powerpc/perf/core-book3s.c |
>From 192fa874e5574d08d66d96155b6d9c536fce6e8a Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Mon, 2 Jul 2012 08:06:14 -0700
Subject: [PATCH] powerpc/perf: Sample only if SIAR-Valid bit is set in P7+
On POWER7+ two new bits (mmcra[35] and mmcra[36]) indicate whether the
contents
>From 21e9d1775f0c6f37a39e5d682ff74693fa9a4004 Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Tue, 7 Aug 2012 17:53:24 -0700
Subject: [PATCH] Use pmc_overflow to detect rolled back events.
For certain speculative events on Power7, 'perf stat' reports far higher
event cou
Gabriel Paubert [paub...@iram.es] wrote:
| > +#define PV_POWER7P 0x004A
| > #define PV_630 0x0040
| > #define PV_630p0x0041
| > #define PV_970MP 0x0044
|
| Hmm, before this patch the PVR definitions were sorted in ascending
| numerical order, at least for the list of 64 bit pr
>From 7e47842eb50d56bdeba44ea526979ee5160dbbc0 Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Tue, 3 Jul 2012 13:32:46 -0700
Subject: [PATCH 1/2][v2] powerpc: Define PV_POWER7p
This change is based on the patch that Carl Love posted to LKML
https://lkml.org/lkml/2012/6/22/
From: Sukadev Bhattiprolu
Date: Mon, 2 Jul 2012 08:06:14 -0700
Subject: [PATCH 2/2][v2] powerpc/perf: Sample only if SIAR-Valid bit is set in
P7+
On POWER7+ two new bits (mmcra[35] and mmcra[36]) indicate whether the
contents of SIAR and SDAR are valid.
For marked instructions on P7+, we must
From: Sukadev Bhattiprolu
Date: Mon, 2 Jul 2012 08:06:14 -0700
Subject: [PATCH 2/2] [perf][power]: Sample only if SIAR-Valid bit is set in P7+
On POWER7+ two new bits (mmcra[35] and mmcra[36]) indicate whether the
contents of SIAR and SDAR are valid.
For marked instructions on P7+, we must
From: Sukadev Bhattiprolu
Date: Tue, 3 Jul 2012 13:32:46 -0700
Subject: [PATCH 1/2] power: Define PV_POWER7P
This change is based on the patch that Carl Love posted to LKML
https://lkml.org/lkml/2012/6/22/309
It is included here for completeness and to enable building. When
the above
From: Sukadev Bhattiprolu
Date: Fri, 1 Jun 2012 20:56:02 -0400
Subject: [PATCH] perf: Don't use SIAR for user-space addresses
With the pipelining on Power7, the SIAR can be off by several instructions
leading to incorrect callgraphs. For user space code at least we can be more
accurate by
Benjamin Herrenschmidt [b...@kernel.crashing.org] wrote:
| So we have another case of paca->irq_happened getting out of
| sync with the HW irq state. This can happen when a perfmon
| interrupt occurs while soft disabled, as it will return to a
| soft disabled but hard enabled context while leaving
I get this crash when I run on 3.4.0-rc5 on a P6.
./perf record -a -d -- ./perf bench sched all
I rebuilt 'perf' locally after building the kernel 3.4.0-rc5.
Sometimes it occurs on the first attempt, sometimes on the second.
Pls let me know if I can provide any other debug info.
for the punched hole,
since CONFIG_STRICT_DEVMEM was merged into the -next branch.
[Ben Harrenschmidt]: Rename interface to page_is_rtas_user_buf()
move declaration to a header file and ensure it doesn't break
CONFIG_PPC_RTAS=n.
Si
Benjamin Herrenschmidt [b...@kernel.crashing.org] wrote:
| And an additional comment regarding the rtas bit:
| > +int devmem_is_allowed(unsigned long pfn)
| > +{
| > + if (iomem_is_exclusive(pfn << PAGE_SHIFT))
| > + return 0;
| > + if (!page_is_ram(pfn))
| > + return 1;
| >
>From aebed2e9fb9fba7dd0a34595780b828d7a545ba2 Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Mon, 29 Aug 2011 14:12:08 -0700
Subject: [PATCH 1/1][v2] Enable CONFIG_STRICT_DEVMEM support for Powerpc.
As described in the help text in the patch, this token restricts general
access
>From 9d899c6bcb685afc58245f1fcfe5de1e8b499856 Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Mon, 29 Aug 2011 14:12:08 -0700
Subject: [PATCH 1/1] Implement CONFIG_STRICT_DEVMEM support for Powerpc.
As described in the help text in the patch, this token restricts general
access to /
On 06/14/2011 12:04 PM, Scott Wood wrote:
On Tue, 14 Jun 2011 14:17:01 -0400
Steve Best wrote:
On Tue, 2011-06-14 at 12:30 -0500, Nathan Lynch wrote:
Hi Steve,
On Tue, 2011-06-14 at 12:58 -0400, Steve Best wrote:
+/*
+ * devmem_is_allowed() checks to see if /dev/mem access to a certain addr
Albert Cahalan [acaha...@gmail.com] wrote:
| On Tue, Jun 1, 2010 at 9:38 PM, Sukadev Bhattiprolu
| wrote:
| > | Come on, seriously, you know it's ia64 and hppa that
| > | have issues. Maybe the nommu ports also have issues.
| > |
| > | The only portable way to specify the stack i
| Come on, seriously, you know it's ia64 and hppa that
| have issues. Maybe the nommu ports also have issues.
|
| The only portable way to specify the stack is base and offset,
| with flags or magic values for "share" and "kernel managed".
Ah, ok, we have not yet ported to IA64 and I see now wher
Albert Cahalan [acaha...@gmail.com] wrote:
| Sukadev Bhattiprolu writes:
|
| > Randy Dunlap [randy.dunlap at oracle.com] wrote:
| >>> base of the region allocated for stack. These architectures
| >>> must pass in the size of the stack-region
Randy Dunlap [randy.dun...@oracle.com] wrote:
| > + base of the region allocated for stack. These architectures
| > + must pass in the size of the stack-region in ->child_stack_size.
|
|stack region
|
| Seems unfortunate that differe
801 - 893 of 893 matches
Mail list logo
