Re: [PATCH 2/3] PCI/AER: Decode Requester ID when no error info found

LGTM On 12/6/23 16:42, Bjorn Helgaas wrote: > From: Bjorn Helgaas > > When a device with AER detects an error, it logs error information in its > own AER Error Status registers. It may send an Error Message to the Root > Port (RCEC in the case of an RCiEP), which logs the fact that an Error >

Re: [PATCH 1/3] PCI/AER: Use 'Correctable' and 'Uncorrectable' spec terms for errors

Hi Bjorn, Will help prevent confusion. LGTM. On 12/6/23 16:42, Bjorn Helgaas wrote: > From: Bjorn Helgaas > > The PCIe spec classifies errors as either "Correctable" or "Uncorrectable". > Previously we printed these as "Corrected" or "Uncorrected". To avoid > confusion, use the same terms as

Re: [PATCH v10 13/15] PCI/AER: Forward RCH downstream port-detected errors to the CXL.mem dev handler

Hi Dan, I adde danothe comment below. On 9/19/23 15:58, Terry Bowman wrote: > Hi Dan, > > On 8/31/23 15:35, Dan Williams wrote: >> Terry Bowman wrote: >>> From: Robert Richter >>> >>> In Restricted CXL Device (RCD) mode a CXL device is exposed as an

Re: [PATCH v10 13/15] PCI/AER: Forward RCH downstream port-detected errors to the CXL.mem dev handler

Hi Dan, On 8/31/23 15:35, Dan Williams wrote: > Terry Bowman wrote: >> From: Robert Richter >> >> In Restricted CXL Device (RCD) mode a CXL device is exposed as an >> RCiEP, but CXL downstream and upstream ports are not enumerated and >> not visible in the PCIe

[PATCH v10 13/15] PCI/AER: Forward RCH downstream port-detected errors to the CXL.mem dev handler

the handler. [1] CXL 3.0 spec: 9.11.8 CXL Devices Attached to an RCH [2] CXL 3.0 spec, 12.2.1.1 RCH Downstream Port-detected Errors [3] CXL 3.0 spec, 8.1.3 PCIe DVSEC for CXL Devices Co-developed-by: Terry Bowman Signed-off-by: Terry Bowman Signed-off-by: Robert Richter Cc: "Oliver O'Halloran

[PATCH v9 13/15] PCI/AER: Forward RCH downstream port-detected errors to the CXL.mem dev handler

the handler. [1] CXL 3.0 spec: 9.11.8 CXL Devices Attached to an RCH [2] CXL 3.0 spec, 12.2.1.1 RCH Downstream Port-detected Errors [3] CXL 3.0 spec, 8.1.3 PCIe DVSEC for CXL Devices Co-developed-by: Terry Bowman Signed-off-by: Terry Bowman Signed-off-by: Robert Richter Cc: "Oliver O'Halloran

[PATCH v8 12/14] PCI/AER: Forward RCH downstream port-detected errors to the CXL.mem dev handler

the handler. [1] CXL 3.0 spec: 9.11.8 CXL Devices Attached to an RCH [2] CXL 3.0 spec, 12.2.1.1 RCH Downstream Port-detected Errors [3] CXL 3.0 spec, 8.1.3 PCIe DVSEC for CXL Devices Co-developed-by: Terry Bowman Signed-off-by: Terry Bowman Signed-off-by: Robert Richter Cc: "Oliver O'Halloran

[PATCH v6 26/27] PCI/AER: Forward RCH downstream port-detected errors to the CXL.mem dev handler

the handler. [1] CXL 3.0 spec: 9.11.8 CXL Devices Attached to an RCH [2] CXL 3.0 spec, 12.2.1.1 RCH Downstream Port-detected Errors [3] CXL 3.0 spec, 8.1.3 PCIe DVSEC for CXL Devices Co-developed-by: Terry Bowman Signed-off-by: Terry Bowman Signed-off-by: Robert Richter Cc: "Oliver O'Halloran

[PATCH v5 25/26] PCI/AER: Forward RCH downstream port-detected errors to the CXL.mem dev handler

the handler. [1] CXL 3.0 spec: 9.11.8 CXL Devices Attached to an RCH [2] CXL 3.0 spec, 12.2.1.1 RCH Downstream Port-detected Errors [3] CXL 3.0 spec, 8.1.3 PCIe DVSEC for CXL Devices Co-developed-by: Terry Bowman Signed-off-by: Terry Bowman Signed-off-by: Robert Richter Cc: "Oliver O'Halloran

[PATCH v4 22/23] PCI/AER: Forward RCH downstream port-detected errors to the CXL.mem dev handler

DVSEC for CXL Devices Co-developed-by: Terry Bowman Signed-off-by: Terry Bowman Signed-off-by: Robert Richter Cc: "Oliver O'Halloran" Cc: Bjorn Helgaas Cc: linuxppc-dev@lists.ozlabs.org Cc: linux-...@vger.kernel.org --- drivers/pci/pcie/Kconfig | 12 + drivers/pci/pcie/aer

[PATCH v3 6/6] PCI/AER: Unmask RCEC internal errors to enable RCH downstream port error handling

Uncorrectable Error Mask Register, 7.8.4.6 Correctable Error Mask Register Co-developed-by: Terry Bowman Signed-off-by: Robert Richter Signed-off-by: Terry Bowman Cc: "Oliver O'Halloran" Cc: Bjorn Helgaas Cc: Mahesh J Salgaonkar Cc: linuxppc-dev@lists.ozlabs.org

[PATCH v3 5/6] PCI/AER: Forward RCH downstream port-detected errors to the CXL.mem dev handler

of the CXL subsystem. The CXL driver only provides the handler. [1] CXL 3.0 spec, 12.2.1.1 RCH Downstream Port-detected Errors [2] CXL 3.0 spec, 8.1.3 PCIe DVSEC for CXL Devices Co-developed-by: Terry Bowman Signed-off-by: Robert Richter Signed-off-by: Terry Bowman Cc: "Oliver O'Halloran"