This patchset provides a further optimisation of TLB handling in the 8xx.
Changes are:
- Not saving registers like CR when not needed
- Adding support to any TASK_SIZE
Only the last patch of the set is changed compared to v4
Christophe Leroy (5):
powerpc/8xx: macro for handling CPU15 errata
In order to be able to reduce scope during which CR is saved, we take
CR saving/restoring out of exception PROLOG and EPILOG
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git
Having a macro will help keep clear code.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index
We now have SPRG2 available as in it not used anymore for saving CR, so we don't
need to crash DAR anymore for saving r3 for CPU6 ERRATA handling.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
arch/powerpc/kernel/head_8xx.S | 9 -
1 file changed, 4 insertions(+), 5
CR only needs to be preserved when checking if we are handling a kernel address.
So we can preserve CR in a register:
- In ITLBMiss, check is done only when CONFIG_MODULES is defined. Otherwise we
don't need to do anything at all with CR.
- We use r10, then we reload SRR0/MD_EPN into r10 when CR
By default, TASK_SIZE is set to 0x8000 for PPC_8xx, which is most
likely sufficient for most cases. However, kernel configuration allows
to set TASK_SIZE to another value, so the 8xx shall handle it.
This patch also takes into account the case of PAGE_OFFSET lower than
0x8000, allthought
On Sat, Nov 17, 2007 at 07:09:46PM +0100, Ingo Molnar wrote:
* Torsten Kaiser [EMAIL PROTECTED] wrote:
Sadly lockdep does not work for me, as it gets turned off early:
[ 39.851594] -
[ 39.855963] inconsistent {softirq-on-W} - {in-softirq-W} usage.
[
