Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way

2008-11-25 Thread Michael Ellerman
On Tue, 2008-11-25 at 15:53 -0600, Hollis Blanchard wrote: > On Tue, 2008-11-25 at 11:10 +1100, Michael Ellerman wrote: > > > > Still, I think it would be better to only set memory_limit when the mem > > size is not a multiple of the PAGE_SIZE - so that memory_limit retains > > it's function as bo

Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way

2008-11-25 Thread Hollis Blanchard
On Tue, 2008-11-25 at 11:10 +1100, Michael Ellerman wrote: > > Still, I think it would be better to only set memory_limit when the mem > size is not a multiple of the PAGE_SIZE - so that memory_limit retains > it's function as both the value of the limit and a boolean. OK, how's this? ppc: force

Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way

2008-11-25 Thread Hollis Blanchard
On Tue, 2008-11-25 at 11:10 -0600, Milton Miller wrote: > On Nov 24, 2008, at 6:10 PM, Michael Ellerman wrote: > > On Mon, 2008-11-24 at 14:07 -0600, Hollis Blanchard wrote: > >> On Fri, 2008-11-14 at 16:09 -0600, Hollis Blanchard wrote: > >>> > >>> If this is all too much, then I'm close to giving

Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way

2008-11-25 Thread Milton Miller
On Nov 24, 2008, at 6:10 PM, Michael Ellerman wrote: On Mon, 2008-11-24 at 14:07 -0600, Hollis Blanchard wrote: On Fri, 2008-11-14 at 16:09 -0600, Hollis Blanchard wrote: If this is all too much, then I'm close to giving up and burning a 64KB page, which requires only ALIGN_DOWN() in the kerne

Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way

2008-11-24 Thread Michael Ellerman
On Mon, 2008-11-24 at 14:07 -0600, Hollis Blanchard wrote: > On Fri, 2008-11-14 at 16:09 -0600, Hollis Blanchard wrote: > > > > If this is all too much, then I'm close to giving up and burning a > > 64KB page, which requires only ALIGN_DOWN() in the kernel. > > ppc: force memory size to be a mult

Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way

2008-11-24 Thread Hollis Blanchard
On Fri, 2008-11-14 at 16:09 -0600, Hollis Blanchard wrote: > > If this is all too much, then I'm close to giving up and burning a > 64KB page, which requires only ALIGN_DOWN() in the kernel. ppc: force memory size to be a multiple of PAGE_SIZE Ensure that total memory size is page-aligned, becau

Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way

2008-11-18 Thread Hollis Blanchard
On Fri, 2008-11-14 at 16:09 -0600, Hollis Blanchard wrote: > > Basically my revised proposal is to add explicit memory reservation > properties > to the device tree. Currently, "/memreserve" properties in .dts files are not > present in the device tree itself, only in the FDT header. I think th

Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way

2008-11-14 Thread Hollis Blanchard
On Friday 14 November 2008 11:29:35 Milton Miller wrote: > > I simply don't see a good place to do this in the kernel. It would have > > to be before the first lmb_alloc() call, which for safety would put it > > inside early_init_devtree() -- along with the other lmb_reserve() > > calls.[1] > > > >

Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way

2008-11-14 Thread Milton Miller
Resend with correct reply threading. On Fri Nov 14 at 06:54:15 EST in 2008, Hollis Blanchard wrote: On Thu, 2008-11-13 at 07:44 +1100, Benjamin Herrenschmidt wrote: Again, why can't we just stick something in the kernel code that reserves the last page ? It could be in prom.c or it could be cal

Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way

2008-11-14 Thread Milton Miller
In-Reply-To: <[EMAIL PROTECTED]> On Fri Nov 14 at 06:54:15 EST in 2008, Hollis Blanchard wrote: On Thu, 2008-11-13 at 07:44 +1100, Benjamin Herrenschmidt wrote: Again, why can't we just stick something in the kernel code that reserves the last page ? It could be in prom.c or it could be called

Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way

2008-11-13 Thread Hollis Blanchard
On Thu, 2008-11-13 at 07:44 +1100, Benjamin Herrenschmidt wrote: > > Again, why can't we just stick something in the kernel code that > reserves the last page ? It could be in prom.c or it could be called by > affected 4xx platforms by the platform code, whatever, but the reserve > map isn't reall

Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way

2008-11-12 Thread Josh Boyer
On Thu, 13 Nov 2008 07:44:56 +1100 Benjamin Herrenschmidt <[EMAIL PROTECTED]> wrote: > On Wed, 2008-11-12 at 09:11 -0600, Hollis Blanchard wrote: > > Forget pages. The errata is about the last 256 bytes of physical > > memory. > > > > > I still find it a bit tricky to have memory nodes not aligne

Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way

2008-11-12 Thread Benjamin Herrenschmidt
On Wed, 2008-11-12 at 09:11 -0600, Hollis Blanchard wrote: > Forget pages. The errata is about the last 256 bytes of physical > memory. > > > I still find it a bit tricky to have memory nodes not aligned on > nice > > fat big boundaries tho. > > I don't know what you're referring to. The patch I

Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way

2008-11-12 Thread Hollis Blanchard
On Wed, 2008-11-12 at 22:52 +1100, Benjamin Herrenschmidt wrote: > On Wed, 2008-11-12 at 06:31 -0500, Josh Boyer wrote: > > On Wed, 12 Nov 2008 15:37:43 +1100 > > Benjamin Herrenschmidt <[EMAIL PROTECTED]> wrote: > > > > > On Tue, 2008-11-11 at 18:06 -0600, Hollis Blanchard wrote: > > > > The curr

Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way

2008-11-12 Thread Benjamin Herrenschmidt
On Wed, 2008-11-12 at 06:31 -0500, Josh Boyer wrote: > On Wed, 12 Nov 2008 15:37:43 +1100 > Benjamin Herrenschmidt <[EMAIL PROTECTED]> wrote: > > > On Tue, 2008-11-11 at 18:06 -0600, Hollis Blanchard wrote: > > > The current CHIP11 errata truncates the device tree memory node, and > > > subtracts

Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way

2008-11-12 Thread Josh Boyer
On Wed, 12 Nov 2008 15:37:43 +1100 Benjamin Herrenschmidt <[EMAIL PROTECTED]> wrote: > On Tue, 2008-11-11 at 18:06 -0600, Hollis Blanchard wrote: > > The current CHIP11 errata truncates the device tree memory node, and > > subtracts > > (hardcoded) 4096 bytes. This breaks kernels with larger PAGE

Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way

2008-11-11 Thread Benjamin Herrenschmidt
On Tue, 2008-11-11 at 18:06 -0600, Hollis Blanchard wrote: > The current CHIP11 errata truncates the device tree memory node, and subtracts > (hardcoded) 4096 bytes. This breaks kernels with larger PAGE_SIZE, since the > bootmem allocator assumes that total memory is a multiple of PAGE_SIZE. > > I

Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way

2008-11-11 Thread David Gibson
On Tue, Nov 11, 2008 at 06:06:46PM -0600, Hollis Blanchard wrote: > The current CHIP11 errata truncates the device tree memory node, and subtracts > (hardcoded) 4096 bytes. This breaks kernels with larger PAGE_SIZE, since the > bootmem allocator assumes that total memory is a multiple of PAGE_SIZE.

[PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way

2008-11-11 Thread Hollis Blanchard
The current CHIP11 errata truncates the device tree memory node, and subtracts (hardcoded) 4096 bytes. This breaks kernels with larger PAGE_SIZE, since the bootmem allocator assumes that total memory is a multiple of PAGE_SIZE. Instead, use a device tree memory reservation to reserve only the 256