On Wed, 22 Nov 2023 09:42:53 +0800, Shengjiu Wang wrote:
> The bit 10 in TX_DPTH_CTRL register controls the TX clock rate.
> If this bit is set, TX datapath clock should be = 2* TX bit rate.
> If this bit is not set, TX datapath clock should be 10* TX bit rate.
>
> As the spdif only case, we
The bit 10 in TX_DPTH_CTRL register controls the TX clock rate.
If this bit is set, TX datapath clock should be = 2* TX bit rate.
If this bit is not set, TX datapath clock should be 10* TX bit rate.
As the spdif only case, we always use 2 * TX bit clock, so
this bit need to be set.
