From: Andrew Kilkenny [EMAIL PROTECTED]
This adds support for the dual-core MPC8572 processor. We have
to support making SPR changes on each core. Also, since we can
have multiple memory controllers sharing an interrupt, flag the
interrupts with IRQF_SHARED.
Signed-off-by: Andrew Kilkenny
Acked-by: Dave Jiang [EMAIL PROTECTED]
Nate Case wrote:
From: Andrew Kilkenny [EMAIL PROTECTED]
This adds support for the dual-core MPC8572 processor. We have
to support making SPR changes on each core. Also, since we can
have multiple memory controllers sharing an interrupt, flag the
On Sep 19, 2008, at 4:12 PM, Nate Case wrote:
From: Andrew Kilkenny [EMAIL PROTECTED]
This adds support for the dual-core MPC8572 processor. We have
to support making SPR changes on each core. Also, since we can
have multiple memory controllers sharing an interrupt, flag the
interrupts with
On Fri, 2008-09-19 at 16:43 -0500, Kumar Gala wrote:
I don't have any issue with this, but why are you marking the PCI
error interrupt as shared?
[snip]
this I'm a bit more skeptical about.
The only one we really need to make shared is the memory controller
interrupt. I'll drop it for the
