On Thu, 12 Jun 2008 16:24:13 +0200
Stefan Roese <[EMAIL PROTECTED]> wrote:
> On Wednesday 11 June 2008, Josh Boyer wrote:
> > The 440EPx/GRx chips don't support PCI MRM commands. Drivers determine
> > this by looking for a zero value in the PCI cache line size register.
> > However, some drivers
On Wednesday 11 June 2008, Josh Boyer wrote:
> The 440EPx/GRx chips don't support PCI MRM commands. Drivers determine
> this by looking for a zero value in the PCI cache line size register.
> However, some drivers write to this register upon initialization. This can
> cause MRMs to be used on th
The 440EPx/GRx chips don't support PCI MRM commands. Drivers determine this
by looking for a zero value in the PCI cache line size register. However,
some drivers write to this register upon initialization. This can cause
MRMs to be used on these chips, which may cause deadlocks on PLB4.
The wo
