] powerpc/pci: Support per-aperture memory offset
The PCI core supports an offset per aperture nowadays but our arch code
still has a single offset per host bridge representing the difference
betwen CPU memory addresses and PCI MMIO addresses.
This is a problem as new machines and hypervisor
On Thu, 2013-05-09 at 13:47 +, Sethi Varun-B16395 wrote:
[Sethi Varun-B16395] Tested patch on FSL T4240, P4080, P5040 and P1020
boards.
Thanks.
Cheers,
Ben.
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The PCI core supports an offset per aperture nowadays but our arch
code still has a single offset per host bridge representing the
difference betwen CPU memory addresses and PCI MMIO addresses.
This is a problem as new machines and hypervisor versions are
coming out where the 64-bit windows will
On Sun, May 5, 2013 at 11:50 PM, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
The PCI core supports an offset per aperture nowadays but our arch
code still has a single offset per host bridge representing the
difference betwen CPU memory addresses and PCI MMIO addresses.
This is a