On Tue, 2020-03-24 at 14:52 +1100, Michael Ellerman wrote:
> "Naveen N. Rao" writes:
> > Segher Boessenkool wrote:
> > > On Mon, Mar 23, 2020 at 04:55:48PM +0530, Balamuruhan S wrote:
> > > > Data Cache Block Invalidate (dcbi) instruction implemented in 32-bit
> > > > designs prior to PowerPC
On Mon, 2020-03-23 at 07:46 -0500, Segher Boessenkool wrote:
> On Mon, Mar 23, 2020 at 04:55:48PM +0530, Balamuruhan S wrote:
> > Data Cache Block Invalidate (dcbi) instruction implemented in 32-bit
> > designs prior to PowerPC architecture version 2.01 and got obsolete
> > from version 2.01.
>
>
"Naveen N. Rao" writes:
> Segher Boessenkool wrote:
>> On Mon, Mar 23, 2020 at 04:55:48PM +0530, Balamuruhan S wrote:
>>> Data Cache Block Invalidate (dcbi) instruction implemented in 32-bit
>>> designs prior to PowerPC architecture version 2.01 and got obsolete
>>> from version 2.01.
We still
Segher Boessenkool wrote:
On Mon, Mar 23, 2020 at 04:55:48PM +0530, Balamuruhan S wrote:
Data Cache Block Invalidate (dcbi) instruction implemented in 32-bit
designs prior to PowerPC architecture version 2.01 and got obsolete
from version 2.01.
It was added back in 2.03. It also exists in
On Mon, Mar 23, 2020 at 04:55:48PM +0530, Balamuruhan S wrote:
> Data Cache Block Invalidate (dcbi) instruction implemented in 32-bit
> designs prior to PowerPC architecture version 2.01 and got obsolete
> from version 2.01.
It was added back in 2.03. It also exists in 64-bit designs (using
Data Cache Block Invalidate (dcbi) instruction implemented in 32-bit
designs prior to PowerPC architecture version 2.01 and got obsolete
from version 2.01. Attempt to use of this illegal instruction results
in a hypervisor emulation assistance interrupt. So, drop the option
`i` in cacheflush xmon
