Re: [PATCH 09/21] riscv: dma-mapping: skip invalidation before bidirectional DMA

On Sat, May 6, 2023, at 09:25, Guo Ren wrote: > On Fri, May 5, 2023 at 9:19 PM Arnd Bergmann wrote: >> >> This is something we can consider. Unfortunately, this is something >> that no architecture (except pa-risc, which has other problems) >> does at the moment, so we'd probably need to have a

Re: [PATCH 09/21] riscv: dma-mapping: skip invalidation before bidirectional DMA

On Fri, May 5, 2023 at 9:19 PM Arnd Bergmann wrote: > > On Fri, May 5, 2023, at 07:47, Guo Ren wrote: > > On Mon, Mar 27, 2023 at 8:15 PM Arnd Bergmann wrote: > > >> > >> riscv also invalidates the caches before the transfer, which does > >> not appear to serve any purpose. > > Yes, we can't

Re: [PATCH 09/21] riscv: dma-mapping: skip invalidation before bidirectional DMA

On Fri, May 5, 2023, at 07:47, Guo Ren wrote: > On Mon, Mar 27, 2023 at 8:15 PM Arnd Bergmann wrote: >> >> riscv also invalidates the caches before the transfer, which does >> not appear to serve any purpose. > Yes, we can't guarantee the CPU pre-load cache lines randomly during > dma working. >

Re: [PATCH 09/21] riscv: dma-mapping: skip invalidation before bidirectional DMA

On Mon, Mar 27, 2023 at 8:15 PM Arnd Bergmann wrote: > > From: Arnd Bergmann > > For a DMA_BIDIRECTIONAL transfer, the caches have to be cleaned > first to let the device see data written by the CPU, and invalidated > after the transfer to let the CPU see data written by the device. > > riscv

Re: [PATCH 09/21] riscv: dma-mapping: skip invalidation before bidirectional DMA

On Mon, 27 Mar 2023 05:13:05 PDT (-0700), a...@kernel.org wrote: From: Arnd Bergmann For a DMA_BIDIRECTIONAL transfer, the caches have to be cleaned first to let the device see data written by the CPU, and invalidated after the transfer to let the CPU see data written by the device. riscv

Re: [PATCH 09/21] riscv: dma-mapping: skip invalidation before bidirectional DMA

On Mon, Mar 27, 2023 at 1:16 PM Arnd Bergmann wrote: > > From: Arnd Bergmann > > For a DMA_BIDIRECTIONAL transfer, the caches have to be cleaned > first to let the device see data written by the CPU, and invalidated > after the transfer to let the CPU see data written by the device. > > riscv

Re: [PATCH 09/21] riscv: dma-mapping: skip invalidation before bidirectional DMA

On Mon, Mar 27, 2023 at 02:13:05PM +0200, Arnd Bergmann wrote: > From: Arnd Bergmann > > For a DMA_BIDIRECTIONAL transfer, the caches have to be cleaned > first to let the device see data written by the CPU, and invalidated > after the transfer to let the CPU see data written by the device. > >

[PATCH 09/21] riscv: dma-mapping: skip invalidation before bidirectional DMA

From: Arnd Bergmann For a DMA_BIDIRECTIONAL transfer, the caches have to be cleaned first to let the device see data written by the CPU, and invalidated after the transfer to let the CPU see data written by the device. riscv also invalidates the caches before the transfer, which does not appear