Long ago we had some code that actually used the CTR in the SW TLB
miss handlers (603/e300).  Since we don't use it no reason to waste
cycles saving it off and restoring it (we actually didn't restore it
in the fast path case).

Signed-off-by: Kumar Gala <ga...@kernel.crashing.org>
---
 arch/powerpc/kernel/head_32.S |   11 +++--------
 1 files changed, 3 insertions(+), 8 deletions(-)

diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index d794a63..0105fd5 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -472,12 +472,11 @@ SystemCall:
        . = 0x1000
 InstructionTLBMiss:
 /*
- * r0: stored ctr
+ * r0: scratch
  * r1: linux style pte ( later becomes ppc hardware pte )
  * r2: ptr to linux-style pte
  * r3: scratch
  */
-       mfctr   r0
        /* Get PTE (linux-style) and check access */
        mfspr   r3,SPRN_IMISS
        lis     r1,page_off...@h                /* check if kernel address */
@@ -528,7 +527,6 @@ InstructionAddressInvalid:
 
        addis   r1,r1,0x2000
        mtspr   SPRN_DSISR,r1   /* (shouldn't be needed) */
-       mtctr   r0              /* Restore CTR */
        andi.   r2,r3,0xFFFF    /* Clear upper bits of SRR1 */
        or      r2,r2,r1
        mtspr   SPRN_SRR1,r2
@@ -549,12 +547,11 @@ InstructionAddressInvalid:
        . = 0x1100
 DataLoadTLBMiss:
 /*
- * r0: stored ctr
+ * r0: scratch
  * r1: linux style pte ( later becomes ppc hardware pte )
  * r2: ptr to linux-style pte
  * r3: scratch
  */
-       mfctr   r0
        /* Get PTE (linux-style) and check access */
        mfspr   r3,SPRN_DMISS
        lis     r1,page_off...@h                /* check if kernel address */
@@ -604,7 +601,6 @@ DataAddressInvalid:
        rlwinm  r1,r3,9,6,6     /* Get load/store bit */
        addis   r1,r1,0x2000
        mtspr   SPRN_DSISR,r1
-       mtctr   r0              /* Restore CTR */
        andi.   r2,r3,0xFFFF    /* Clear upper bits of SRR1 */
        mtspr   SPRN_SRR1,r2
        mfspr   r1,SPRN_DMISS   /* Get failing address */
@@ -624,12 +620,11 @@ DataAddressInvalid:
        . = 0x1200
 DataStoreTLBMiss:
 /*
- * r0: stored ctr
+ * r0: scratch
  * r1: linux style pte ( later becomes ppc hardware pte )
  * r2: ptr to linux-style pte
  * r3: scratch
  */
-       mfctr   r0
        /* Get PTE (linux-style) and check access */
        mfspr   r3,SPRN_DMISS
        lis     r1,page_off...@h                /* check if kernel address */
-- 
1.5.6.6

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